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x86/mce: Fix CMCI preemption bugs
The following commit:
27f6c573e0
("x86, CMCI: Add proper detection of end of CMCI storms")
Added two preemption bugs:
- machine_check_poll() does a get_cpu_var() without a matching
put_cpu_var(), which causes preemption imbalance and crashes upon
bootup.
- it does percpu ops without disabling preemption. Preemption is not
disabled due to the mistaken use of a raw spinlock.
To fix these bugs fix the imbalance and change
cmci_discover_lock to a regular spinlock.
Reported-by: Owen Kibel <qmewlo@gmail.com>
Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Chen, Gong <gong.chen@linux.intel.com>
Cc: Josh Boyer <jwboyer@fedoraproject.org>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Alexander Todorov <atodorov@redhat.com>
Cc: Borislav Petkov <bp@alien8.de>
Link: http://lkml.kernel.org/n/tip-jtjptvgigpfkpvtQxpEk1at2@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
--
arch/x86/kernel/cpu/mcheck/mce.c | 4 +---
arch/x86/kernel/cpu/mcheck/mce_intel.c | 18 +++++++++---------
2 files changed, 10 insertions(+), 12 deletions(-)
This commit is contained in:
parent
5be44a6fb1
commit
ea431643d6
2 changed files with 10 additions and 12 deletions
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@ -598,7 +598,6 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
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{
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struct mce m;
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int i;
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unsigned long *v;
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this_cpu_inc(mce_poll_count);
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@ -618,8 +617,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
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if (!(m.status & MCI_STATUS_VAL))
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continue;
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v = &get_cpu_var(mce_polled_error);
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set_bit(0, v);
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this_cpu_write(mce_polled_error, 1);
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/*
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* Uncorrected or signalled events are handled by the exception
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* handler when it is enabled, so don't process those here.
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@ -42,7 +42,7 @@ static DEFINE_PER_CPU(mce_banks_t, mce_banks_owned);
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* cmci_discover_lock protects against parallel discovery attempts
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* which could race against each other.
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*/
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static DEFINE_RAW_SPINLOCK(cmci_discover_lock);
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static DEFINE_SPINLOCK(cmci_discover_lock);
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#define CMCI_THRESHOLD 1
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#define CMCI_POLL_INTERVAL (30 * HZ)
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@ -144,14 +144,14 @@ static void cmci_storm_disable_banks(void)
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int bank;
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u64 val;
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raw_spin_lock_irqsave(&cmci_discover_lock, flags);
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spin_lock_irqsave(&cmci_discover_lock, flags);
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owned = __get_cpu_var(mce_banks_owned);
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for_each_set_bit(bank, owned, MAX_NR_BANKS) {
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rdmsrl(MSR_IA32_MCx_CTL2(bank), val);
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val &= ~MCI_CTL2_CMCI_EN;
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wrmsrl(MSR_IA32_MCx_CTL2(bank), val);
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}
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raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
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spin_unlock_irqrestore(&cmci_discover_lock, flags);
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}
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static bool cmci_storm_detect(void)
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@ -211,7 +211,7 @@ static void cmci_discover(int banks)
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int i;
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int bios_wrong_thresh = 0;
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raw_spin_lock_irqsave(&cmci_discover_lock, flags);
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spin_lock_irqsave(&cmci_discover_lock, flags);
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for (i = 0; i < banks; i++) {
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u64 val;
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int bios_zero_thresh = 0;
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@ -266,7 +266,7 @@ static void cmci_discover(int banks)
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WARN_ON(!test_bit(i, __get_cpu_var(mce_poll_banks)));
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}
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}
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raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
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spin_unlock_irqrestore(&cmci_discover_lock, flags);
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if (mca_cfg.bios_cmci_threshold && bios_wrong_thresh) {
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pr_info_once(
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"bios_cmci_threshold: Some banks do not have valid thresholds set\n");
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@ -316,10 +316,10 @@ void cmci_clear(void)
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if (!cmci_supported(&banks))
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return;
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raw_spin_lock_irqsave(&cmci_discover_lock, flags);
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spin_lock_irqsave(&cmci_discover_lock, flags);
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for (i = 0; i < banks; i++)
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__cmci_disable_bank(i);
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raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
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spin_unlock_irqrestore(&cmci_discover_lock, flags);
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}
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static void cmci_rediscover_work_func(void *arg)
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@ -360,9 +360,9 @@ void cmci_disable_bank(int bank)
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if (!cmci_supported(&banks))
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return;
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raw_spin_lock_irqsave(&cmci_discover_lock, flags);
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spin_lock_irqsave(&cmci_discover_lock, flags);
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__cmci_disable_bank(bank);
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raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
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spin_unlock_irqrestore(&cmci_discover_lock, flags);
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}
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static void intel_init_cmci(void)
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