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habanalabs/gaudi2: remove use of razwi info received from f/w
Because f/w does not update razwi info when sending events, remove the use of it. The driver is responsible to check if razwi happened and to collect razwi data. Signed-off-by: Dani Liberman <dliberman@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
This commit is contained in:
parent
54fcb384be
commit
eaca606e88
1 changed files with 57 additions and 136 deletions
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@ -7081,7 +7081,6 @@ static int gaudi2_handle_qman_err_generic(struct hl_device *hdev, u16 event_type
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static void gaudi2_razwi_rr_hbw_shared_printf_info(struct hl_device *hdev,
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u64 rtr_mstr_if_base_addr, bool is_write, char *name,
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bool read_razwi_regs, struct hl_eq_razwi_info *razwi_info,
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enum gaudi2_engine_id id, u64 *event_mask)
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{
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u32 razwi_hi, razwi_lo, razwi_xy;
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@ -7089,26 +7088,14 @@ static void gaudi2_razwi_rr_hbw_shared_printf_info(struct hl_device *hdev,
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u8 rd_wr_flag;
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if (is_write) {
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if (read_razwi_regs) {
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razwi_hi = RREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AW_RAZWI_HI);
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razwi_lo = RREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AW_RAZWI_LO);
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razwi_xy = RREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AW_RAZWI_XY);
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} else {
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razwi_hi = le32_to_cpu(razwi_info->hbw.rr_aw_razwi_hi_reg);
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razwi_lo = le32_to_cpu(razwi_info->hbw.rr_aw_razwi_lo_reg);
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razwi_xy = le32_to_cpu(razwi_info->hbw.rr_aw_razwi_id_reg);
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}
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razwi_hi = RREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AW_RAZWI_HI);
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razwi_lo = RREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AW_RAZWI_LO);
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razwi_xy = RREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AW_RAZWI_XY);
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rd_wr_flag = HL_RAZWI_WRITE;
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} else {
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if (read_razwi_regs) {
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razwi_hi = RREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AR_RAZWI_HI);
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razwi_lo = RREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AR_RAZWI_LO);
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razwi_xy = RREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AR_RAZWI_XY);
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} else {
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razwi_hi = le32_to_cpu(razwi_info->hbw.rr_ar_razwi_hi_reg);
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razwi_lo = le32_to_cpu(razwi_info->hbw.rr_ar_razwi_lo_reg);
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razwi_xy = le32_to_cpu(razwi_info->hbw.rr_ar_razwi_id_reg);
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}
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razwi_hi = RREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AR_RAZWI_HI);
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razwi_lo = RREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AR_RAZWI_LO);
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razwi_xy = RREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AR_RAZWI_XY);
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rd_wr_flag = HL_RAZWI_READ;
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}
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@ -7122,7 +7109,6 @@ static void gaudi2_razwi_rr_hbw_shared_printf_info(struct hl_device *hdev,
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static void gaudi2_razwi_rr_lbw_shared_printf_info(struct hl_device *hdev,
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u64 rtr_mstr_if_base_addr, bool is_write, char *name,
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bool read_razwi_regs, struct hl_eq_razwi_info *razwi_info,
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enum gaudi2_engine_id id, u64 *event_mask)
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{
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u32 razwi_addr, razwi_xy;
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@ -7130,24 +7116,12 @@ static void gaudi2_razwi_rr_lbw_shared_printf_info(struct hl_device *hdev,
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u8 rd_wr_flag;
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if (is_write) {
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if (read_razwi_regs) {
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razwi_addr = RREG32(rtr_mstr_if_base_addr + RR_SHRD_LBW_AW_RAZWI);
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razwi_xy = RREG32(rtr_mstr_if_base_addr + RR_SHRD_LBW_AW_RAZWI_XY);
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} else {
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razwi_addr = le32_to_cpu(razwi_info->lbw.rr_aw_razwi_reg);
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razwi_xy = le32_to_cpu(razwi_info->lbw.rr_aw_razwi_id_reg);
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}
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razwi_addr = RREG32(rtr_mstr_if_base_addr + RR_SHRD_LBW_AW_RAZWI);
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razwi_xy = RREG32(rtr_mstr_if_base_addr + RR_SHRD_LBW_AW_RAZWI_XY);
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rd_wr_flag = HL_RAZWI_WRITE;
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} else {
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if (read_razwi_regs) {
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razwi_addr = RREG32(rtr_mstr_if_base_addr + RR_SHRD_LBW_AR_RAZWI);
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razwi_xy = RREG32(rtr_mstr_if_base_addr + RR_SHRD_LBW_AR_RAZWI_XY);
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} else {
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razwi_addr = le32_to_cpu(razwi_info->lbw.rr_ar_razwi_reg);
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razwi_xy = le32_to_cpu(razwi_info->lbw.rr_ar_razwi_id_reg);
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}
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razwi_addr = RREG32(rtr_mstr_if_base_addr + RR_SHRD_LBW_AR_RAZWI);
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razwi_xy = RREG32(rtr_mstr_if_base_addr + RR_SHRD_LBW_AR_RAZWI_XY);
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rd_wr_flag = HL_RAZWI_READ;
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}
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@ -7208,19 +7182,15 @@ static enum gaudi2_engine_id gaudi2_razwi_calc_engine_id(struct hl_device *hdev,
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*/
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static void gaudi2_ack_module_razwi_event_handler(struct hl_device *hdev,
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enum razwi_event_sources module, u8 module_idx,
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u8 module_sub_idx, struct hl_eq_razwi_info *razwi_info,
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u64 *event_mask)
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u8 module_sub_idx, u64 *event_mask)
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{
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bool via_sft = false, read_razwi_regs = false;
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bool via_sft = false;
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u32 rtr_id, dcore_id, dcore_rtr_id, sft_id, eng_id;
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u64 rtr_mstr_if_base_addr;
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u32 hbw_shrd_aw = 0, hbw_shrd_ar = 0;
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u32 lbw_shrd_aw = 0, lbw_shrd_ar = 0;
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char initiator_name[64];
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if (hdev->pldm || !(hdev->fw_components & FW_TYPE_LINUX) || !razwi_info)
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read_razwi_regs = true;
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switch (module) {
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case RAZWI_TPC:
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rtr_id = gaudi2_tpc_initiator_rtr_id[module_idx];
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@ -7286,23 +7256,6 @@ static void gaudi2_ack_module_razwi_event_handler(struct hl_device *hdev,
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return;
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}
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if (!read_razwi_regs) {
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if (le32_to_cpu(razwi_info->razwi_happened_mask) & RAZWI_HAPPENED_HBW) {
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hbw_shrd_aw = le32_to_cpu(razwi_info->razwi_happened_mask) &
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RAZWI_HAPPENED_AW;
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hbw_shrd_ar = le32_to_cpu(razwi_info->razwi_happened_mask) &
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RAZWI_HAPPENED_AR;
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} else if (le32_to_cpu(razwi_info->razwi_happened_mask) & RAZWI_HAPPENED_LBW) {
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lbw_shrd_aw = le32_to_cpu(razwi_info->razwi_happened_mask) &
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RAZWI_HAPPENED_AW;
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lbw_shrd_ar = le32_to_cpu(razwi_info->razwi_happened_mask) &
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RAZWI_HAPPENED_AR;
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}
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rtr_mstr_if_base_addr = 0;
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goto dump_info;
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}
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/* Find router mstr_if register base */
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if (via_sft) {
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rtr_mstr_if_base_addr = mmSFT0_HBW_RTR_IF0_RTR_CTRL_BASE +
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@ -7320,7 +7273,6 @@ static void gaudi2_ack_module_razwi_event_handler(struct hl_device *hdev,
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/* Find out event cause by reading "RAZWI_HAPPENED" registers */
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hbw_shrd_aw = RREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AW_RAZWI_HAPPENED);
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hbw_shrd_ar = RREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AR_RAZWI_HAPPENED);
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if (via_sft) {
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@ -7333,58 +7285,43 @@ static void gaudi2_ack_module_razwi_event_handler(struct hl_device *hdev,
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RTR_LBW_MSTR_IF_OFFSET;
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lbw_shrd_aw = RREG32(base + RR_SHRD_LBW_AW_RAZWI_HAPPENED);
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lbw_shrd_ar = RREG32(base + RR_SHRD_LBW_AR_RAZWI_HAPPENED);
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} else {
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lbw_shrd_aw = RREG32(rtr_mstr_if_base_addr + RR_SHRD_LBW_AW_RAZWI_HAPPENED);
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lbw_shrd_ar = RREG32(rtr_mstr_if_base_addr + RR_SHRD_LBW_AR_RAZWI_HAPPENED);
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}
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dump_info:
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/* check if there is no RR razwi indication at all */
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if (!hbw_shrd_aw && !hbw_shrd_ar && !lbw_shrd_aw && !lbw_shrd_ar)
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return;
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eng_id = gaudi2_razwi_calc_engine_id(hdev, module, module_idx);
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if (hbw_shrd_aw) {
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gaudi2_razwi_rr_hbw_shared_printf_info(hdev, rtr_mstr_if_base_addr, true,
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initiator_name, read_razwi_regs, razwi_info,
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eng_id, event_mask);
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initiator_name, eng_id, event_mask);
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/* Clear event indication */
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if (read_razwi_regs)
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WREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AW_RAZWI_HAPPENED, hbw_shrd_aw);
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WREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AW_RAZWI_HAPPENED, hbw_shrd_aw);
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}
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if (hbw_shrd_ar) {
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gaudi2_razwi_rr_hbw_shared_printf_info(hdev, rtr_mstr_if_base_addr, false,
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initiator_name, read_razwi_regs, razwi_info,
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eng_id, event_mask);
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initiator_name, eng_id, event_mask);
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/* Clear event indication */
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if (read_razwi_regs)
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WREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AR_RAZWI_HAPPENED, hbw_shrd_ar);
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WREG32(rtr_mstr_if_base_addr + RR_SHRD_HBW_AR_RAZWI_HAPPENED, hbw_shrd_ar);
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}
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if (lbw_shrd_aw) {
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gaudi2_razwi_rr_lbw_shared_printf_info(hdev, rtr_mstr_if_base_addr, true,
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initiator_name, read_razwi_regs, razwi_info,
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eng_id, event_mask);
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initiator_name, eng_id, event_mask);
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/* Clear event indication */
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if (read_razwi_regs)
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WREG32(rtr_mstr_if_base_addr + RR_SHRD_LBW_AW_RAZWI_HAPPENED, lbw_shrd_aw);
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WREG32(rtr_mstr_if_base_addr + RR_SHRD_LBW_AW_RAZWI_HAPPENED, lbw_shrd_aw);
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}
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if (lbw_shrd_ar) {
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gaudi2_razwi_rr_lbw_shared_printf_info(hdev, rtr_mstr_if_base_addr, false,
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initiator_name, read_razwi_regs, razwi_info,
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eng_id, event_mask);
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initiator_name, eng_id, event_mask);
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/* Clear event indication */
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if (read_razwi_regs)
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WREG32(rtr_mstr_if_base_addr + RR_SHRD_LBW_AR_RAZWI_HAPPENED, lbw_shrd_ar);
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WREG32(rtr_mstr_if_base_addr + RR_SHRD_LBW_AR_RAZWI_HAPPENED, lbw_shrd_ar);
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}
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}
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@ -7396,42 +7333,38 @@ static void gaudi2_check_if_razwi_happened(struct hl_device *hdev)
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/* check all TPCs */
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for (mod_idx = 0 ; mod_idx < (NUM_OF_TPC_PER_DCORE * NUM_OF_DCORES + 1) ; mod_idx++) {
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if (prop->tpc_enabled_mask & BIT(mod_idx))
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_TPC, mod_idx, 0, NULL,
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NULL);
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_TPC, mod_idx, 0, NULL);
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}
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/* check all MMEs */
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for (mod_idx = 0 ; mod_idx < (NUM_OF_MME_PER_DCORE * NUM_OF_DCORES) ; mod_idx++)
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for (sub_mod = MME_WAP0 ; sub_mod < MME_INITIATORS_MAX ; sub_mod++)
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_MME, mod_idx,
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sub_mod, NULL, NULL);
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sub_mod, NULL);
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/* check all EDMAs */
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for (mod_idx = 0 ; mod_idx < (NUM_OF_EDMA_PER_DCORE * NUM_OF_DCORES) ; mod_idx++)
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if (prop->edma_enabled_mask & BIT(mod_idx))
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_EDMA, mod_idx, 0, NULL,
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NULL);
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_EDMA, mod_idx, 0, NULL);
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/* check all PDMAs */
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for (mod_idx = 0 ; mod_idx < NUM_OF_PDMA ; mod_idx++)
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_PDMA, mod_idx, 0, NULL,
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NULL);
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_PDMA, mod_idx, 0, NULL);
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/* check all NICs */
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for (mod_idx = 0 ; mod_idx < NIC_NUMBER_OF_PORTS ; mod_idx++)
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if (hdev->nic_ports_mask & BIT(mod_idx))
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_NIC, mod_idx >> 1, 0,
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NULL, NULL);
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NULL);
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/* check all DECs */
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for (mod_idx = 0 ; mod_idx < NUMBER_OF_DEC ; mod_idx++)
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if (prop->decoder_enabled_mask & BIT(mod_idx))
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_DEC, mod_idx, 0, NULL,
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NULL);
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_DEC, mod_idx, 0, NULL);
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/* check all ROTs */
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for (mod_idx = 0 ; mod_idx < NUM_OF_ROT ; mod_idx++)
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_ROT, mod_idx, 0, NULL, NULL);
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_ROT, mod_idx, 0, NULL);
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}
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static const char *gaudi2_get_initiators_name(u32 rtr_id)
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@ -7818,7 +7751,7 @@ static int _gaudi2_handle_qm_sei_err(struct hl_device *hdev, u64 qman_base, u16
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}
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static int gaudi2_handle_qm_sei_err(struct hl_device *hdev, u16 event_type,
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struct hl_eq_razwi_info *razwi_info, u64 *event_mask)
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bool extended_err_check, u64 *event_mask)
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{
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enum razwi_event_sources module;
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u32 error_count = 0;
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@ -7871,9 +7804,9 @@ static int gaudi2_handle_qm_sei_err(struct hl_device *hdev, u16 event_type,
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error_count += _gaudi2_handle_qm_sei_err(hdev,
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qman_base + NIC_QM_OFFSET, event_type);
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/* check if RAZWI happened */
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if (razwi_info)
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gaudi2_ack_module_razwi_event_handler(hdev, module, 0, 0, razwi_info, event_mask);
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if (extended_err_check)
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/* check if RAZWI happened */
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gaudi2_ack_module_razwi_event_handler(hdev, module, 0, 0, event_mask);
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return error_count;
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}
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@ -8042,8 +7975,7 @@ static int gaudi2_handle_rot_err(struct hl_device *hdev, u8 rot_index, u16 event
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}
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/* check if RAZWI happened */
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_ROT, rot_index, 0,
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&razwi_with_intr_cause->razwi_info, event_mask);
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_ROT, rot_index, 0, event_mask);
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return error_count;
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}
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@ -8064,14 +7996,13 @@ static int gaudi2_tpc_ack_interrupts(struct hl_device *hdev, u8 tpc_index, u16
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}
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/* check if RAZWI happened */
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_TPC, tpc_index, 0,
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&razwi_with_intr_cause->razwi_info, event_mask);
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_TPC, tpc_index, 0, event_mask);
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return error_count;
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}
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static int gaudi2_handle_dec_err(struct hl_device *hdev, u8 dec_index, u16 event_type,
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struct hl_eq_razwi_info *razwi_info, u64 *event_mask)
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u64 *event_mask)
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{
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u32 sts_addr, sts_val, sts_clr_val = 0, error_count = 0;
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int i;
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@ -8098,8 +8029,7 @@ static int gaudi2_handle_dec_err(struct hl_device *hdev, u8 dec_index, u16 event
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}
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/* check if RAZWI happened */
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_DEC, dec_index, 0, razwi_info,
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event_mask);
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gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_DEC, dec_index, 0, event_mask);
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/* Write 1 clear errors */
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WREG32(sts_addr, sts_clr_val);
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@ -8108,7 +8038,7 @@ static int gaudi2_handle_dec_err(struct hl_device *hdev, u8 dec_index, u16 event
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}
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static int gaudi2_handle_mme_err(struct hl_device *hdev, u8 mme_index, u16 event_type,
|
||||
struct hl_eq_razwi_info *razwi_info, u64 *event_mask)
|
||||
u64 *event_mask)
|
||||
{
|
||||
u32 sts_addr, sts_val, sts_clr_addr, sts_clr_val = 0, error_count = 0;
|
||||
int i;
|
||||
|
@ -8129,8 +8059,7 @@ static int gaudi2_handle_mme_err(struct hl_device *hdev, u8 mme_index, u16 event
|
|||
|
||||
/* check if RAZWI happened */
|
||||
for (i = MME_WRITE ; i < MME_INITIATORS_MAX ; i++)
|
||||
gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_MME, mme_index, i, razwi_info,
|
||||
event_mask);
|
||||
gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_MME, mme_index, i, event_mask);
|
||||
|
||||
WREG32(sts_clr_addr, sts_clr_val);
|
||||
|
||||
|
@ -8153,7 +8082,7 @@ static int gaudi2_handle_mme_sbte_err(struct hl_device *hdev, u16 event_type,
|
|||
}
|
||||
|
||||
static int gaudi2_handle_mme_wap_err(struct hl_device *hdev, u8 mme_index, u16 event_type,
|
||||
struct hl_eq_razwi_info *razwi_info, u64 *event_mask)
|
||||
u64 *event_mask)
|
||||
{
|
||||
u32 sts_addr, sts_val, sts_clr_addr, sts_clr_val = 0, error_count = 0;
|
||||
int i;
|
||||
|
@ -8173,10 +8102,8 @@ static int gaudi2_handle_mme_wap_err(struct hl_device *hdev, u8 mme_index, u16 e
|
|||
}
|
||||
|
||||
/* check if RAZWI happened on WAP0/1 */
|
||||
gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_MME, mme_index, MME_WAP0, razwi_info,
|
||||
event_mask);
|
||||
gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_MME, mme_index, MME_WAP1, razwi_info,
|
||||
event_mask);
|
||||
gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_MME, mme_index, MME_WAP0, event_mask);
|
||||
gaudi2_ack_module_razwi_event_handler(hdev, RAZWI_MME, mme_index, MME_WAP1, event_mask);
|
||||
|
||||
WREG32(sts_clr_addr, sts_clr_val);
|
||||
|
||||
|
@ -8226,29 +8153,29 @@ static void gaudi2_print_pcie_mstr_rr_mstr_if_razwi_info(struct hl_device *hdev,
|
|||
|
||||
razwi_happened_addr = mstr_if_base_addr + RR_SHRD_HBW_AW_RAZWI_HAPPENED;
|
||||
if (RREG32(razwi_happened_addr)) {
|
||||
gaudi2_razwi_rr_hbw_shared_printf_info(hdev, mstr_if_base_addr, true, "PCIE", true,
|
||||
NULL, GAUDI2_ENGINE_ID_PCIE, event_mask);
|
||||
gaudi2_razwi_rr_hbw_shared_printf_info(hdev, mstr_if_base_addr, true, "PCIE",
|
||||
GAUDI2_ENGINE_ID_PCIE, event_mask);
|
||||
WREG32(razwi_happened_addr, 0x1);
|
||||
}
|
||||
|
||||
razwi_happened_addr = mstr_if_base_addr + RR_SHRD_HBW_AR_RAZWI_HAPPENED;
|
||||
if (RREG32(razwi_happened_addr)) {
|
||||
gaudi2_razwi_rr_hbw_shared_printf_info(hdev, mstr_if_base_addr, false, "PCIE", true,
|
||||
NULL, GAUDI2_ENGINE_ID_PCIE, event_mask);
|
||||
gaudi2_razwi_rr_hbw_shared_printf_info(hdev, mstr_if_base_addr, false, "PCIE",
|
||||
GAUDI2_ENGINE_ID_PCIE, event_mask);
|
||||
WREG32(razwi_happened_addr, 0x1);
|
||||
}
|
||||
|
||||
razwi_happened_addr = mstr_if_base_addr + RR_SHRD_LBW_AW_RAZWI_HAPPENED;
|
||||
if (RREG32(razwi_happened_addr)) {
|
||||
gaudi2_razwi_rr_lbw_shared_printf_info(hdev, mstr_if_base_addr, true, "PCIE", true,
|
||||
NULL, GAUDI2_ENGINE_ID_PCIE, event_mask);
|
||||
gaudi2_razwi_rr_lbw_shared_printf_info(hdev, mstr_if_base_addr, true, "PCIE",
|
||||
GAUDI2_ENGINE_ID_PCIE, event_mask);
|
||||
WREG32(razwi_happened_addr, 0x1);
|
||||
}
|
||||
|
||||
razwi_happened_addr = mstr_if_base_addr + RR_SHRD_LBW_AR_RAZWI_HAPPENED;
|
||||
if (RREG32(razwi_happened_addr)) {
|
||||
gaudi2_razwi_rr_lbw_shared_printf_info(hdev, mstr_if_base_addr, false, "PCIE", true,
|
||||
NULL, GAUDI2_ENGINE_ID_PCIE, event_mask);
|
||||
gaudi2_razwi_rr_lbw_shared_printf_info(hdev, mstr_if_base_addr, false, "PCIE",
|
||||
GAUDI2_ENGINE_ID_PCIE, event_mask);
|
||||
WREG32(razwi_happened_addr, 0x1);
|
||||
}
|
||||
}
|
||||
|
@ -8912,8 +8839,7 @@ static void gaudi2_handle_eqe(struct hl_device *hdev, struct hl_eq_entry *eq_ent
|
|||
case GAUDI2_EVENT_PDMA_CH0_AXI_ERR_RSP:
|
||||
case GAUDI2_EVENT_PDMA_CH1_AXI_ERR_RSP:
|
||||
reset_flags |= HL_DRV_RESET_FW_FATAL_ERR;
|
||||
error_count = gaudi2_handle_qm_sei_err(hdev, event_type,
|
||||
&eq_entry->razwi_info, &event_mask);
|
||||
error_count = gaudi2_handle_qm_sei_err(hdev, event_type, true, &event_mask);
|
||||
event_mask |= HL_NOTIFIER_EVENT_USER_ENGINE_ERR;
|
||||
break;
|
||||
|
||||
|
@ -8922,7 +8848,7 @@ static void gaudi2_handle_eqe(struct hl_device *hdev, struct hl_eq_entry *eq_ent
|
|||
index = event_type - GAUDI2_EVENT_ROTATOR0_AXI_ERROR_RESPONSE;
|
||||
error_count = gaudi2_handle_rot_err(hdev, index, event_type,
|
||||
&eq_entry->razwi_with_intr_cause, &event_mask);
|
||||
error_count += gaudi2_handle_qm_sei_err(hdev, event_type, NULL, &event_mask);
|
||||
error_count += gaudi2_handle_qm_sei_err(hdev, event_type, false, &event_mask);
|
||||
event_mask |= HL_NOTIFIER_EVENT_USER_ENGINE_ERR;
|
||||
break;
|
||||
|
||||
|
@ -8930,14 +8856,13 @@ static void gaudi2_handle_eqe(struct hl_device *hdev, struct hl_eq_entry *eq_ent
|
|||
index = event_type - GAUDI2_EVENT_TPC0_AXI_ERR_RSP;
|
||||
error_count = gaudi2_tpc_ack_interrupts(hdev, index, event_type,
|
||||
&eq_entry->razwi_with_intr_cause, &event_mask);
|
||||
error_count += gaudi2_handle_qm_sei_err(hdev, event_type, NULL, &event_mask);
|
||||
error_count += gaudi2_handle_qm_sei_err(hdev, event_type, false, &event_mask);
|
||||
event_mask |= HL_NOTIFIER_EVENT_USER_ENGINE_ERR;
|
||||
break;
|
||||
|
||||
case GAUDI2_EVENT_DEC0_AXI_ERR_RSPONSE ... GAUDI2_EVENT_DEC9_AXI_ERR_RSPONSE:
|
||||
index = event_type - GAUDI2_EVENT_DEC0_AXI_ERR_RSPONSE;
|
||||
error_count = gaudi2_handle_dec_err(hdev, index, event_type,
|
||||
&eq_entry->razwi_info, &event_mask);
|
||||
error_count = gaudi2_handle_dec_err(hdev, index, event_type, &event_mask);
|
||||
event_mask |= HL_NOTIFIER_EVENT_USER_ENGINE_ERR;
|
||||
break;
|
||||
|
||||
|
@ -8985,8 +8910,7 @@ static void gaudi2_handle_eqe(struct hl_device *hdev, struct hl_eq_entry *eq_ent
|
|||
case GAUDI2_EVENT_DEC9_SPI:
|
||||
index = (event_type - GAUDI2_EVENT_DEC0_SPI) /
|
||||
(GAUDI2_EVENT_DEC1_SPI - GAUDI2_EVENT_DEC0_SPI);
|
||||
error_count = gaudi2_handle_dec_err(hdev, index, event_type,
|
||||
&eq_entry->razwi_info, &event_mask);
|
||||
error_count = gaudi2_handle_dec_err(hdev, index, event_type, &event_mask);
|
||||
event_mask |= HL_NOTIFIER_EVENT_USER_ENGINE_ERR;
|
||||
break;
|
||||
|
||||
|
@ -8997,9 +8921,8 @@ static void gaudi2_handle_eqe(struct hl_device *hdev, struct hl_eq_entry *eq_ent
|
|||
index = (event_type - GAUDI2_EVENT_MME0_CTRL_AXI_ERROR_RESPONSE) /
|
||||
(GAUDI2_EVENT_MME1_CTRL_AXI_ERROR_RESPONSE -
|
||||
GAUDI2_EVENT_MME0_CTRL_AXI_ERROR_RESPONSE);
|
||||
error_count = gaudi2_handle_mme_err(hdev, index, event_type,
|
||||
&eq_entry->razwi_info, &event_mask);
|
||||
error_count += gaudi2_handle_qm_sei_err(hdev, event_type, NULL, &event_mask);
|
||||
error_count = gaudi2_handle_mme_err(hdev, index, event_type, &event_mask);
|
||||
error_count += gaudi2_handle_qm_sei_err(hdev, event_type, false, &event_mask);
|
||||
event_mask |= HL_NOTIFIER_EVENT_USER_ENGINE_ERR;
|
||||
break;
|
||||
|
||||
|
@ -9010,8 +8933,7 @@ static void gaudi2_handle_eqe(struct hl_device *hdev, struct hl_eq_entry *eq_ent
|
|||
index = (event_type - GAUDI2_EVENT_MME0_QMAN_SW_ERROR) /
|
||||
(GAUDI2_EVENT_MME1_QMAN_SW_ERROR -
|
||||
GAUDI2_EVENT_MME0_QMAN_SW_ERROR);
|
||||
error_count = gaudi2_handle_mme_err(hdev, index, event_type,
|
||||
&eq_entry->razwi_info, &event_mask);
|
||||
error_count = gaudi2_handle_mme_err(hdev, index, event_type, &event_mask);
|
||||
event_mask |= HL_NOTIFIER_EVENT_USER_ENGINE_ERR;
|
||||
break;
|
||||
|
||||
|
@ -9022,8 +8944,7 @@ static void gaudi2_handle_eqe(struct hl_device *hdev, struct hl_eq_entry *eq_ent
|
|||
index = (event_type - GAUDI2_EVENT_MME0_WAP_SOURCE_RESULT_INVALID) /
|
||||
(GAUDI2_EVENT_MME1_WAP_SOURCE_RESULT_INVALID -
|
||||
GAUDI2_EVENT_MME0_WAP_SOURCE_RESULT_INVALID);
|
||||
error_count = gaudi2_handle_mme_wap_err(hdev, index, event_type,
|
||||
&eq_entry->razwi_info, &event_mask);
|
||||
error_count = gaudi2_handle_mme_wap_err(hdev, index, event_type, &event_mask);
|
||||
event_mask |= HL_NOTIFIER_EVENT_USER_ENGINE_ERR;
|
||||
break;
|
||||
|
||||
|
|
Loading…
Reference in a new issue