wifi: rtw89: Introduce Time Averaged SAR (TAS) feature
Time Averaged SAR (TAS) tracks the amount of transmit power over a period of time and adjusts the power accordingly. Two thresholds are used to determine when to increase or reduce transmit power: Dynamic Power Reduction (DPR) on/off. Compared to Static SAR, which has a constant transmit power, TAS can improve the user experience or range extension. TAS can be enabled through BIOS, and the driver will evaluate Realtek ACPI DSM with RTW89_ACPI_DSM_FUNC_TAS_EN to determine whether TAS should be enabled. Signed-off-by: Kuan-Chung Chen <damon.chen@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230804053458.31492-1-pkshih@realtek.com
This commit is contained in:
Kuan-Chung Chen
Kalle Valo
parent
b3bfc4fb1e
commit
eb2624f55a
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@ -2682,6 +2682,7 @@ static void rtw89_track_work(struct work_struct *work)
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rtw89_phy_tx_path_div_track(rtwdev);
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rtw89_phy_antdiv_track(rtwdev);
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rtw89_phy_ul_tb_ctrl_track(rtwdev);
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rtw89_tas_track(rtwdev);
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if (rtwdev->lps_enabled && !rtwdev->btc.lps)
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rtw89_enter_lps_track(rtwdev);
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@ -3496,6 +3497,8 @@ int rtw89_core_start(struct rtw89_dev *rtwdev)
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rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true);
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rtw89_mac_update_rts_threshold(rtwdev, RTW89_MAC_0);
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rtw89_tas_reset(rtwdev);
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ret = rtw89_hci_start(rtwdev);
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if (ret) {
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rtw89_err(rtwdev, "failed to start hci\n");
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@ -3612,6 +3615,7 @@ int rtw89_core_init(struct rtw89_dev *rtwdev)
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rtw89_ser_init(rtwdev);
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rtw89_entity_init(rtwdev);
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rtw89_tas_init(rtwdev);
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return 0;
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}
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@ -3690,6 +3690,23 @@ struct rtw89_sar_info {
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};
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};
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enum rtw89_tas_state {
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RTW89_TAS_STATE_DPR_OFF,
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RTW89_TAS_STATE_DPR_ON,
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RTW89_TAS_STATE_DPR_FORBID,
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};
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#define RTW89_TAS_MAX_WINDOW 50
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struct rtw89_tas_info {
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s16 txpwr_history[RTW89_TAS_MAX_WINDOW];
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s32 total_txpwr;
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u8 cur_idx;
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s8 dpr_gap;
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s8 delta;
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enum rtw89_tas_state state;
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bool enable;
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};
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struct rtw89_chanctx_cfg {
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enum rtw89_sub_entity_idx idx;
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};
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@ -4365,6 +4382,7 @@ struct rtw89_dev {
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struct rtw89_regulatory_info regulatory;
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struct rtw89_sar_info sar;
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struct rtw89_tas_info tas;
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struct rtw89_btc btc;
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enum rtw89_ps_mode ps_mode;
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@ -615,6 +615,9 @@ static int rtw89_debug_priv_txpwr_table_get(struct seq_file *m, void *v)
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seq_puts(m, "[SAR]\n");
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rtw89_print_sar(m, rtwdev);
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seq_puts(m, "[TAS]\n");
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rtw89_print_tas(m, rtwdev);
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seq_puts(m, "\n[TX power byrate]\n");
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ret = __print_txpwr_map(m, rtwdev, &__txpwr_map_byr);
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if (ret)
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@ -4109,6 +4109,8 @@
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#define B_TXAGC_BB_OFT GENMASK(31, 16)
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#define B_TXAGC_BB GENMASK(31, 24)
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#define B_TXAGC_RF GENMASK(5, 0)
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#define R_PATH0_TXPWR 0x1C78
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#define B_PATH0_TXPWR GENMASK(8, 0)
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#define R_S0_ADDCK 0x1E00
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#define B_S0_ADDCK_I GENMASK(9, 0)
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#define B_S0_ADDCK_Q GENMASK(19, 10)
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@ -4184,6 +4186,8 @@
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#define R_TXAGC_BB_S1 0x3C60
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#define B_TXAGC_BB_S1_OFT GENMASK(31, 16)
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#define B_TXAGC_BB_S1 GENMASK(31, 24)
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#define R_PATH1_TXPWR 0x3C78
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#define B_PATH1_TXPWR GENMASK(8, 0)
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#define R_S1_ADDCK 0x3E00
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#define B_S1_ADDCK_I GENMASK(9, 0)
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#define B_S1_ADDCK_Q GENMASK(19, 10)
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@ -2,9 +2,16 @@
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/* Copyright(c) 2019-2020 Realtek Corporation
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*/
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#include "acpi.h"
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#include "debug.h"
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#include "phy.h"
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#include "reg.h"
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#include "sar.h"
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#define RTW89_TAS_FACTOR 2 /* unit: 0.25 dBm */
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#define RTW89_TAS_DPR_GAP (1 << RTW89_TAS_FACTOR)
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#define RTW89_TAS_DELTA (2 << RTW89_TAS_FACTOR)
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static enum rtw89_sar_subband rtw89_sar_get_subband(struct rtw89_dev *rtwdev,
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u32 center_freq)
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{
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@ -157,11 +164,35 @@ static s8 rtw89_txpwr_sar_to_mac(struct rtw89_dev *rtwdev, u8 fct, s32 cfg)
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RTW89_SAR_TXPWR_MAC_MAX);
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}
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static s8 rtw89_txpwr_tas_to_sar(const struct rtw89_sar_handler *sar_hdl,
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s8 cfg)
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{
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const u8 fct = sar_hdl->txpwr_factor_sar;
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if (fct > RTW89_TAS_FACTOR)
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return cfg << (fct - RTW89_TAS_FACTOR);
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else
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return cfg >> (RTW89_TAS_FACTOR - fct);
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}
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static s8 rtw89_txpwr_sar_to_tas(const struct rtw89_sar_handler *sar_hdl,
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s8 cfg)
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{
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const u8 fct = sar_hdl->txpwr_factor_sar;
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if (fct > RTW89_TAS_FACTOR)
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return cfg >> (fct - RTW89_TAS_FACTOR);
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else
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return cfg << (RTW89_TAS_FACTOR - fct);
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}
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s8 rtw89_query_sar(struct rtw89_dev *rtwdev)
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{
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const enum rtw89_sar_sources src = rtwdev->sar.src;
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/* its members are protected by rtw89_sar_set_src() */
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const struct rtw89_sar_handler *sar_hdl = &rtw89_sar_handlers[src];
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struct rtw89_tas_info *tas = &rtwdev->tas;
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s8 delta;
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int ret;
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s32 cfg;
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u8 fct;
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@ -175,6 +206,19 @@ s8 rtw89_query_sar(struct rtw89_dev *rtwdev)
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if (ret)
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return RTW89_SAR_TXPWR_MAC_MAX;
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if (tas->enable) {
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switch (tas->state) {
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case RTW89_TAS_STATE_DPR_OFF:
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return RTW89_SAR_TXPWR_MAC_MAX;
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case RTW89_TAS_STATE_DPR_ON:
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delta = rtw89_txpwr_tas_to_sar(sar_hdl, tas->delta);
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cfg -= delta;
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case RTW89_TAS_STATE_DPR_FORBID:
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default:
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break;
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}
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}
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fct = sar_hdl->txpwr_factor_sar;
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return rtw89_txpwr_sar_to_mac(rtwdev, fct, cfg);
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@ -212,6 +256,19 @@ void rtw89_print_sar(struct seq_file *m, struct rtw89_dev *rtwdev)
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seq_printf(m, "config: %d (unit: 1/%lu dBm)\n", cfg, BIT(fct));
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}
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void rtw89_print_tas(struct seq_file *m, struct rtw89_dev *rtwdev)
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{
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struct rtw89_tas_info *tas = &rtwdev->tas;
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if (!tas->enable) {
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seq_puts(m, "no TAS is applied\n");
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return;
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}
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seq_printf(m, "DPR gap: %d\n", tas->dpr_gap);
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seq_printf(m, "TAS delta: %d\n", tas->delta);
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}
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static int rtw89_apply_sar_common(struct rtw89_dev *rtwdev,
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const struct rtw89_sar_cfg_common *sar)
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{
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@ -292,3 +349,143 @@ int rtw89_ops_set_sar_specs(struct ieee80211_hw *hw,
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return rtw89_apply_sar_common(rtwdev, &sar_common);
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}
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static void rtw89_tas_state_update(struct rtw89_dev *rtwdev)
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{
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const enum rtw89_sar_sources src = rtwdev->sar.src;
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/* its members are protected by rtw89_sar_set_src() */
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const struct rtw89_sar_handler *sar_hdl = &rtw89_sar_handlers[src];
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struct rtw89_tas_info *tas = &rtwdev->tas;
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s32 txpwr_avg = tas->total_txpwr / RTW89_TAS_MAX_WINDOW / PERCENT;
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s32 dpr_on_threshold, dpr_off_threshold, cfg;
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enum rtw89_tas_state state = tas->state;
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int ret;
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lockdep_assert_held(&rtwdev->mutex);
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if (src == RTW89_SAR_SOURCE_NONE)
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return;
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ret = sar_hdl->query_sar_config(rtwdev, &cfg);
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if (ret)
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return;
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cfg = rtw89_txpwr_sar_to_tas(sar_hdl, cfg);
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if (tas->delta >= cfg) {
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rtw89_debug(rtwdev, RTW89_DBG_SAR,
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"TAS delta exceed SAR limit\n");
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state = RTW89_TAS_STATE_DPR_FORBID;
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goto out;
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}
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dpr_on_threshold = cfg;
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dpr_off_threshold = cfg - tas->dpr_gap;
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rtw89_debug(rtwdev, RTW89_DBG_SAR,
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"DPR_ON thold: %d, DPR_OFF thold: %d, txpwr_avg: %d\n",
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dpr_on_threshold, dpr_off_threshold, txpwr_avg);
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if (txpwr_avg >= dpr_on_threshold)
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state = RTW89_TAS_STATE_DPR_ON;
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else if (txpwr_avg < dpr_off_threshold)
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state = RTW89_TAS_STATE_DPR_OFF;
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out:
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if (tas->state == state)
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return;
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rtw89_debug(rtwdev, RTW89_DBG_SAR,
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"TAS old state: %d, new state: %d\n", tas->state, state);
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tas->state = state;
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rtw89_core_set_chip_txpwr(rtwdev);
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}
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void rtw89_tas_init(struct rtw89_dev *rtwdev)
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{
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struct rtw89_tas_info *tas = &rtwdev->tas;
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int ret;
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u8 val;
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ret = rtw89_acpi_evaluate_dsm(rtwdev, RTW89_ACPI_DSM_FUNC_TAS_EN, &val);
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if (ret) {
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rtw89_debug(rtwdev, RTW89_DBG_SAR,
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"acpi: cannot get TAS: %d\n", ret);
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return;
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}
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switch (val) {
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case 0:
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tas->enable = false;
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break;
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case 1:
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tas->enable = true;
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break;
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default:
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break;
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}
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if (!tas->enable) {
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rtw89_debug(rtwdev, RTW89_DBG_SAR, "TAS not enable\n");
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return;
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}
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tas->dpr_gap = RTW89_TAS_DPR_GAP;
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tas->delta = RTW89_TAS_DELTA;
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}
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void rtw89_tas_reset(struct rtw89_dev *rtwdev)
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{
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struct rtw89_tas_info *tas = &rtwdev->tas;
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if (!tas->enable)
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return;
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memset(&tas->txpwr_history, 0, sizeof(tas->txpwr_history));
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tas->total_txpwr = 0;
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tas->cur_idx = 0;
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tas->state = RTW89_TAS_STATE_DPR_OFF;
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}
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static const struct rtw89_reg_def txpwr_regs[] = {
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{R_PATH0_TXPWR, B_PATH0_TXPWR},
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{R_PATH1_TXPWR, B_PATH1_TXPWR},
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};
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void rtw89_tas_track(struct rtw89_dev *rtwdev)
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{
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struct rtw89_env_monitor_info *env = &rtwdev->env_monitor;
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const enum rtw89_sar_sources src = rtwdev->sar.src;
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u8 max_nss_num = rtwdev->chip->rf_path_num;
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struct rtw89_tas_info *tas = &rtwdev->tas;
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s16 tmp, txpwr, instant_txpwr = 0;
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u32 val;
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int i;
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if (!tas->enable || src == RTW89_SAR_SOURCE_NONE)
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return;
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if (env->ccx_watchdog_result != RTW89_PHY_ENV_MON_IFS_CLM)
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return;
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for (i = 0; i < max_nss_num; i++) {
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val = rtw89_phy_read32_mask(rtwdev, txpwr_regs[i].addr,
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txpwr_regs[i].mask);
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tmp = sign_extend32(val, 8);
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if (tmp <= 0)
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return;
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instant_txpwr += tmp;
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}
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instant_txpwr /= max_nss_num;
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/* in unit of 0.25 dBm multiply by percentage */
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txpwr = instant_txpwr * env->ifs_clm_tx_ratio;
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tas->total_txpwr += txpwr - tas->txpwr_history[tas->cur_idx];
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tas->txpwr_history[tas->cur_idx] = txpwr;
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rtw89_debug(rtwdev, RTW89_DBG_SAR,
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"instant_txpwr: %d, tx_ratio: %d, txpwr: %d\n",
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instant_txpwr, env->ifs_clm_tx_ratio, txpwr);
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tas->cur_idx = (tas->cur_idx + 1) % RTW89_TAS_MAX_WINDOW;
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rtw89_tas_state_update(rtwdev);
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}
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@ -20,7 +20,11 @@ extern const struct cfg80211_sar_capa rtw89_sar_capa;
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s8 rtw89_query_sar(struct rtw89_dev *rtwdev);
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void rtw89_print_sar(struct seq_file *m, struct rtw89_dev *rtwdev);
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void rtw89_print_tas(struct seq_file *m, struct rtw89_dev *rtwdev);
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int rtw89_ops_set_sar_specs(struct ieee80211_hw *hw,
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const struct cfg80211_sar_specs *sar);
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void rtw89_tas_init(struct rtw89_dev *rtwdev);
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void rtw89_tas_reset(struct rtw89_dev *rtwdev);
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void rtw89_tas_track(struct rtw89_dev *rtwdev);
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#endif
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