mirrors/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-08-28 03:40:04 +00:00
Code Issues Releases Wiki Activity

drm/amd/pm: correct the requirement for umc cdr workaround

Browse source 
The workaround can be applied only with UCLK DPM enabled.
And expand the workaround to more Navi10 SKUs and also
Navi14.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2020-08-26 18:27:09 +08:00 committed by Alex Deucher
parent bb7257b5a8
commit eb5f69e766
1 changed files with 9 additions and 10 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

19
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
View file

@ -2185,19 +2185,18 @@ static int navi10_run_btc(struct smu_context *smu)
return ret;
}
static inline bool navi10_need_umc_cdr_12gbps_workaround(struct amdgpu_device *adev)
static bool navi10_need_umc_cdr_12gbps_workaround(struct smu_context *smu)
{
if (adev->asic_type != CHIP_NAVI10)
struct amdgpu_device *adev = smu->adev;
if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT))
return false;
if (adev->pdev->device == 0x731f &&
(adev->pdev->revision == 0xc2 ||
adev->pdev->revision == 0xc3 ||
adev->pdev->revision == 0xca ||
adev->pdev->revision == 0xcb))
if (adev->asic_type == CHIP_NAVI10 ||
adev->asic_type == CHIP_NAVI14)
return true;
else
return false;
return false;
}
static int navi10_umc_hybrid_cdr_workaround(struct smu_context *smu)
@ -2286,7 +2285,7 @@ static int navi10_disable_umc_cdr_12gbps_workaround(struct smu_context *smu)
uint32_t param;
int ret = 0;
if (!navi10_need_umc_cdr_12gbps_workaround(adev))
if (!navi10_need_umc_cdr_12gbps_workaround(smu))
return 0;
ret = smu_cmn_get_smc_version(smu, NULL, &pmfw_version);