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ARM: dts: Fix the timing property of MSHC controller for exynos4412-odroidx

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This fixes the property of dw-mshc-sdr-timing and dw-mshc-ddr-timing as per
its current binding, it only has two cells.

Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Dongjin Kim 2013-02-04 21:30:15 -08:00 committed by Kukjin Kim
parent e88d5ae61a
commit ec34d52e2a
1 changed files with 2 additions and 2 deletions
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4
arch/arm/boot/dts/exynos4412-odroidx.dts
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@ -49,8 +49,8 @@ mshc@12550000 {
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3 3>;
samsung,dw-mshc-ddr-timing = <1 2 3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 {
reg = <0>;