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drm/amd/display: Wrap OTG disable workaround with FIFO control
[Why] The DIO FIFO will underflow if we turn off the OTG before we turn off the FIFO. Since this happens as part of the OTG workaround and we don't reset the FIFO afterwards we see the error persist. [How] Add disable FIFO before the disable CRTC and enable FIFO after enabling the CRTC. Reviewed-by: Syed Hassan <Syed.Hassan@amd.com> Acked-by: Jasdeep Dhillon <jdhillon@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 10 additions and 1 deletions
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@ -130,11 +130,20 @@ static void dcn314_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state
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if (pipe->top_pipe || pipe->prev_odm_pipe)
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continue;
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if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal))) {
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struct stream_encoder *stream_enc = pipe->stream_res.stream_enc;
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if (disable) {
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if (stream_enc && stream_enc->funcs->disable_fifo)
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pipe->stream_res.stream_enc->funcs->disable_fifo(stream_enc);
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pipe->stream_res.tg->funcs->immediate_disable_crtc(pipe->stream_res.tg);
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reset_sync_context_for_pipe(dc, context, i);
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} else
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} else {
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pipe->stream_res.tg->funcs->enable_crtc(pipe->stream_res.tg);
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if (stream_enc && stream_enc->funcs->enable_fifo)
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pipe->stream_res.stream_enc->funcs->enable_fifo(stream_enc);
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}
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}
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}
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}
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