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sh-pfc: r8a7779: add Ether pin groups
Add Ether RMII/LINK/MAGIC pin groups to R8A7779 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart<laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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1 changed files with 42 additions and 0 deletions
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@ -1640,6 +1640,38 @@ static const unsigned int du1_cde_pins[] = {
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static const unsigned int du1_cde_mux[] = {
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static const unsigned int du1_cde_mux[] = {
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DU1_CDE_MARK
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DU1_CDE_MARK
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};
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};
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/* - Ether ------------------------------------------------------------------ */
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static const unsigned int ether_rmii_pins[] = {
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/*
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* ETH_TXD0, ETH_TXD1, ETH_TX_EN, ETH_REFCLK,
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* ETH_RXD0, ETH_RXD1, ETH_CRS_DV, ETH_RX_ER,
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* ETH_MDIO, ETH_MDC
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*/
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RCAR_GP_PIN(2, 27), RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 18),
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RCAR_GP_PIN(2, 26),
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RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 17),
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RCAR_GP_PIN(2, 19),
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RCAR_GP_PIN(2, 29), RCAR_GP_PIN(2, 28),
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};
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static const unsigned int ether_rmii_mux[] = {
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ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REFCLK_MARK,
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ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_CRS_DV_MARK, ETH_RX_ER_MARK,
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ETH_MDIO_MARK, ETH_MDC_MARK,
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};
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static const unsigned int ether_link_pins[] = {
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/* ETH_LINK */
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RCAR_GP_PIN(2, 24),
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};
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static const unsigned int ether_link_mux[] = {
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ETH_LINK_MARK,
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};
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static const unsigned int ether_magic_pins[] = {
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/* ETH_MAGIC */
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RCAR_GP_PIN(2, 25),
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};
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static const unsigned int ether_magic_mux[] = {
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ETH_MAGIC_MARK,
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};
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/* - HSPI0 ------------------------------------------------------------------ */
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/* - HSPI0 ------------------------------------------------------------------ */
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static const unsigned int hspi0_pins[] = {
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static const unsigned int hspi0_pins[] = {
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/* CLK, CS, RX, TX */
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/* CLK, CS, RX, TX */
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@ -2558,6 +2590,9 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(du1_sync_1),
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SH_PFC_PIN_GROUP(du1_sync_1),
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SH_PFC_PIN_GROUP(du1_oddf),
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SH_PFC_PIN_GROUP(du1_oddf),
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SH_PFC_PIN_GROUP(du1_cde),
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SH_PFC_PIN_GROUP(du1_cde),
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SH_PFC_PIN_GROUP(ether_rmii),
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SH_PFC_PIN_GROUP(ether_link),
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SH_PFC_PIN_GROUP(ether_magic),
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SH_PFC_PIN_GROUP(hspi0),
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SH_PFC_PIN_GROUP(hspi0),
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SH_PFC_PIN_GROUP(hspi1),
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SH_PFC_PIN_GROUP(hspi1),
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SH_PFC_PIN_GROUP(hspi1_b),
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SH_PFC_PIN_GROUP(hspi1_b),
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@ -2703,6 +2738,12 @@ static const char * const du1_groups[] = {
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"du1_cde",
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"du1_cde",
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};
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};
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static const char * const ether_groups[] = {
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"ether_rmii",
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"ether_link",
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"ether_magic",
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};
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static const char * const hspi0_groups[] = {
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static const char * const hspi0_groups[] = {
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"hspi0",
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"hspi0",
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};
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};
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@ -2898,6 +2939,7 @@ static const char * const vin3_groups[] = {
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static const struct sh_pfc_function pinmux_functions[] = {
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static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(du0),
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SH_PFC_FUNCTION(du0),
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SH_PFC_FUNCTION(du1),
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SH_PFC_FUNCTION(du1),
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SH_PFC_FUNCTION(ether),
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SH_PFC_FUNCTION(hspi0),
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SH_PFC_FUNCTION(hspi0),
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SH_PFC_FUNCTION(hspi1),
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SH_PFC_FUNCTION(hspi1),
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SH_PFC_FUNCTION(hspi2),
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SH_PFC_FUNCTION(hspi2),
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