PCI: Add a generic weak pcibios_align_resource()

Multiple architectures define this as a trivial function, and I'm adding
another one as part of the RISC-V port.  Add a __weak version of
pcibios_align_resource() and delete the now-obselete ones in a handful of
ports.

The only functional change should be that a handful of ports used to export
pcibios_fixup_bus().  Only some architectures export this, so I just
dropped it.

Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Palmer Dabbelt 2017-08-02 14:44:50 -05:00 committed by Bjorn Helgaas
parent bccf90d6e0
commit ecf677c8dc
10 changed files with 13 additions and 69 deletions

View file

@ -7,12 +7,3 @@
*/
#include <linux/pci.h>
/*
* We don't have to worry about legacy ISA devices, so nothing to do here
*/
resource_size_t pcibios_align_resource(void *data, const struct resource *res,
resource_size_t size, resource_size_t align)
{
return res->start;
}

View file

@ -22,15 +22,6 @@
#include <linux/pci-ecam.h>
#include <linux/slab.h>
/*
* We don't have to worry about legacy ISA devices, so nothing to do here
*/
resource_size_t pcibios_align_resource(void *data, const struct resource *res,
resource_size_t size, resource_size_t align)
{
return res->start;
}
#ifdef CONFIG_ACPI
/*
* Try to assign the IRQ number when probing a new device

View file

@ -411,13 +411,6 @@ pcibios_disable_device (struct pci_dev *dev)
acpi_pci_irq_disable(dev);
}
resource_size_t
pcibios_align_resource (void *data, const struct resource *res,
resource_size_t size, resource_size_t align)
{
return res->start;
}
/**
* ia64_pci_get_legacy_mem - generic legacy mem routine
* @bus: bus to get legacy memory base address for

View file

@ -823,13 +823,6 @@ void pcibios_setup_bus_devices(struct pci_bus *bus)
* but we want to try to avoid allocating at 0x2900-0x2bff
* which might have be mirrored at 0x0100-0x03ff..
*/
resource_size_t pcibios_align_resource(void *data, const struct resource *res,
resource_size_t size, resource_size_t align)
{
return res->start;
}
EXPORT_SYMBOL(pcibios_align_resource);
int pcibios_add_device(struct pci_dev *dev)
{
dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);

View file

@ -94,9 +94,3 @@ void pcibios_fixup_bus(struct pci_bus *pbus)
}
}
}
resource_size_t pcibios_align_resource(void *data, const struct resource *res,
resource_size_t size, resource_size_t align)
{
return res->start;
}

View file

@ -690,12 +690,6 @@ struct pci_bus *pci_scan_one_pbm(struct pci_pbm_info *pbm,
return bus;
}
resource_size_t pcibios_align_resource(void *data, const struct resource *res,
resource_size_t size, resource_size_t align)
{
return res->start;
}
int pcibios_enable_device(struct pci_dev *dev, int mask)
{
u16 cmd, oldcmd;

View file

@ -746,12 +746,6 @@ static void watchdog_reset() {
}
#endif
resource_size_t pcibios_align_resource(void *data, const struct resource *res,
resource_size_t size, resource_size_t align)
{
return res->start;
}
int pcibios_enable_device(struct pci_dev *pdev, int mask)
{
return 0;

View file

@ -66,16 +66,6 @@ static int pci_scan_flags[TILE_NUM_PCIE];
static struct pci_ops tile_cfg_ops;
/*
* We don't need to worry about the alignment of resources.
*/
resource_size_t pcibios_align_resource(void *data, const struct resource *res,
resource_size_t size, resource_size_t align)
{
return res->start;
}
EXPORT_SYMBOL(pcibios_align_resource);
/*
* Open a FD to the hypervisor PCI device.
*

View file

@ -108,15 +108,6 @@ static struct pci_ops tile_cfg_ops;
/* Mask of CPUs that should receive PCIe interrupts. */
static struct cpumask intr_cpus_map;
/* We don't need to worry about the alignment of resources. */
resource_size_t pcibios_align_resource(void *data, const struct resource *res,
resource_size_t size,
resource_size_t align)
{
return res->start;
}
EXPORT_SYMBOL(pcibios_align_resource);
/*
* Pick a CPU to receive and handle the PCIe interrupts, based on the IRQ #.
* For now, we simply send interrupts to non-dataplane CPUs.

View file

@ -234,6 +234,19 @@ static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
return 0;
}
/*
* We don't have to worry about legacy ISA devices, so nothing to do here.
* This is marked as __weak because multiple architectures define it; it should
* eventually go away.
*/
resource_size_t __weak pcibios_align_resource(void *data,
const struct resource *res,
resource_size_t size,
resource_size_t align)
{
return res->start;
}
static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
int resno, resource_size_t size, resource_size_t align)
{