drm/amdgpu: remove gtt_base_align handling

Not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Christian König 2017-07-06 22:26:05 +02:00 committed by Alex Deucher
parent 3490bdb537
commit ed21c047e9
6 changed files with 3 additions and 8 deletions

View file

@ -564,7 +564,6 @@ struct amdgpu_mc {
unsigned vram_width; unsigned vram_width;
u64 real_vram_size; u64 real_vram_size;
int vram_mtrr; int vram_mtrr;
u64 gtt_base_align;
u64 mc_mask; u64 mc_mask;
const struct firmware *fw; /* MC firmware */ const struct firmware *fw; /* MC firmware */
uint32_t fw_version; uint32_t fw_version;

View file

@ -696,8 +696,8 @@ void amdgpu_gtt_location(struct amdgpu_device *adev, struct amdgpu_mc *mc)
{ {
u64 size_af, size_bf; u64 size_af, size_bf;
size_af = ((adev->mc.mc_mask - mc->vram_end) + mc->gtt_base_align) & ~mc->gtt_base_align; size_af = adev->mc.mc_mask - mc->vram_end;
size_bf = mc->vram_start & ~mc->gtt_base_align; size_bf = mc->vram_start;
if (size_bf > size_af) { if (size_bf > size_af) {
if (mc->gtt_size > size_bf) { if (mc->gtt_size > size_bf) {
dev_warn(adev->dev, "limiting GTT\n"); dev_warn(adev->dev, "limiting GTT\n");
@ -709,7 +709,7 @@ void amdgpu_gtt_location(struct amdgpu_device *adev, struct amdgpu_mc *mc)
dev_warn(adev->dev, "limiting GTT\n"); dev_warn(adev->dev, "limiting GTT\n");
mc->gtt_size = size_af; mc->gtt_size = size_af;
} }
mc->gtt_start = (mc->vram_end + 1 + mc->gtt_base_align) & ~mc->gtt_base_align; mc->gtt_start = mc->vram_end + 1;
} }
mc->gtt_end = mc->gtt_start + mc->gtt_size - 1; mc->gtt_end = mc->gtt_start + mc->gtt_size - 1;
dev_info(adev->dev, "GTT: %lluM 0x%016llX - 0x%016llX\n", dev_info(adev->dev, "GTT: %lluM 0x%016llX - 0x%016llX\n",

View file

@ -228,7 +228,6 @@ static void gmc_v6_0_vram_gtt_location(struct amdgpu_device *adev,
mc->mc_vram_size = 0xFFC0000000ULL; mc->mc_vram_size = 0xFFC0000000ULL;
} }
amdgpu_vram_location(adev, &adev->mc, base); amdgpu_vram_location(adev, &adev->mc, base);
adev->mc.gtt_base_align = 0;
amdgpu_gtt_location(adev, mc); amdgpu_gtt_location(adev, mc);
} }

View file

@ -244,7 +244,6 @@ static void gmc_v7_0_vram_gtt_location(struct amdgpu_device *adev,
mc->mc_vram_size = 0xFFC0000000ULL; mc->mc_vram_size = 0xFFC0000000ULL;
} }
amdgpu_vram_location(adev, &adev->mc, base); amdgpu_vram_location(adev, &adev->mc, base);
adev->mc.gtt_base_align = 0;
amdgpu_gtt_location(adev, mc); amdgpu_gtt_location(adev, mc);
} }

View file

@ -406,7 +406,6 @@ static void gmc_v8_0_vram_gtt_location(struct amdgpu_device *adev,
mc->mc_vram_size = 0xFFC0000000ULL; mc->mc_vram_size = 0xFFC0000000ULL;
} }
amdgpu_vram_location(adev, &adev->mc, base); amdgpu_vram_location(adev, &adev->mc, base);
adev->mc.gtt_base_align = 0;
amdgpu_gtt_location(adev, mc); amdgpu_gtt_location(adev, mc);
} }

View file

@ -420,7 +420,6 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
if (!amdgpu_sriov_vf(adev)) if (!amdgpu_sriov_vf(adev))
base = mmhub_v1_0_get_fb_location(adev); base = mmhub_v1_0_get_fb_location(adev);
amdgpu_vram_location(adev, &adev->mc, base); amdgpu_vram_location(adev, &adev->mc, base);
adev->mc.gtt_base_align = 0;
amdgpu_gtt_location(adev, mc); amdgpu_gtt_location(adev, mc);
/* base offset of vram pages */ /* base offset of vram pages */
if (adev->flags & AMD_IS_APU) if (adev->flags & AMD_IS_APU)