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x86/mce: Drop AMD-specific "DEFERRED" case from Intel severity rule list

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Way back in v3.19 Intel and AMD shared the same machine check severity
grading code. So it made sense to add a case for AMD DEFERRED errors in
commit

  e3480271f5 ("x86, mce, severity: Extend the the mce_severity mechanism to handle UCNA/DEFERRED error")

But later in v4.2 AMD switched to a separate grading function in
commit

  bf80bbd7dc ("x86/mce: Add an AMD severities-grading function")

Belatedly drop the DEFERRED case from the Intel rule list.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20200930021313.31810-3-tony.luck@intel.com
This commit is contained in:
Tony Luck 2020-09-29 19:13:13 -07:00 committed by Borislav Petkov
parent fd258dc444
commit ed9705e4ad
1 changed files with 0 additions and 4 deletions
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4
arch/x86/kernel/cpu/mce/severity.c
View file

@ -96,10 +96,6 @@ static struct severity {
PANIC, "In kernel and no restart IP", PANIC, "In kernel and no restart IP",
EXCP, KERNEL_RECOV, MCGMASK(MCG_STATUS_RIPV, 0) EXCP, KERNEL_RECOV, MCGMASK(MCG_STATUS_RIPV, 0)
), ),
MCESEV(
DEFERRED, "Deferred error",
NOSER, MASK(MCI_STATUS_UC|MCI_STATUS_DEFERRED|MCI_STATUS_POISON, MCI_STATUS_DEFERRED)
),
MCESEV( MCESEV(
KEEP, "Corrected error", KEEP, "Corrected error",
NOSER, BITCLR(MCI_STATUS_UC) NOSER, BITCLR(MCI_STATUS_UC)