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dmaengine: xgene-dma: Fix overwritting DMA tx ring
This patch fixes an over flow issue with the TX ring descriptor. Each descriptor is 32B in size and an operation requires 2 of these descriptors. Signed-off-by: Rameshwar Prasad Sahu <rsahu@apm.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
parent
214fc4e423
commit
ee08b59d47
1 changed files with 11 additions and 26 deletions
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@ -59,7 +59,6 @@
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#define XGENE_DMA_RING_MEM_RAM_SHUTDOWN 0xD070
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#define XGENE_DMA_RING_BLK_MEM_RDY 0xD074
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#define XGENE_DMA_RING_BLK_MEM_RDY_VAL 0xFFFFFFFF
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#define XGENE_DMA_RING_DESC_CNT(v) (((v) & 0x0001FFFE) >> 1)
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#define XGENE_DMA_RING_ID_GET(owner, num) (((owner) << 6) | (num))
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#define XGENE_DMA_RING_DST_ID(v) ((1 << 10) | (v))
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#define XGENE_DMA_RING_CMD_OFFSET 0x2C
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@ -379,14 +378,6 @@ static u8 xgene_dma_encode_xor_flyby(u32 src_cnt)
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return flyby_type[src_cnt];
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}
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static u32 xgene_dma_ring_desc_cnt(struct xgene_dma_ring *ring)
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{
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u32 __iomem *cmd_base = ring->cmd_base;
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u32 ring_state = ioread32(&cmd_base[1]);
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return XGENE_DMA_RING_DESC_CNT(ring_state);
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}
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static void xgene_dma_set_src_buffer(__le64 *ext8, size_t *len,
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dma_addr_t *paddr)
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{
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@ -659,15 +650,12 @@ static void xgene_dma_clean_running_descriptor(struct xgene_dma_chan *chan,
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dma_pool_free(chan->desc_pool, desc, desc->tx.phys);
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}
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static int xgene_chan_xfer_request(struct xgene_dma_ring *ring,
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static void xgene_chan_xfer_request(struct xgene_dma_chan *chan,
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struct xgene_dma_desc_sw *desc_sw)
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{
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struct xgene_dma_ring *ring = &chan->tx_ring;
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struct xgene_dma_desc_hw *desc_hw;
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/* Check if can push more descriptor to hw for execution */
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if (xgene_dma_ring_desc_cnt(ring) > (ring->slots - 2))
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return -EBUSY;
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/* Get hw descriptor from DMA tx ring */
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desc_hw = &ring->desc_hw[ring->head];
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@ -694,11 +682,13 @@ static int xgene_chan_xfer_request(struct xgene_dma_ring *ring,
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memcpy(desc_hw, &desc_sw->desc2, sizeof(*desc_hw));
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}
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/* Increment the pending transaction count */
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chan->pending += ((desc_sw->flags &
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XGENE_DMA_FLAG_64B_DESC) ? 2 : 1);
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/* Notify the hw that we have descriptor ready for execution */
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iowrite32((desc_sw->flags & XGENE_DMA_FLAG_64B_DESC) ?
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2 : 1, ring->cmd);
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return 0;
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}
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/**
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@ -710,7 +700,6 @@ static int xgene_chan_xfer_request(struct xgene_dma_ring *ring,
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static void xgene_chan_xfer_ld_pending(struct xgene_dma_chan *chan)
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{
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struct xgene_dma_desc_sw *desc_sw, *_desc_sw;
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int ret;
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/*
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* If the list of pending descriptors is empty, then we
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@ -735,18 +724,13 @@ static void xgene_chan_xfer_ld_pending(struct xgene_dma_chan *chan)
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if (chan->pending >= chan->max_outstanding)
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return;
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ret = xgene_chan_xfer_request(&chan->tx_ring, desc_sw);
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if (ret)
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return;
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xgene_chan_xfer_request(chan, desc_sw);
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/*
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* Delete this element from ld pending queue and append it to
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* ld running queue
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*/
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list_move_tail(&desc_sw->node, &chan->ld_running);
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/* Increment the pending transaction count */
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chan->pending++;
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}
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}
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@ -821,7 +805,8 @@ static void xgene_dma_cleanup_descriptors(struct xgene_dma_chan *chan)
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* Decrement the pending transaction count
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* as we have processed one
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*/
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chan->pending--;
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chan->pending -= ((desc_sw->flags &
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XGENE_DMA_FLAG_64B_DESC) ? 2 : 1);
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/*
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* Delete this node from ld running queue and append it to
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@ -1485,7 +1470,7 @@ static int xgene_dma_create_chan_rings(struct xgene_dma_chan *chan)
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tx_ring->id, tx_ring->num, tx_ring->desc_vaddr);
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/* Set the max outstanding request possible to this channel */
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chan->max_outstanding = rx_ring->slots;
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chan->max_outstanding = tx_ring->slots;
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return ret;
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}
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