ARM: ixp4xx: Delete NAS100D boardfiles
The NAS100D is now completely migrated to use device tree exclusively so delete the boardfiles. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Linus Walleij
parent
06ce83a4dd
commit
ee2f116b64
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@ -110,15 +110,6 @@ config ARCH_PRPMC1100
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PrPCM1100 Processor Mezanine Module. For more information on
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this platform, see <file:Documentation/arm/ixp4xx.rst>.
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config MACH_NAS100D
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bool
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prompt "NAS100D"
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depends on IXP4XX_PCI_LEGACY
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help
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Say 'Y' here if you want your kernel to support Iomega's
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NAS 100d device. For more information on this platform,
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see http://www.nslu2-linux.org/wiki/NAS100d/HomePage
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config MACH_DSMG600
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bool
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prompt "D-Link DSM-G600 RevA"
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@ -15,7 +15,6 @@ obj-pci-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o
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obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o
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obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o
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obj-pci-$(CONFIG_MACH_MICCPT) += miccpt-pci.o
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obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o
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obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o
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obj-pci-$(CONFIG_MACH_GATEWAY7001) += gateway7001-pci.o
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obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o
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@ -32,7 +31,6 @@ obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o
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obj-$(CONFIG_MACH_DEVIXP) += omixp-setup.o
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obj-$(CONFIG_MACH_MICCPT) += omixp-setup.o
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obj-$(CONFIG_MACH_MIC256) += omixp-setup.o
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obj-$(CONFIG_MACH_NAS100D) += nas100d-setup.o
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obj-$(CONFIG_MACH_DSMG600) += dsmg600-setup.o
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obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o
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obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o
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@ -1,73 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* arch/arm/mach-ixp4xx/nas100d-pci.c
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*
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* NAS 100d board-level PCI initialization
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*
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* based on ixdp425-pci.c:
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* Copyright (C) 2002 Intel Corporation.
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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*
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* Maintainer: http://www.nslu2-linux.org/
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*/
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <asm/mach/pci.h>
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#include <asm/mach-types.h>
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#include "irqs.h"
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#define MAX_DEV 3
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#define IRQ_LINES 3
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/* PCI controller GPIO to IRQ pin mappings */
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#define INTA 11
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#define INTB 10
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#define INTC 9
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#define INTD 8
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#define INTE 7
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void __init nas100d_pci_preinit(void)
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{
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW);
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ixp4xx_pci_preinit();
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}
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static int __init nas100d_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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static int pci_irq_table[MAX_DEV][IRQ_LINES] = {
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{ IXP4XX_GPIO_IRQ(INTA), -1, -1 },
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{ IXP4XX_GPIO_IRQ(INTB), -1, -1 },
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{ IXP4XX_GPIO_IRQ(INTC), IXP4XX_GPIO_IRQ(INTD),
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IXP4XX_GPIO_IRQ(INTE) },
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};
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if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
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return pci_irq_table[slot - 1][pin - 1];
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return -1;
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}
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struct hw_pci __initdata nas100d_pci = {
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.nr_controllers = 1,
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.ops = &ixp4xx_ops,
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.preinit = nas100d_pci_preinit,
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.setup = ixp4xx_setup,
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.map_irq = nas100d_map_irq,
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};
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int __init nas100d_pci_init(void)
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{
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if (machine_is_nas100d())
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pci_common_init(&nas100d_pci);
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return 0;
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}
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subsys_initcall(nas100d_pci_init);
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@ -1,353 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* arch/arm/mach-ixp4xx/nas100d-setup.c
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*
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* NAS 100d board-setup
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*
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* Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
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*
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* based on ixdp425-setup.c:
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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* based on nas100d-power.c:
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* Copyright (C) 2005 Tower Technologies
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* based on nas100d-io.c
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* Copyright (C) 2004 Karen Spearel
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*
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* Author: Alessandro Zummo <a.zummo@towertech.it>
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* Author: Rod Whitby <rod@whitby.id.au>
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* Maintainers: http://www.nslu2-linux.org/
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*
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*/
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#include <linux/gpio.h>
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#include <linux/if_ether.h>
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#include <linux/irq.h>
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#include <linux/jiffies.h>
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#include <linux/timer.h>
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#include <linux/serial.h>
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#include <linux/serial_8250.h>
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#include <linux/leds.h>
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#include <linux/reboot.h>
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#include <linux/i2c.h>
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#include <linux/gpio/machine.h>
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#include <linux/io.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <mach/hardware.h>
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#include "irqs.h"
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#define NAS100D_SDA_PIN 5
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#define NAS100D_SCL_PIN 6
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/* Buttons */
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#define NAS100D_PB_GPIO 14 /* power button */
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#define NAS100D_RB_GPIO 4 /* reset button */
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/* Power control */
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#define NAS100D_PO_GPIO 12 /* power off */
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/* LEDs */
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#define NAS100D_LED_WLAN_GPIO 0
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#define NAS100D_LED_DISK_GPIO 3
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#define NAS100D_LED_PWR_GPIO 15
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static struct flash_platform_data nas100d_flash_data = {
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.map_name = "cfi_probe",
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.width = 2,
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};
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static struct resource nas100d_flash_resource = {
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device nas100d_flash = {
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.name = "IXP4XX-Flash",
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.id = 0,
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.dev.platform_data = &nas100d_flash_data,
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.num_resources = 1,
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.resource = &nas100d_flash_resource,
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};
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static struct i2c_board_info __initdata nas100d_i2c_board_info [] = {
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{
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I2C_BOARD_INFO("pcf8563", 0x51),
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},
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};
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static struct gpio_led nas100d_led_pins[] = {
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{
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.name = "nas100d:green:wlan",
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.gpio = NAS100D_LED_WLAN_GPIO,
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.active_low = true,
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},
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{
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.name = "nas100d:blue:power", /* (off=flashing) */
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.gpio = NAS100D_LED_PWR_GPIO,
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.active_low = true,
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},
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{
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.name = "nas100d:yellow:disk",
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.gpio = NAS100D_LED_DISK_GPIO,
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.active_low = true,
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},
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};
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static struct gpio_led_platform_data nas100d_led_data = {
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.num_leds = ARRAY_SIZE(nas100d_led_pins),
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.leds = nas100d_led_pins,
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};
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static struct platform_device nas100d_leds = {
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.name = "leds-gpio",
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.id = -1,
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.dev.platform_data = &nas100d_led_data,
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};
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static struct gpiod_lookup_table nas100d_i2c_gpiod_table = {
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.dev_id = "i2c-gpio.0",
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.table = {
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GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NAS100D_SDA_PIN,
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NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
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GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NAS100D_SCL_PIN,
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NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
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},
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};
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static struct platform_device nas100d_i2c_gpio = {
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.name = "i2c-gpio",
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.id = 0,
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.dev = {
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.platform_data = NULL,
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},
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};
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static struct resource nas100d_uart_resources[] = {
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{
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.start = IXP4XX_UART1_BASE_PHYS,
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.end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IXP4XX_UART2_BASE_PHYS,
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.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct plat_serial8250_port nas100d_uart_data[] = {
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{
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.mapbase = IXP4XX_UART1_BASE_PHYS,
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.membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART1,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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},
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{
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.mapbase = IXP4XX_UART2_BASE_PHYS,
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.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART2,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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},
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{ }
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};
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static struct platform_device nas100d_uart = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev.platform_data = nas100d_uart_data,
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.num_resources = 2,
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.resource = nas100d_uart_resources,
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};
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/* Built-in 10/100 Ethernet MAC interfaces */
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static struct resource nas100d_eth_resources[] = {
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{
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.start = IXP4XX_EthB_BASE_PHYS,
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.end = IXP4XX_EthB_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct eth_plat_info nas100d_plat_eth[] = {
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{
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.phy = 0,
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.rxq = 3,
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.txreadyq = 20,
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}
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};
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static struct platform_device nas100d_eth[] = {
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{
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.name = "ixp4xx_eth",
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.id = IXP4XX_ETH_NPEB,
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.dev.platform_data = nas100d_plat_eth,
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.num_resources = ARRAY_SIZE(nas100d_eth_resources),
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.resource = nas100d_eth_resources,
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}
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};
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static struct platform_device *nas100d_devices[] __initdata = {
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&nas100d_i2c_gpio,
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&nas100d_flash,
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&nas100d_leds,
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&nas100d_eth[0],
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};
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static void nas100d_power_off(void)
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{
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/* This causes the box to drop the power and go dead. */
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/* enable the pwr cntl gpio and assert power off */
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gpio_direction_output(NAS100D_PO_GPIO, 1);
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}
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/* This is used to make sure the power-button pusher is serious. The button
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* must be held until the value of this counter reaches zero.
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*/
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static int power_button_countdown;
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/* Must hold the button down for at least this many counts to be processed */
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#define PBUTTON_HOLDDOWN_COUNT 4 /* 2 secs */
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static void nas100d_power_handler(struct timer_list *unused);
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static DEFINE_TIMER(nas100d_power_timer, nas100d_power_handler);
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static void nas100d_power_handler(struct timer_list *unused)
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{
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/* This routine is called twice per second to check the
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* state of the power button.
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*/
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if (gpio_get_value(NAS100D_PB_GPIO)) {
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/* IO Pin is 1 (button pushed) */
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if (power_button_countdown > 0)
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power_button_countdown--;
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} else {
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/* Done on button release, to allow for auto-power-on mods. */
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if (power_button_countdown == 0) {
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/* Signal init to do the ctrlaltdel action,
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* this will bypass init if it hasn't started
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* and do a kernel_restart.
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*/
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ctrl_alt_del();
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/* Change the state of the power LED to "blink" */
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gpio_set_value(NAS100D_LED_PWR_GPIO, 0);
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} else {
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power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
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}
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}
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mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));
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}
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static irqreturn_t nas100d_reset_handler(int irq, void *dev_id)
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{
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/* This is the paper-clip reset, it shuts the machine down directly. */
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machine_power_off();
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return IRQ_HANDLED;
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}
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static int __init nas100d_gpio_init(void)
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{
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if (!machine_is_nas100d())
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return 0;
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/*
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* The power button on the Iomega NAS100d is on GPIO 14, but
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* it cannot handle interrupts on that GPIO line. So we'll
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* have to poll it with a kernel timer.
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*/
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/* Request the power off GPIO */
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gpio_request(NAS100D_PO_GPIO, "power off");
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/* Make sure that the power button GPIO is set up as an input */
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gpio_request(NAS100D_PB_GPIO, "power button");
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gpio_direction_input(NAS100D_PB_GPIO);
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/* Set the initial value for the power button IRQ handler */
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power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
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mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));
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return 0;
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}
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device_initcall(nas100d_gpio_init);
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static void __init nas100d_init(void)
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{
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uint8_t __iomem *f;
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int i;
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ixp4xx_sys_init();
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nas100d_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
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nas100d_flash_resource.end =
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IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
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gpiod_add_lookup_table(&nas100d_i2c_gpiod_table);
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i2c_register_board_info(0, nas100d_i2c_board_info,
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ARRAY_SIZE(nas100d_i2c_board_info));
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/*
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* This is only useful on a modified machine, but it is valuable
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* to have it first in order to see debug messages, and so that
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* it does *not* get removed if platform_add_devices fails!
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*/
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(void)platform_device_register(&nas100d_uart);
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platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices));
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pm_power_off = nas100d_power_off;
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if (request_irq(gpio_to_irq(NAS100D_RB_GPIO), &nas100d_reset_handler,
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IRQF_TRIGGER_LOW, "NAS100D reset button", NULL) < 0) {
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printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
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gpio_to_irq(NAS100D_RB_GPIO));
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}
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/*
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* Map in a portion of the flash and read the MAC address.
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* Since it is stored in BE in the flash itself, we need to
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* byteswap it if we're in LE mode.
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*/
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f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x1000000);
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if (f) {
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for (i = 0; i < 6; i++)
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#ifdef __ARMEB__
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nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + i);
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#else
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nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + (i^3));
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#endif
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iounmap(f);
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}
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printk(KERN_INFO "NAS100D: Using MAC address %pM for port 0\n",
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nas100d_plat_eth[0].hwaddr);
|
||||
|
||||
}
|
||||
|
||||
MACHINE_START(NAS100D, "Iomega NAS 100d")
|
||||
/* Maintainer: www.nslu2-linux.org */
|
||||
.atag_offset = 0x100,
|
||||
.map_io = ixp4xx_map_io,
|
||||
.init_early = ixp4xx_init_early,
|
||||
.init_irq = ixp4xx_init_irq,
|
||||
.init_time = ixp4xx_timer_init,
|
||||
.init_machine = nas100d_init,
|
||||
#if defined(CONFIG_PCI)
|
||||
.dma_zone_size = SZ_64M,
|
||||
#endif
|
||||
.restart = ixp4xx_restart,
|
||||
MACHINE_END
|
||||
Loading…
Reference in New Issue