mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-26 19:00:25 +00:00
Changes needed to drop legacy booting support for some
omap3 boards. Note that that these are based on a merge of the following for the dependencies: - v3.12-rc5 for fixes to pinctrl mask - omap-for-v3.13/dt-signed to avoid pointless merge conflicts - omap-for-v3.13/quirk-signed for legacy pdata handling -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.15 (GNU/Linux) iQIcBAABAgAGBQJSYXP6AAoJEBvUPslcq6Vz2fcQAJyOHsHVNs3vxpB2CbFWzgl7 D4tFyL3pHlq9+p/VJwthUoY6WIiWIgEcKoLACD39w+EQ3XThcG1coc0TFj8IPxTr QOCn5sMu1Z11OKhegcTEhySp8GUrmtNFplMCNK3jPsLjYLdVxOopjziO7qcCd49O 7pjCPfHoU5NkAACcm2nmE2uAlYP4STpGDnzwsi/aHZZQSIni2MslyeN9LeXdwBrN of29pw8gTA0TVQSXemq0oLnMlEYzLd0ICG2SjSmJ/tWX0vXwjQl4fdDkqHwumPxo wyjVw744AuXy0WC7PZluQxadd0jEptAs7XSsYgTGOvececWtmZEJDzPGamfabhlX V6aHIqwVyDOGJXjQkUuaNuD5eO+afDwyaeVOla8YgE9ugwEs3xDXfHdks9nC8n4I OAk+hXfEBPpLQgItkP+Q3EnYIUJVh4ew5oWCHVfXM8ssKTH6bblWFVtJXP1eyC+0 qkcHOHMR5oK4p+YAmRoRkeMG+Fe2pzT7dWOli4lPVXre1MAd/DQM5+NvgMaveW/E S8YHj5mRR7a13OAgOWtscjUz+hWE+WIBkCyFuo0w4+RMShKtsiuC+FJirsQpCxLp aFuwGG8ixT0F4WL/9Ao4iVmIOt15YIW3ND9ubHrPL2Ll0nGPwSmJSb+B7OgSFwqo G3r4/CSgwljeUq4FZox4 =9Iuv -----END PGP SIGNATURE----- Merge tag 'omap-for-v3.13/board-removal-signed-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt From Tony Lindgren: Changes needed to drop legacy booting support for some omap3 boards. Note that that these are based on a merge of the following for the dependencies: - v3.12-rc5 for fixes to pinctrl mask - omap-for-v3.13/dt-signed to avoid pointless merge conflicts - omap-for-v3.13/quirk-signed for legacy pdata handling * tag 'omap-for-v3.13/board-removal-signed-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (125 commits) ARM: OMAP2+: remove legacy support for IGEP boards ARM: OMAP2+: Remove legacy support for zoom platforms ARM: OMAP2+: Remove legacy booting support for omap3 EVM ARM: OMAP2: delete board-rm680 ARM: dts: add minimal DT support for Nokia N950 & N9 phones ARM: dts: Add basic support for zoom3 ARM: dts: Add basic support for TMDSEVM3730 (Mistral AM/DM37x EVM) ARM: dts: Add common support for omap3-evm ARM: dts: Shared file for omap GPMC connected smsc911x +Linux 3.12-rc5 Signed-off-by: Kevin Hilman <khilman@linaro.org>
This commit is contained in:
commit
ee4383e0c1
172 changed files with 1536 additions and 3157 deletions
|
@ -28,6 +28,7 @@ ALC269/270/275/276/28x/29x
|
|||
alc269-dmic Enable ALC269(VA) digital mic workaround
|
||||
alc271-dmic Enable ALC271X digital mic workaround
|
||||
inv-dmic Inverted internal mic workaround
|
||||
headset-mic Indicates a combined headset (headphone+mic) jack
|
||||
lenovo-dock Enables docking station I/O for some Lenovos
|
||||
dell-headset-multi Headset jack, which can also be used as mic-in
|
||||
dell-headset-dock Headset jack (without mic-in), and also dock I/O
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||||
|
|
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@ -929,7 +929,7 @@ M: Javier Martinez Canillas <javier@dowhile0.org>
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|||
L: linux-omap@vger.kernel.org
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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F: arch/arm/mach-omap2/board-igep0020.c
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F: arch/arm/boot/dts/omap3-igep*
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||||
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ARM/INCOME PXA270 SUPPORT
|
||||
M: Marek Vasut <marek.vasut@gmail.com>
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2
Makefile
2
Makefile
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@ -1,7 +1,7 @@
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|||
VERSION = 3
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||||
PATCHLEVEL = 12
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SUBLEVEL = 0
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||||
EXTRAVERSION = -rc4
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EXTRAVERSION = -rc5
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NAME = One Giant Leap for Frogkind
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# *DOCUMENTATION*
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@ -102,7 +102,7 @@ static int genregs_set(struct task_struct *target,
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REG_IGNORE_ONE(pad2);
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REG_IN_CHUNK(callee, efa, cregs); /* callee_regs[r25..r13] */
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REG_IGNORE_ONE(efa); /* efa update invalid */
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REG_IN_ONE(stop_pc, &ptregs->ret); /* stop_pc: PC update */
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REG_IGNORE_ONE(stop_pc); /* PC updated via @ret */
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return ret;
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}
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|
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@ -296,10 +296,15 @@ archprepare:
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# Convert bzImage to zImage
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bzImage: zImage
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zImage Image xipImage bootpImage uImage: vmlinux
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BOOT_TARGETS = zImage Image xipImage bootpImage uImage
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INSTALL_TARGETS = zinstall uinstall install
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PHONY += bzImage $(BOOT_TARGETS) $(INSTALL_TARGETS)
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$(BOOT_TARGETS): vmlinux
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$(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
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zinstall uinstall install: vmlinux
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$(INSTALL_TARGETS):
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$(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@
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%.dtb: | scripts
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@ -95,24 +95,24 @@ initrd:
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@test "$(INITRD)" != "" || \
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(echo You must specify INITRD; exit -1)
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install: $(obj)/Image
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$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
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install:
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$(CONFIG_SHELL) $(srctree)/$(src)/install.sh "$(KERNELRELEASE)" \
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$(obj)/Image System.map "$(INSTALL_PATH)"
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||||
|
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zinstall: $(obj)/zImage
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$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
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zinstall:
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$(CONFIG_SHELL) $(srctree)/$(src)/install.sh "$(KERNELRELEASE)" \
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$(obj)/zImage System.map "$(INSTALL_PATH)"
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|
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uinstall: $(obj)/uImage
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$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
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uinstall:
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||||
$(CONFIG_SHELL) $(srctree)/$(src)/install.sh "$(KERNELRELEASE)" \
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$(obj)/uImage System.map "$(INSTALL_PATH)"
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||||
|
||||
zi:
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||||
$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
|
||||
$(CONFIG_SHELL) $(srctree)/$(src)/install.sh "$(KERNELRELEASE)" \
|
||||
$(obj)/zImage System.map "$(INSTALL_PATH)"
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||||
|
||||
i:
|
||||
$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
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||||
$(CONFIG_SHELL) $(srctree)/$(src)/install.sh "$(KERNELRELEASE)" \
|
||||
$(obj)/Image System.map "$(INSTALL_PATH)"
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||||
|
||||
subdir- := bootp compressed dts
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||||
|
|
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@ -174,11 +174,15 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
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omap3-devkit8000.dtb \
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omap3-beagle-xm.dtb \
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||||
omap3-evm.dtb \
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||||
omap3-evm-37xx.dtb \
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||||
omap3-n900.dtb \
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omap3-n9.dtb \
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omap3-n950.dtb \
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||||
omap3-tobi.dtb \
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||||
omap3-gta04.dtb \
|
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omap3-igep0020.dtb \
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omap3-igep0030.dtb \
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omap3-zoom3.dtb \
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omap4-panda.dtb \
|
||||
omap4-panda-a4.dtb \
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||||
omap4-panda-es.dtb \
|
||||
|
|
|
@ -96,6 +96,11 @@ timer {
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|||
<1 14 0xf08>,
|
||||
<1 11 0xf08>,
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||||
<1 10 0xf08>;
|
||||
/* Unfortunately we need this since some versions of U-Boot
|
||||
* on Exynos don't set the CNTFRQ register, so we need the
|
||||
* value from DT.
|
||||
*/
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
|
||||
mct@101C0000 {
|
||||
|
|
52
arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
Normal file
52
arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
Normal file
|
@ -0,0 +1,52 @@
|
|||
/*
|
||||
* Common file for GPMC connected smsc911x on omaps
|
||||
*
|
||||
* Note that the board specifc DTS file needs to specify
|
||||
* ranges, pinctrl, reg, interrupt parent and interrupts.
|
||||
*/
|
||||
|
||||
/ {
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||||
vddvario: regulator-vddvario {
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compatible = "regulator-fixed";
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regulator-name = "vddvario";
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regulator-always-on;
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||||
};
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||||
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vdd33a: regulator-vdd33a {
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||||
compatible = "regulator-fixed";
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||||
regulator-name = "vdd33a";
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regulator-always-on;
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||||
};
|
||||
};
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||||
|
||||
&gpmc {
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||||
ethernet@gpmc {
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compatible = "smsc,lan9221", "smsc,lan9115";
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bank-width = <2>;
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gpmc,mux-add-data;
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||||
gpmc,cs-on-ns = <0>;
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||||
gpmc,cs-rd-off-ns = <186>;
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||||
gpmc,cs-wr-off-ns = <186>;
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gpmc,adv-on-ns = <12>;
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gpmc,adv-rd-off-ns = <48>;
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||||
gpmc,adv-wr-off-ns = <48>;
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||||
gpmc,oe-on-ns = <54>;
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gpmc,oe-off-ns = <168>;
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gpmc,we-on-ns = <54>;
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gpmc,we-off-ns = <168>;
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gpmc,rd-cycle-ns = <186>;
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gpmc,wr-cycle-ns = <186>;
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||||
gpmc,access-ns = <114>;
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gpmc,page-burst-access-ns = <6>;
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gpmc,bus-turnaround-ns = <12>;
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gpmc,cycle2cycle-delay-ns = <18>;
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gpmc,wr-data-mux-bus-ns = <90>;
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gpmc,wr-access-ns = <186>;
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gpmc,cycle2cycle-samecsen;
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gpmc,cycle2cycle-diffcsen;
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vmmc-supply = <&vddvario>;
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||||
vmmc_aux-supply = <&vdd33a>;
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reg-io-width = <4>;
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smsc,save-mac-address;
|
||||
};
|
||||
};
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33
arch/arm/boot/dts/omap-zoom-common.dtsi
Normal file
33
arch/arm/boot/dts/omap-zoom-common.dtsi
Normal file
|
@ -0,0 +1,33 @@
|
|||
/*
|
||||
* Common features on the Zoom debug board
|
||||
*/
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||||
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#include "omap-gpmc-smsc911x.dtsi"
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||||
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&gpmc {
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ranges = <3 0 0x10000000 0x00000400>,
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<7 0 0x2c000000 0x01000000>;
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/*
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* Four port TL16CP754C serial port on GPMC,
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* they probably share the same GPIO IRQ
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* REVISIT: Add timing support from slls644g.pdf
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*/
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8250@3,0 {
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compatible = "ns16550a";
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reg = <3 0 0x100>;
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bank-width = <2>;
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reg-shift = <1>;
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reg-io-width = <1>;
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interrupt-parent = <&gpio4>;
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interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
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clock-frequency = <1843200>;
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current-speed = <115200>;
|
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};
|
||||
|
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ethernet@gpmc {
|
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reg = <7 0 0xff>;
|
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interrupt-parent = <&gpio5>;
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interrupts = <30 IRQ_TYPE_LEVEL_LOW>; /* gpio158 */
|
||||
};
|
||||
};
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@ -11,7 +11,7 @@
|
|||
|
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/ {
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model = "TI OMAP3 BeagleBoard xM";
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compatible = "ti,omap3-beagle-xm", "ti,omap3-beagle", "ti,omap3";
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compatible = "ti,omap3-beagle-xm", "ti,omap36xx", "ti,omap3";
|
||||
|
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cpus {
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cpu@0 {
|
||||
|
|
151
arch/arm/boot/dts/omap3-evm-37xx.dts
Normal file
151
arch/arm/boot/dts/omap3-evm-37xx.dts
Normal file
|
@ -0,0 +1,151 @@
|
|||
/*
|
||||
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
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/dts-v1/;
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||||
#include "omap36xx.dtsi"
|
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#include "omap3-evm-common.dtsi"
|
||||
|
||||
|
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/ {
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model = "TI OMAP37XX EVM (TMDSEVM3730)";
|
||||
compatible = "ti,omap3-evm-37xx", "ti,omap36xx";
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||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
wl12xx_vmmc: wl12xx_vmmc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wl12xx_gpio>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
|
||||
0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
|
||||
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
|
||||
0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
|
||||
0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
|
||||
0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
|
||||
0x120 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
|
||||
0x122 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
|
||||
0x124 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
|
||||
0x126 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
/* NOTE: Clocked externally, needs INPUT also for sdmmc2_clk.sdmmc2_clk */
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
|
||||
0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
|
||||
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
|
||||
0x12e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
|
||||
0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x16e (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
|
||||
wl12xx_gpio: pinmux_wl12xx_gpio {
|
||||
pinctrl-single,pins = <
|
||||
0x150 (PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */
|
||||
0x14e (PIN_INPUT | MUX_MODE4) /* uart1_rts.gpio_149 */
|
||||
>;
|
||||
};
|
||||
|
||||
smsc911x_pins: pinmux_smsc911x_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <0 0 0x00000000 0x20000000>,
|
||||
<5 0 0x2c000000 0x01000000>;
|
||||
|
||||
nand@0,0 {
|
||||
linux,mtd-name= "hynix,h8kds0un0mer-4em";
|
||||
reg = <0 0 0>;
|
||||
nand-bus-width = <16>;
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <44>;
|
||||
gpmc,cs-wr-off-ns = <44>;
|
||||
gpmc,adv-on-ns = <6>;
|
||||
gpmc,adv-rd-off-ns = <34>;
|
||||
gpmc,adv-wr-off-ns = <44>;
|
||||
gpmc,we-off-ns = <40>;
|
||||
gpmc,oe-off-ns = <54>;
|
||||
gpmc,access-ns = <64>;
|
||||
gpmc,rd-cycle-ns = <82>;
|
||||
gpmc,wr-cycle-ns = <82>;
|
||||
gpmc,wr-access-ns = <40>;
|
||||
gpmc,wr-data-mux-bus-ns = <0>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "X-Loader";
|
||||
reg = <0 0x80000>;
|
||||
};
|
||||
partition@0x80000 {
|
||||
label = "U-Boot";
|
||||
reg = <0x80000 0x1c0000>;
|
||||
};
|
||||
partition@0x1c0000 {
|
||||
label = "Environment";
|
||||
reg = <0x240000 0x40000>;
|
||||
};
|
||||
partition@0x280000 {
|
||||
label = "Kernel";
|
||||
reg = <0x280000 0x500000>;
|
||||
};
|
||||
partition@0x780000 {
|
||||
label = "Filesystem";
|
||||
reg = <0x780000 0x1f880000>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@gpmc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&smsc911x_pins>;
|
||||
};
|
||||
};
|
94
arch/arm/boot/dts/omap3-evm-common.dtsi
Normal file
94
arch/arm/boot/dts/omap3-evm-common.dtsi
Normal file
|
@ -0,0 +1,94 @@
|
|||
/*
|
||||
* Common support for omap3 EVM boards
|
||||
*/
|
||||
|
||||
#include "omap-gpmc-smsc911x.dtsi"
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&vcc>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
ledb {
|
||||
label = "omap3evm::ledb";
|
||||
gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
};
|
||||
|
||||
wl12xx_vmmc: wl12xx_vmmc {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vwl1271";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
gpio = <&gpio5 22 0>; /* gpio150 */
|
||||
startup-delay-us = <70000>;
|
||||
enable-active-high;
|
||||
vin-supply = <&vmmc2>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <2600000>;
|
||||
|
||||
twl: twl@48 {
|
||||
reg = <0x48>;
|
||||
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
|
||||
interrupt-parent = <&intc>;
|
||||
};
|
||||
};
|
||||
|
||||
#include "twl4030.dtsi"
|
||||
#include "twl4030_omap3.dtsi"
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
|
||||
/*
|
||||
* TVP5146 Video decoder-in for analog input support.
|
||||
*/
|
||||
tvp5146@5c {
|
||||
compatible = "ti,tvp5146m2";
|
||||
reg = <0x5c>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
vmmc-supply = <&vmmc1>;
|
||||
vmmc_aux-supply = <&vsim>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
vmmc-supply = <&wl12xx_vmmc>;
|
||||
non-removable;
|
||||
bus-width = <4>;
|
||||
cap-power-off-card;
|
||||
};
|
||||
|
||||
&twl_gpio {
|
||||
ti,use-leds;
|
||||
};
|
||||
|
||||
&usb_otg_hs {
|
||||
interface-type = <0>;
|
||||
usb-phy = <&usb2_phy>;
|
||||
mode = <3>;
|
||||
power = <50>;
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ethernet@gpmc {
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <16 8>;
|
||||
reg = <5 0 0xff>;
|
||||
};
|
||||
};
|
|
@ -8,68 +8,14 @@
|
|||
/dts-v1/;
|
||||
|
||||
#include "omap34xx.dtsi"
|
||||
#include "omap3-evm-common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "TI OMAP3 EVM (OMAP3530, AM/DM37x)";
|
||||
model = "TI OMAP35XX EVM (TMDSEVM3530)";
|
||||
compatible = "ti,omap3-evm", "ti,omap3";
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&vcc>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
ledb {
|
||||
label = "omap3evm::ledb";
|
||||
gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <2600000>;
|
||||
|
||||
twl: twl@48 {
|
||||
reg = <0x48>;
|
||||
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
|
||||
interrupt-parent = <&intc>;
|
||||
};
|
||||
};
|
||||
|
||||
#include "twl4030.dtsi"
|
||||
#include "twl4030_omap3.dtsi"
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
|
||||
/*
|
||||
* TVP5146 Video decoder-in for analog input support.
|
||||
*/
|
||||
tvp5146@5c {
|
||||
compatible = "ti,tvp5146m2";
|
||||
reg = <0x5c>;
|
||||
};
|
||||
};
|
||||
|
||||
&twl_gpio {
|
||||
ti,use-leds;
|
||||
};
|
||||
|
||||
&usb_otg_hs {
|
||||
interface-type = <0>;
|
||||
usb-phy = <&usb2_phy>;
|
||||
mode = <3>;
|
||||
power = <50>;
|
||||
};
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
*/
|
||||
|
||||
#include "omap3-igep.dtsi"
|
||||
#include "omap-gpmc-smsc911x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "IGEPv2";
|
||||
|
@ -44,18 +45,6 @@ user2 {
|
|||
};
|
||||
};
|
||||
|
||||
vddvario: regulator-vddvario {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vddvario";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd33a: regulator-vdd33a {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd33a";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* HS USB Port 1 Power */
|
||||
hsusb1_power: hsusb1_power_reg {
|
||||
compatible = "regulator-fixed";
|
||||
|
@ -169,42 +158,12 @@ partition@780000 {
|
|||
};
|
||||
};
|
||||
|
||||
ethernet@5,0 {
|
||||
ethernet@gpmc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&smsc911x_pins>;
|
||||
compatible = "smsc,lan9221", "smsc,lan9115";
|
||||
reg = <5 0 0xff>;
|
||||
bank-width = <2>;
|
||||
|
||||
gpmc,mux-add-data;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <186>;
|
||||
gpmc,cs-wr-off-ns = <186>;
|
||||
gpmc,adv-on-ns = <12>;
|
||||
gpmc,adv-rd-off-ns = <48>;
|
||||
gpmc,adv-wr-off-ns = <48>;
|
||||
gpmc,oe-on-ns = <54>;
|
||||
gpmc,oe-off-ns = <168>;
|
||||
gpmc,we-on-ns = <54>;
|
||||
gpmc,we-off-ns = <168>;
|
||||
gpmc,rd-cycle-ns = <186>;
|
||||
gpmc,wr-cycle-ns = <186>;
|
||||
gpmc,access-ns = <114>;
|
||||
gpmc,page-burst-access-ns = <6>;
|
||||
gpmc,bus-turnaround-ns = <12>;
|
||||
gpmc,cycle2cycle-delay-ns = <18>;
|
||||
gpmc,wr-data-mux-bus-ns = <90>;
|
||||
gpmc,wr-access-ns = <186>;
|
||||
gpmc,cycle2cycle-samecsen;
|
||||
gpmc,cycle2cycle-diffcsen;
|
||||
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
|
||||
vmmc-supply = <&vddvario>;
|
||||
vmmc_aux-supply = <&vdd33a>;
|
||||
reg-io-width = <4>;
|
||||
|
||||
smsc,save-mac-address;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
18
arch/arm/boot/dts/omap3-n9.dts
Normal file
18
arch/arm/boot/dts/omap3-n9.dts
Normal file
|
@ -0,0 +1,18 @@
|
|||
/*
|
||||
* omap3-n9.dts - Device Tree file for Nokia N9
|
||||
*
|
||||
* Written by: Aaro Koskinen <aaro.koskinen@iki.fi>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "omap3-n950-n9.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Nokia N9";
|
||||
compatible = "nokia,omap3-n9", "ti,omap3";
|
||||
};
|
174
arch/arm/boot/dts/omap3-n950-n9.dtsi
Normal file
174
arch/arm/boot/dts/omap3-n950-n9.dtsi
Normal file
|
@ -0,0 +1,174 @@
|
|||
/*
|
||||
* omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff)
|
||||
*
|
||||
* Written by: Aaro Koskinen <aaro.koskinen@iki.fi>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include "omap36xx.dtsi"
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&vcc>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
|
||||
vemmc: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VEMMC";
|
||||
regulator-min-microvolt = <2900000>;
|
||||
regulator-max-microvolt = <2900000>;
|
||||
gpio = <&gpio5 29 0>; /* gpio line 157 */
|
||||
startup-delay-us = <150>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
|
||||
0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
|
||||
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
|
||||
0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
|
||||
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
|
||||
0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <2900000>;
|
||||
|
||||
twl: twl@48 {
|
||||
reg = <0x48>;
|
||||
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
|
||||
interrupt-parent = <&intc>;
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "twl4030.dtsi"
|
||||
|
||||
&twl {
|
||||
compatible = "ti,twl5031";
|
||||
};
|
||||
|
||||
&twl_gpio {
|
||||
ti,pullups = <0x000001>; /* BIT(0) */
|
||||
ti,pulldowns = <0x008106>; /* BIT(1) | BIT(2) | BIT(8) | BIT(15) */
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
vmmc-supply = <&vemmc>;
|
||||
bus-width = <4>;
|
||||
ti,non-removable;
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usb_otg_hs {
|
||||
interface-type = <0>;
|
||||
usb-phy = <&usb2_phy>;
|
||||
phys = <&usb2_phy>;
|
||||
phy-names = "usb2-phy";
|
||||
mode = <3>;
|
||||
power = <50>;
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <0 0 0x04000000 0x20000000>;
|
||||
|
||||
onenand@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0 0 0x20000000>;
|
||||
|
||||
gpmc,sync-read;
|
||||
gpmc,sync-write;
|
||||
gpmc,burst-length = <16>;
|
||||
gpmc,burst-read;
|
||||
gpmc,burst-wrap;
|
||||
gpmc,burst-write;
|
||||
gpmc,device-width = <2>;
|
||||
gpmc,mux-add-data = <2>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <87>;
|
||||
gpmc,cs-wr-off-ns = <87>;
|
||||
gpmc,adv-on-ns = <0>;
|
||||
gpmc,adv-rd-off-ns = <10>;
|
||||
gpmc,adv-wr-off-ns = <10>;
|
||||
gpmc,oe-on-ns = <15>;
|
||||
gpmc,oe-off-ns = <87>;
|
||||
gpmc,we-on-ns = <0>;
|
||||
gpmc,we-off-ns = <87>;
|
||||
gpmc,rd-cycle-ns = <112>;
|
||||
gpmc,wr-cycle-ns = <112>;
|
||||
gpmc,access-ns = <81>;
|
||||
gpmc,page-burst-access-ns = <15>;
|
||||
gpmc,bus-turnaround-ns = <0>;
|
||||
gpmc,cycle2cycle-delay-ns = <0>;
|
||||
gpmc,wait-monitoring-ns = <0>;
|
||||
gpmc,clk-activation-ns = <5>;
|
||||
gpmc,wr-data-mux-bus-ns = <30>;
|
||||
gpmc,wr-access-ns = <81>;
|
||||
gpmc,sync-clk-ps = <15000>;
|
||||
|
||||
/*
|
||||
* MTD partition table corresponding to Nokia's MeeGo 1.2
|
||||
* Harmattan release.
|
||||
*/
|
||||
partition@0 {
|
||||
label = "bootloader";
|
||||
reg = <0x00000000 0x00100000>;
|
||||
};
|
||||
partition@1 {
|
||||
label = "config";
|
||||
reg = <0x00100000 0x002c0000>;
|
||||
};
|
||||
partition@2 {
|
||||
label = "kernel";
|
||||
reg = <0x003c0000 0x01000000>;
|
||||
};
|
||||
partition@3 {
|
||||
label = "log";
|
||||
reg = <0x013c0000 0x00200000>;
|
||||
};
|
||||
partition@4 {
|
||||
label = "var";
|
||||
reg = <0x015c0000 0x1ca40000>;
|
||||
};
|
||||
partition@5 {
|
||||
label = "moslo";
|
||||
reg = <0x1e000000 0x02000000>;
|
||||
};
|
||||
partition@6 {
|
||||
label = "omap2-onenand";
|
||||
reg = <0x00000000 0x20000000>;
|
||||
};
|
||||
};
|
||||
};
|
18
arch/arm/boot/dts/omap3-n950.dts
Normal file
18
arch/arm/boot/dts/omap3-n950.dts
Normal file
|
@ -0,0 +1,18 @@
|
|||
/*
|
||||
* omap3-n950.dts - Device Tree file for Nokia N950
|
||||
*
|
||||
* Written by: Aaro Koskinen <aaro.koskinen@iki.fi>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "omap3-n950-n9.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Nokia N950";
|
||||
compatible = "nokia,omap3-n950", "ti,omap3";
|
||||
};
|
217
arch/arm/boot/dts/omap3-zoom3.dts
Normal file
217
arch/arm/boot/dts/omap3-zoom3.dts
Normal file
|
@ -0,0 +1,217 @@
|
|||
/*
|
||||
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "omap36xx.dtsi"
|
||||
#include "omap-zoom-common.dtsi"
|
||||
|
||||
/ {
|
||||
model = "TI Zoom3";
|
||||
compatible = "ti,omap3-zoom3", "ti,omap36xx", "ti,omap3";
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&vcc>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
|
||||
vddvario: regulator-vddvario {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vddvario";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd33a: regulator-vdd33a {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd33a";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
wl12xx_vmmc: wl12xx_vmmc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wl12xx_gpio>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vwl1271";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
gpio = <&gpio4 5 0>; /* gpio101 */
|
||||
startup-delay-us = <70000>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
/* REVISIT: twl gpio0 is mmc0_cd */
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
|
||||
0x116 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
|
||||
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
|
||||
0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
|
||||
0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
|
||||
0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
|
||||
0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
|
||||
0x12c (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
|
||||
0x12e (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
0x130 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
|
||||
0x132 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
|
||||
0x134 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat4.sdmmc2_dat4 */
|
||||
0x136 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat5.sdmmc2_dat5 */
|
||||
0x138 (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat6.sdmmc2_dat6 */
|
||||
0x13a (PIN_INPUT | MUX_MODE0) /* sdmmc2_dat7.sdmmc2_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc3_pins: pinmux_mmc3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x168 (PIN_INPUT | MUX_MODE4) /* mcbsp1_clkx.gpio_162 WLAN IRQ */
|
||||
0x1a0 (PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
|
||||
0x5a8 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */
|
||||
0x5b4 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d4.sdmmc3_dat0 */
|
||||
0x5b6 (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d5.sdmmc3_dat1 */
|
||||
0x5b8 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d6.sdmmc3_dat2 */
|
||||
0x5b2 (PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d3.sdmmc3_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins: pinmux_uart1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x150 (PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
|
||||
0x14e (PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
|
||||
0x152 (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
|
||||
0x14c (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x144 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
|
||||
0x146 (PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
|
||||
0x14a (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
|
||||
0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x16a (PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
|
||||
0x16c (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
|
||||
0x16e (WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
|
||||
/* wl12xx GPIO output for WLAN_EN */
|
||||
wl12xx_gpio: pinmux_wl12xx_gpio {
|
||||
pinctrl-single,pins = <
|
||||
0xea (PIN_OUTPUT| MUX_MODE4) /* cam_d2.gpio_101 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_wkup {
|
||||
wlan_host_wkup: pinmux_wlan_host_wkup_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1a (PIN_INPUT_PULLUP | MUX_MODE4) /* sys_clkout1.gpio_10 WLAN_HOST_WKUP */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <2600000>;
|
||||
|
||||
twl: twl@48 {
|
||||
reg = <0x48>;
|
||||
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
|
||||
interrupt-parent = <&intc>;
|
||||
};
|
||||
};
|
||||
|
||||
#include "twl4030.dtsi"
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
|
||||
/*
|
||||
* TVP5146 Video decoder-in for analog input support.
|
||||
*/
|
||||
tvp5146@5c {
|
||||
compatible = "ti,tvp5146m2";
|
||||
reg = <0x5c>;
|
||||
};
|
||||
};
|
||||
|
||||
&twl_gpio {
|
||||
ti,use-leds;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
vmmc-supply = <&vmmc1>;
|
||||
vmmc_aux-supply = <&vsim>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
};
|
||||
/*
|
||||
&mmc2 {
|
||||
vmmc-supply = <&vmmc2>;
|
||||
ti,non-removable;
|
||||
bus-width = <8>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
};
|
||||
*/
|
||||
&mmc3 {
|
||||
vmmc-supply = <&wl12xx_vmmc>;
|
||||
non-removable;
|
||||
bus-width = <4>;
|
||||
cap-power-off-card;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc3_pins>;
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usb_otg_hs {
|
||||
interface-type = <0>;
|
||||
usb-phy = <&usb2_phy>;
|
||||
mode = <3>;
|
||||
power = <50>;
|
||||
};
|
|
@ -110,7 +110,7 @@ omap3_pmx_core: pinmux@48002030 {
|
|||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
pinctrl-single,register-width = <16>;
|
||||
pinctrl-single,function-mask = <0x7f1f>;
|
||||
pinctrl-single,function-mask = <0xff1f>;
|
||||
};
|
||||
|
||||
omap3_pmx_wkup: pinmux@48002a00 {
|
||||
|
@ -121,7 +121,7 @@ omap3_pmx_wkup: pinmux@48002a00 {
|
|||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
pinctrl-single,register-width = <16>;
|
||||
pinctrl-single,function-mask = <0x7f1f>;
|
||||
pinctrl-single,function-mask = <0xff1f>;
|
||||
};
|
||||
|
||||
gpio1: gpio@48310000 {
|
||||
|
|
|
@ -20,6 +20,20 @@
|
|||
# $4 - default install path (blank if root directory)
|
||||
#
|
||||
|
||||
verify () {
|
||||
if [ ! -f "$1" ]; then
|
||||
echo "" 1>&2
|
||||
echo " *** Missing file: $1" 1>&2
|
||||
echo ' *** You need to run "make" before "make install".' 1>&2
|
||||
echo "" 1>&2
|
||||
exit 1
|
||||
fi
|
||||
}
|
||||
|
||||
# Make sure the files actually exist
|
||||
verify "$2"
|
||||
verify "$3"
|
||||
|
||||
# User may have a custom install script
|
||||
if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi
|
||||
if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
|
||||
static __always_inline bool arch_static_branch(struct static_key *key)
|
||||
{
|
||||
asm goto("1:\n\t"
|
||||
asm_volatile_goto("1:\n\t"
|
||||
JUMP_LABEL_NOP "\n\t"
|
||||
".pushsection __jump_table, \"aw\"\n\t"
|
||||
".word 1b, %l[l_yes], %c0\n\t"
|
||||
|
|
|
@ -256,12 +256,6 @@ config MACH_OVERO
|
|||
default y
|
||||
select OMAP_PACKAGE_CBB
|
||||
|
||||
config MACH_OMAP3EVM
|
||||
bool "OMAP 3530 EVM board"
|
||||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select OMAP_PACKAGE_CBB
|
||||
|
||||
config MACH_OMAP3517EVM
|
||||
bool "OMAP3517/ AM3517 EVM board"
|
||||
depends on ARCH_OMAP3
|
||||
|
@ -310,33 +304,12 @@ config MACH_NOKIA_N8X0
|
|||
select MACH_NOKIA_N810_WIMAX
|
||||
select OMAP_PACKAGE_ZAC
|
||||
|
||||
config MACH_NOKIA_RM680
|
||||
bool "Nokia N950 (RM-680) / N9 (RM-696) phones"
|
||||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select MACH_NOKIA_RM696
|
||||
select OMAP_PACKAGE_CBB
|
||||
|
||||
config MACH_NOKIA_RX51
|
||||
bool "Nokia N900 (RX-51) phone"
|
||||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select OMAP_PACKAGE_CBB
|
||||
|
||||
config MACH_OMAP_ZOOM2
|
||||
bool "OMAP3 Zoom2 board"
|
||||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select OMAP_PACKAGE_CBB
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
|
||||
config MACH_OMAP_ZOOM3
|
||||
bool "OMAP3630 Zoom3 board"
|
||||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select OMAP_PACKAGE_CBP
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
|
||||
config MACH_CM_T35
|
||||
bool "CompuLab CM-T35/CM-T3730 modules"
|
||||
depends on ARCH_OMAP3
|
||||
|
@ -353,31 +326,12 @@ config MACH_CM_T3517
|
|||
config MACH_CM_T3730
|
||||
bool
|
||||
|
||||
config MACH_IGEP0020
|
||||
bool "IGEP v2 board"
|
||||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select OMAP_PACKAGE_CBB
|
||||
|
||||
config MACH_IGEP0030
|
||||
bool "IGEP OMAP3 module"
|
||||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select MACH_IGEP0020
|
||||
select OMAP_PACKAGE_CBB
|
||||
|
||||
config MACH_SBC3530
|
||||
bool "OMAP3 SBC STALKER board"
|
||||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select OMAP_PACKAGE_CUS
|
||||
|
||||
config MACH_OMAP_3630SDP
|
||||
bool "OMAP3630 SDP board"
|
||||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select OMAP_PACKAGE_CBP
|
||||
|
||||
config MACH_TI8168EVM
|
||||
bool "TI8168 Evaluation Module"
|
||||
depends on SOC_TI81XX
|
||||
|
|
|
@ -242,26 +242,14 @@ obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o
|
|||
obj-$(CONFIG_MACH_OMAP3530_LV_SOM) += board-omap3logic.o
|
||||
obj-$(CONFIG_MACH_OMAP3_TORPEDO) += board-omap3logic.o
|
||||
obj-$(CONFIG_MACH_OVERO) += board-overo.o
|
||||
obj-$(CONFIG_MACH_OMAP3EVM) += board-omap3evm.o
|
||||
obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o
|
||||
obj-$(CONFIG_MACH_OMAP_3430SDP) += board-3430sdp.o
|
||||
obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o
|
||||
obj-$(CONFIG_MACH_NOKIA_RM680) += board-rm680.o sdram-nokia.o
|
||||
obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o sdram-nokia.o
|
||||
obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-peripherals.o
|
||||
obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-video.o
|
||||
obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom.o board-zoom-peripherals.o
|
||||
obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom-display.o
|
||||
obj-$(CONFIG_MACH_OMAP_ZOOM2) += board-zoom-debugboard.o
|
||||
obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom.o board-zoom-peripherals.o
|
||||
obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom-display.o
|
||||
obj-$(CONFIG_MACH_OMAP_ZOOM3) += board-zoom-debugboard.o
|
||||
obj-$(CONFIG_MACH_OMAP_3630SDP) += board-3630sdp.o
|
||||
obj-$(CONFIG_MACH_OMAP_3630SDP) += board-zoom-peripherals.o
|
||||
obj-$(CONFIG_MACH_OMAP_3630SDP) += board-zoom-display.o
|
||||
obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o
|
||||
obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o
|
||||
obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o
|
||||
obj-$(CONFIG_MACH_TOUCHBOOK) += board-omap3touchbook.o
|
||||
|
||||
obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o
|
||||
|
|
|
@ -1,225 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2009 Texas Instruments Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/mtd/nand.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "gpmc-smc91x.h"
|
||||
|
||||
#include "board-zoom.h"
|
||||
|
||||
#include "board-flash.h"
|
||||
#include "mux.h"
|
||||
#include "sdram-hynix-h8mbx00u0mer-0em.h"
|
||||
|
||||
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
|
||||
|
||||
static struct omap_smc91x_platform_data board_smc91x_data = {
|
||||
.cs = 3,
|
||||
.flags = GPMC_MUX_ADD_DATA | IORESOURCE_IRQ_LOWLEVEL,
|
||||
};
|
||||
|
||||
static void __init board_smc91x_init(void)
|
||||
{
|
||||
board_smc91x_data.gpio_irq = 158;
|
||||
gpmc_smc91x_init(&board_smc91x_data);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
static inline void board_smc91x_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
#endif /* defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) */
|
||||
|
||||
static void enable_board_wakeup_source(void)
|
||||
{
|
||||
/* T2 interrupt line (keypad) */
|
||||
omap_mux_init_signal("sys_nirq",
|
||||
OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
|
||||
}
|
||||
|
||||
static struct usbhs_phy_data phy_data[] __initdata = {
|
||||
{
|
||||
.port = 1,
|
||||
.reset_gpio = 126,
|
||||
.vcc_gpio = -EINVAL,
|
||||
},
|
||||
{
|
||||
.port = 2,
|
||||
.reset_gpio = 61,
|
||||
.vcc_gpio = -EINVAL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
|
||||
|
||||
.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
|
||||
.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
static struct omap_board_mux board_mux[] __initdata = {
|
||||
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
||||
};
|
||||
#endif
|
||||
|
||||
/*
|
||||
* SDP3630 CS organization
|
||||
* See also the Switch S8 settings in the comments.
|
||||
*/
|
||||
static char chip_sel_sdp[][GPMC_CS_NUM] = {
|
||||
{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
|
||||
{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
|
||||
{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
|
||||
};
|
||||
|
||||
static struct mtd_partition sdp_nor_partitions[] = {
|
||||
/* bootloader (U-Boot, etc) in first sector */
|
||||
{
|
||||
.name = "Bootloader-NOR",
|
||||
.offset = 0,
|
||||
.size = SZ_256K,
|
||||
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
||||
},
|
||||
/* bootloader params in the next sector */
|
||||
{
|
||||
.name = "Params-NOR",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = SZ_256K,
|
||||
.mask_flags = 0,
|
||||
},
|
||||
/* kernel */
|
||||
{
|
||||
.name = "Kernel-NOR",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = SZ_2M,
|
||||
.mask_flags = 0
|
||||
},
|
||||
/* file system */
|
||||
{
|
||||
.name = "Filesystem-NOR",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
.mask_flags = 0
|
||||
}
|
||||
};
|
||||
|
||||
static struct mtd_partition sdp_onenand_partitions[] = {
|
||||
{
|
||||
.name = "X-Loader-OneNAND",
|
||||
.offset = 0,
|
||||
.size = 4 * (64 * 2048),
|
||||
.mask_flags = MTD_WRITEABLE /* force read-only */
|
||||
},
|
||||
{
|
||||
.name = "U-Boot-OneNAND",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 2 * (64 * 2048),
|
||||
.mask_flags = MTD_WRITEABLE /* force read-only */
|
||||
},
|
||||
{
|
||||
.name = "U-Boot Environment-OneNAND",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 1 * (64 * 2048),
|
||||
},
|
||||
{
|
||||
.name = "Kernel-OneNAND",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 16 * (64 * 2048),
|
||||
},
|
||||
{
|
||||
.name = "File System-OneNAND",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct mtd_partition sdp_nand_partitions[] = {
|
||||
/* All the partition sizes are listed in terms of NAND block size */
|
||||
{
|
||||
.name = "X-Loader-NAND",
|
||||
.offset = 0,
|
||||
.size = 4 * (64 * 2048),
|
||||
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
||||
},
|
||||
{
|
||||
.name = "U-Boot-NAND",
|
||||
.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
|
||||
.size = 10 * (64 * 2048),
|
||||
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
||||
},
|
||||
{
|
||||
.name = "Boot Env-NAND",
|
||||
|
||||
.offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
|
||||
.size = 6 * (64 * 2048),
|
||||
},
|
||||
{
|
||||
.name = "Kernel-NAND",
|
||||
.offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
|
||||
.size = 40 * (64 * 2048),
|
||||
},
|
||||
{
|
||||
.name = "File System - NAND",
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
.offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
|
||||
},
|
||||
};
|
||||
|
||||
static struct flash_partitions sdp_flash_partitions[] = {
|
||||
{
|
||||
.parts = sdp_nor_partitions,
|
||||
.nr_parts = ARRAY_SIZE(sdp_nor_partitions),
|
||||
},
|
||||
{
|
||||
.parts = sdp_onenand_partitions,
|
||||
.nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
|
||||
},
|
||||
{
|
||||
.parts = sdp_nand_partitions,
|
||||
.nr_parts = ARRAY_SIZE(sdp_nand_partitions),
|
||||
},
|
||||
};
|
||||
|
||||
static void __init omap_sdp_init(void)
|
||||
{
|
||||
omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
|
||||
zoom_peripherals_init();
|
||||
omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
|
||||
h8mbx00u0mer0em_sdrc_params);
|
||||
zoom_display_init();
|
||||
board_smc91x_init();
|
||||
board_flash_init(sdp_flash_partitions, chip_sel_sdp, NAND_BUSWIDTH_16);
|
||||
enable_board_wakeup_source();
|
||||
|
||||
usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
|
||||
usbhs_init(&usbhs_bdata);
|
||||
}
|
||||
|
||||
MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
|
||||
.atag_offset = 0x100,
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3630_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.handle_irq = omap3_intc_handle_irq,
|
||||
.init_machine = omap_sdp_init,
|
||||
.init_late = omap3630_init_late,
|
||||
.init_time = omap3_sync32k_timer_init,
|
||||
.restart = omap3xxx_restart,
|
||||
MACHINE_END
|
|
@ -95,6 +95,24 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
|
|||
.restart = omap3xxx_restart,
|
||||
MACHINE_END
|
||||
|
||||
static const char *omap36xx_boards_compat[] __initdata = {
|
||||
"ti,omap36xx",
|
||||
NULL,
|
||||
};
|
||||
|
||||
DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3630_init_early,
|
||||
.init_irq = omap_intc_of_init,
|
||||
.handle_irq = omap3_intc_handle_irq,
|
||||
.init_machine = omap_generic_init,
|
||||
.init_late = omap3_init_late,
|
||||
.init_time = omap3_sync32k_timer_init,
|
||||
.dt_compat = omap36xx_boards_compat,
|
||||
.restart = omap3xxx_restart,
|
||||
MACHINE_END
|
||||
|
||||
static const char *omap3_gp_boards_compat[] __initdata = {
|
||||
"ti,omap3-beagle",
|
||||
"timll,omap3-devkit8000",
|
||||
|
|
|
@ -1,683 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2009 Integration Software and Electronic Engineering.
|
||||
*
|
||||
* Modified from mach-omap2/board-generic.c
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/usb/phy.h>
|
||||
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
#include <linux/i2c/twl.h>
|
||||
#include <linux/mmc/host.h>
|
||||
|
||||
#include <linux/mtd/nand.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#include <video/omapdss.h>
|
||||
#include <video/omap-panel-data.h>
|
||||
#include <linux/platform_data/mtd-onenand-omap2.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "gpmc.h"
|
||||
#include "mux.h"
|
||||
#include "hsmmc.h"
|
||||
#include "sdram-numonyx-m65kxxxxam.h"
|
||||
#include "common-board-devices.h"
|
||||
#include "board-flash.h"
|
||||
#include "control.h"
|
||||
#include "gpmc-onenand.h"
|
||||
#include "dss-common.h"
|
||||
|
||||
#define IGEP2_SMSC911X_CS 5
|
||||
#define IGEP2_SMSC911X_GPIO 176
|
||||
#define IGEP2_GPIO_USBH_NRESET 24
|
||||
#define IGEP2_GPIO_LED0_GREEN 26
|
||||
#define IGEP2_GPIO_LED0_RED 27
|
||||
#define IGEP2_GPIO_LED1_RED 28
|
||||
|
||||
#define IGEP2_RB_GPIO_WIFI_NPD 94
|
||||
#define IGEP2_RB_GPIO_WIFI_NRESET 95
|
||||
#define IGEP2_RB_GPIO_BT_NRESET 137
|
||||
#define IGEP2_RC_GPIO_WIFI_NPD 138
|
||||
#define IGEP2_RC_GPIO_WIFI_NRESET 139
|
||||
#define IGEP2_RC_GPIO_BT_NRESET 137
|
||||
|
||||
#define IGEP3_GPIO_LED0_GREEN 54
|
||||
#define IGEP3_GPIO_LED0_RED 53
|
||||
#define IGEP3_GPIO_LED1_RED 16
|
||||
#define IGEP3_GPIO_USBH_NRESET 183
|
||||
|
||||
#define IGEP_SYSBOOT_MASK 0x1f
|
||||
#define IGEP_SYSBOOT_NAND 0x0f
|
||||
#define IGEP_SYSBOOT_ONENAND 0x10
|
||||
|
||||
/*
|
||||
* IGEP2 Hardware Revision Table
|
||||
*
|
||||
* --------------------------------------------------------------------------
|
||||
* | Id. | Hw Rev. | HW0 (28) | WIFI_NPD | WIFI_NRESET | BT_NRESET |
|
||||
* --------------------------------------------------------------------------
|
||||
* | 0 | B | high | gpio94 | gpio95 | - |
|
||||
* | 0 | B/C (B-compatible) | high | gpio94 | gpio95 | gpio137 |
|
||||
* | 1 | C | low | gpio138 | gpio139 | gpio137 |
|
||||
* --------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#define IGEP2_BOARD_HWREV_B 0
|
||||
#define IGEP2_BOARD_HWREV_C 1
|
||||
#define IGEP3_BOARD_HWREV 2
|
||||
|
||||
static u8 hwrev;
|
||||
|
||||
static void __init igep2_get_revision(void)
|
||||
{
|
||||
u8 ret;
|
||||
|
||||
if (machine_is_igep0030()) {
|
||||
hwrev = IGEP3_BOARD_HWREV;
|
||||
return;
|
||||
}
|
||||
|
||||
omap_mux_init_gpio(IGEP2_GPIO_LED1_RED, OMAP_PIN_INPUT);
|
||||
|
||||
if (gpio_request_one(IGEP2_GPIO_LED1_RED, GPIOF_IN, "GPIO_HW0_REV")) {
|
||||
pr_warning("IGEP2: Could not obtain gpio GPIO_HW0_REV\n");
|
||||
pr_err("IGEP2: Unknown Hardware Revision\n");
|
||||
return;
|
||||
}
|
||||
|
||||
ret = gpio_get_value(IGEP2_GPIO_LED1_RED);
|
||||
if (ret == 0) {
|
||||
pr_info("IGEP2: Hardware Revision C (B-NON compatible)\n");
|
||||
hwrev = IGEP2_BOARD_HWREV_C;
|
||||
} else if (ret == 1) {
|
||||
pr_info("IGEP2: Hardware Revision B/C (B compatible)\n");
|
||||
hwrev = IGEP2_BOARD_HWREV_B;
|
||||
} else {
|
||||
pr_err("IGEP2: Unknown Hardware Revision\n");
|
||||
hwrev = -1;
|
||||
}
|
||||
|
||||
gpio_free(IGEP2_GPIO_LED1_RED);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
|
||||
defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) || \
|
||||
defined(CONFIG_MTD_NAND_OMAP2) || \
|
||||
defined(CONFIG_MTD_NAND_OMAP2_MODULE)
|
||||
|
||||
#define ONENAND_MAP 0x20000000
|
||||
|
||||
/* NAND04GR4E1A ( x2 Flash built-in COMBO POP MEMORY )
|
||||
* Since the device is equipped with two DataRAMs, and two-plane NAND
|
||||
* Flash memory array, these two component enables simultaneous program
|
||||
* of 4KiB. Plane1 has only even blocks such as block0, block2, block4
|
||||
* while Plane2 has only odd blocks such as block1, block3, block5.
|
||||
* So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048)
|
||||
*/
|
||||
|
||||
static struct mtd_partition igep_flash_partitions[] = {
|
||||
{
|
||||
.name = "X-Loader",
|
||||
.offset = 0,
|
||||
.size = 2 * (64*(2*2048))
|
||||
},
|
||||
{
|
||||
.name = "U-Boot",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 6 * (64*(2*2048)),
|
||||
},
|
||||
{
|
||||
.name = "Environment",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 2 * (64*(2*2048)),
|
||||
},
|
||||
{
|
||||
.name = "Kernel",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 12 * (64*(2*2048)),
|
||||
},
|
||||
{
|
||||
.name = "File System",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
},
|
||||
};
|
||||
|
||||
static inline u32 igep_get_sysboot_value(void)
|
||||
{
|
||||
return omap_ctrl_readl(OMAP343X_CONTROL_STATUS) & IGEP_SYSBOOT_MASK;
|
||||
}
|
||||
|
||||
static void __init igep_flash_init(void)
|
||||
{
|
||||
u32 mux;
|
||||
mux = igep_get_sysboot_value();
|
||||
|
||||
if (mux == IGEP_SYSBOOT_NAND) {
|
||||
pr_info("IGEP: initializing NAND memory device\n");
|
||||
board_nand_init(igep_flash_partitions,
|
||||
ARRAY_SIZE(igep_flash_partitions),
|
||||
0, NAND_BUSWIDTH_16, nand_default_timings);
|
||||
} else if (mux == IGEP_SYSBOOT_ONENAND) {
|
||||
pr_info("IGEP: initializing OneNAND memory device\n");
|
||||
board_onenand_init(igep_flash_partitions,
|
||||
ARRAY_SIZE(igep_flash_partitions), 0);
|
||||
} else {
|
||||
pr_err("IGEP: Flash: unsupported sysboot sequence found\n");
|
||||
}
|
||||
}
|
||||
|
||||
#else
|
||||
static void __init igep_flash_init(void) {}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
|
||||
|
||||
#include <linux/smsc911x.h>
|
||||
#include "gpmc-smsc911x.h"
|
||||
|
||||
static struct omap_smsc911x_platform_data smsc911x_cfg = {
|
||||
.cs = IGEP2_SMSC911X_CS,
|
||||
.gpio_irq = IGEP2_SMSC911X_GPIO,
|
||||
.gpio_reset = -EINVAL,
|
||||
.flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
|
||||
};
|
||||
|
||||
static inline void __init igep2_init_smsc911x(void)
|
||||
{
|
||||
gpmc_smsc911x_init(&smsc911x_cfg);
|
||||
}
|
||||
|
||||
#else
|
||||
static inline void __init igep2_init_smsc911x(void) { }
|
||||
#endif
|
||||
|
||||
static struct regulator_consumer_supply igep_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
|
||||
static struct regulator_init_data igep_vmmc1 = {
|
||||
.constraints = {
|
||||
.min_uV = 1850000,
|
||||
.max_uV = 3150000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(igep_vmmc1_supply),
|
||||
.consumer_supplies = igep_vmmc1_supply,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply igep_vio_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
|
||||
};
|
||||
|
||||
static struct regulator_init_data igep_vio = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.apply_uV = 1,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(igep_vio_supply),
|
||||
.consumer_supplies = igep_vio_supply,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply igep_vmmc2_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
|
||||
};
|
||||
|
||||
static struct regulator_init_data igep_vmmc2 = {
|
||||
.constraints = {
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL,
|
||||
.always_on = 1,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(igep_vmmc2_supply),
|
||||
.consumer_supplies = igep_vmmc2_supply,
|
||||
};
|
||||
|
||||
static struct fixed_voltage_config igep_vwlan = {
|
||||
.supply_name = "vwlan",
|
||||
.microvolts = 3300000,
|
||||
.gpio = -EINVAL,
|
||||
.enabled_at_boot = 1,
|
||||
.init_data = &igep_vmmc2,
|
||||
};
|
||||
|
||||
static struct platform_device igep_vwlan_device = {
|
||||
.name = "reg-fixed-voltage",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &igep_vwlan,
|
||||
},
|
||||
};
|
||||
|
||||
static struct omap2_hsmmc_info mmc[] = {
|
||||
{
|
||||
.mmc = 1,
|
||||
.caps = MMC_CAP_4_BIT_DATA,
|
||||
.gpio_cd = -EINVAL,
|
||||
.gpio_wp = -EINVAL,
|
||||
.deferred = true,
|
||||
},
|
||||
#if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE)
|
||||
{
|
||||
.mmc = 2,
|
||||
.caps = MMC_CAP_4_BIT_DATA,
|
||||
.gpio_cd = -EINVAL,
|
||||
.gpio_wp = -EINVAL,
|
||||
},
|
||||
#endif
|
||||
{} /* Terminator */
|
||||
};
|
||||
|
||||
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
|
||||
#include <linux/leds.h>
|
||||
|
||||
static struct gpio_led igep_gpio_leds[] = {
|
||||
[0] = {
|
||||
.name = "omap3:red:user0",
|
||||
.default_state = 0,
|
||||
},
|
||||
[1] = {
|
||||
.name = "omap3:green:boot",
|
||||
.default_state = 1,
|
||||
},
|
||||
[2] = {
|
||||
.name = "omap3:red:user1",
|
||||
.default_state = 0,
|
||||
},
|
||||
[3] = {
|
||||
.name = "omap3:green:user1",
|
||||
.default_state = 0,
|
||||
.gpio = -EINVAL, /* gets replaced */
|
||||
.active_low = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data igep_led_pdata = {
|
||||
.leds = igep_gpio_leds,
|
||||
.num_leds = ARRAY_SIZE(igep_gpio_leds),
|
||||
};
|
||||
|
||||
static struct platform_device igep_led_device = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &igep_led_pdata,
|
||||
},
|
||||
};
|
||||
|
||||
static void __init igep_leds_init(void)
|
||||
{
|
||||
if (machine_is_igep0020()) {
|
||||
igep_gpio_leds[0].gpio = IGEP2_GPIO_LED0_RED;
|
||||
igep_gpio_leds[1].gpio = IGEP2_GPIO_LED0_GREEN;
|
||||
igep_gpio_leds[2].gpio = IGEP2_GPIO_LED1_RED;
|
||||
} else {
|
||||
igep_gpio_leds[0].gpio = IGEP3_GPIO_LED0_RED;
|
||||
igep_gpio_leds[1].gpio = IGEP3_GPIO_LED0_GREEN;
|
||||
igep_gpio_leds[2].gpio = IGEP3_GPIO_LED1_RED;
|
||||
}
|
||||
|
||||
platform_device_register(&igep_led_device);
|
||||
}
|
||||
|
||||
#else
|
||||
static struct gpio igep_gpio_leds[] __initdata = {
|
||||
{ -EINVAL, GPIOF_OUT_INIT_LOW, "gpio-led:red:d0" },
|
||||
{ -EINVAL, GPIOF_OUT_INIT_LOW, "gpio-led:green:d0" },
|
||||
{ -EINVAL, GPIOF_OUT_INIT_LOW, "gpio-led:red:d1" },
|
||||
};
|
||||
|
||||
static inline void igep_leds_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (machine_is_igep0020()) {
|
||||
igep_gpio_leds[0].gpio = IGEP2_GPIO_LED0_RED;
|
||||
igep_gpio_leds[1].gpio = IGEP2_GPIO_LED0_GREEN;
|
||||
igep_gpio_leds[2].gpio = IGEP2_GPIO_LED1_RED;
|
||||
} else {
|
||||
igep_gpio_leds[0].gpio = IGEP3_GPIO_LED0_RED;
|
||||
igep_gpio_leds[1].gpio = IGEP3_GPIO_LED0_GREEN;
|
||||
igep_gpio_leds[2].gpio = IGEP3_GPIO_LED1_RED;
|
||||
}
|
||||
|
||||
if (gpio_request_array(igep_gpio_leds, ARRAY_SIZE(igep_gpio_leds))) {
|
||||
pr_warning("IGEP v2: Could not obtain leds gpios\n");
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(igep_gpio_leds); i++)
|
||||
gpio_export(igep_gpio_leds[i].gpio, 0);
|
||||
}
|
||||
#endif
|
||||
|
||||
static struct gpio igep2_twl_gpios[] = {
|
||||
{ -EINVAL, GPIOF_IN, "GPIO_EHCI_NOC" },
|
||||
{ -EINVAL, GPIOF_OUT_INIT_LOW, "GPIO_USBH_CPEN" },
|
||||
};
|
||||
|
||||
static int igep_twl_gpio_setup(struct device *dev,
|
||||
unsigned gpio, unsigned ngpio)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
|
||||
mmc[0].gpio_cd = gpio + 0;
|
||||
omap_hsmmc_late_init(mmc);
|
||||
|
||||
/* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
|
||||
#if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE)
|
||||
ret = gpio_request_one(gpio + TWL4030_GPIO_MAX + 1, GPIOF_OUT_INIT_HIGH,
|
||||
"gpio-led:green:d1");
|
||||
if (ret == 0)
|
||||
gpio_export(gpio + TWL4030_GPIO_MAX + 1, 0);
|
||||
else
|
||||
pr_warning("IGEP: Could not obtain gpio GPIO_LED1_GREEN\n");
|
||||
#else
|
||||
igep_gpio_leds[3].gpio = gpio + TWL4030_GPIO_MAX + 1;
|
||||
#endif
|
||||
|
||||
if (machine_is_igep0030())
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* REVISIT: need ehci-omap hooks for external VBUS
|
||||
* power switch and overcurrent detect
|
||||
*/
|
||||
igep2_twl_gpios[0].gpio = gpio + 1;
|
||||
|
||||
/* TWL4030_GPIO_MAX + 0 == ledA, GPIO_USBH_CPEN (out, active low) */
|
||||
igep2_twl_gpios[1].gpio = gpio + TWL4030_GPIO_MAX;
|
||||
|
||||
ret = gpio_request_array(igep2_twl_gpios, ARRAY_SIZE(igep2_twl_gpios));
|
||||
if (ret < 0)
|
||||
pr_err("IGEP2: Could not obtain gpio for USBH_CPEN");
|
||||
|
||||
return 0;
|
||||
};
|
||||
|
||||
static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = {
|
||||
.use_leds = true,
|
||||
.setup = igep_twl_gpio_setup,
|
||||
};
|
||||
|
||||
static int igep2_keymap[] = {
|
||||
KEY(0, 0, KEY_LEFT),
|
||||
KEY(0, 1, KEY_RIGHT),
|
||||
KEY(0, 2, KEY_A),
|
||||
KEY(0, 3, KEY_B),
|
||||
KEY(1, 0, KEY_DOWN),
|
||||
KEY(1, 1, KEY_UP),
|
||||
KEY(1, 2, KEY_E),
|
||||
KEY(1, 3, KEY_F),
|
||||
KEY(2, 0, KEY_ENTER),
|
||||
KEY(2, 1, KEY_I),
|
||||
KEY(2, 2, KEY_J),
|
||||
KEY(2, 3, KEY_K),
|
||||
KEY(3, 0, KEY_M),
|
||||
KEY(3, 1, KEY_N),
|
||||
KEY(3, 2, KEY_O),
|
||||
KEY(3, 3, KEY_P)
|
||||
};
|
||||
|
||||
static struct matrix_keymap_data igep2_keymap_data = {
|
||||
.keymap = igep2_keymap,
|
||||
.keymap_size = ARRAY_SIZE(igep2_keymap),
|
||||
};
|
||||
|
||||
static struct twl4030_keypad_data igep2_keypad_pdata = {
|
||||
.keymap_data = &igep2_keymap_data,
|
||||
.rows = 4,
|
||||
.cols = 4,
|
||||
.rep = 1,
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data igep_twldata = {
|
||||
/* platform_data for children goes here */
|
||||
.gpio = &igep_twl4030_gpio_pdata,
|
||||
.vmmc1 = &igep_vmmc1,
|
||||
.vio = &igep_vio,
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata igep2_i2c3_boardinfo[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("eeprom", 0x50),
|
||||
},
|
||||
};
|
||||
|
||||
static void __init igep_i2c_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_USB,
|
||||
TWL_COMMON_REGULATOR_VPLL2);
|
||||
igep_twldata.vpll2->constraints.apply_uV = true;
|
||||
igep_twldata.vpll2->constraints.name = "VDVI";
|
||||
|
||||
if (machine_is_igep0020()) {
|
||||
/*
|
||||
* Bus 3 is attached to the DVI port where devices like the
|
||||
* pico DLP projector don't work reliably with 400kHz
|
||||
*/
|
||||
ret = omap_register_i2c_bus(3, 100, igep2_i2c3_boardinfo,
|
||||
ARRAY_SIZE(igep2_i2c3_boardinfo));
|
||||
if (ret)
|
||||
pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret);
|
||||
|
||||
igep_twldata.keypad = &igep2_keypad_pdata;
|
||||
/* Get common pmic data */
|
||||
omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO, 0);
|
||||
}
|
||||
|
||||
omap3_pmic_init("twl4030", &igep_twldata);
|
||||
}
|
||||
|
||||
static struct usbhs_phy_data igep2_phy_data[] __initdata = {
|
||||
{
|
||||
.port = 1,
|
||||
.reset_gpio = IGEP2_GPIO_USBH_NRESET,
|
||||
.vcc_gpio = -EINVAL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct usbhs_phy_data igep3_phy_data[] __initdata = {
|
||||
{
|
||||
.port = 2,
|
||||
.reset_gpio = IGEP3_GPIO_USBH_NRESET,
|
||||
.vcc_gpio = -EINVAL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct usbhs_omap_platform_data igep2_usbhs_bdata __initdata = {
|
||||
.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
|
||||
};
|
||||
|
||||
static struct usbhs_omap_platform_data igep3_usbhs_bdata __initdata = {
|
||||
.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
static struct omap_board_mux board_mux[] __initdata = {
|
||||
/* Display Sub System */
|
||||
OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
||||
/* TFP410 PanelBus DVI Transmitte (GPIO_170) */
|
||||
OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
|
||||
/* SMSC9221 LAN Controller ETH IRQ (GPIO_176) */
|
||||
OMAP3_MUX(MCSPI1_CS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
|
||||
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
||||
};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE)
|
||||
static struct gpio igep_wlan_bt_gpios[] __initdata = {
|
||||
{ -EINVAL, GPIOF_OUT_INIT_HIGH, "GPIO_WIFI_NPD" },
|
||||
{ -EINVAL, GPIOF_OUT_INIT_HIGH, "GPIO_WIFI_NRESET" },
|
||||
{ -EINVAL, GPIOF_OUT_INIT_HIGH, "GPIO_BT_NRESET" },
|
||||
};
|
||||
|
||||
static void __init igep_wlan_bt_init(void)
|
||||
{
|
||||
int err;
|
||||
|
||||
/* GPIO's for WLAN-BT combo depends on hardware revision */
|
||||
if (hwrev == IGEP2_BOARD_HWREV_B) {
|
||||
igep_wlan_bt_gpios[0].gpio = IGEP2_RB_GPIO_WIFI_NPD;
|
||||
igep_wlan_bt_gpios[1].gpio = IGEP2_RB_GPIO_WIFI_NRESET;
|
||||
igep_wlan_bt_gpios[2].gpio = IGEP2_RB_GPIO_BT_NRESET;
|
||||
} else if (hwrev == IGEP2_BOARD_HWREV_C || machine_is_igep0030()) {
|
||||
igep_wlan_bt_gpios[0].gpio = IGEP2_RC_GPIO_WIFI_NPD;
|
||||
igep_wlan_bt_gpios[1].gpio = IGEP2_RC_GPIO_WIFI_NRESET;
|
||||
igep_wlan_bt_gpios[2].gpio = IGEP2_RC_GPIO_BT_NRESET;
|
||||
} else
|
||||
return;
|
||||
|
||||
/* Make sure that the GPIO pins are muxed correctly */
|
||||
omap_mux_init_gpio(igep_wlan_bt_gpios[0].gpio, OMAP_PIN_OUTPUT);
|
||||
omap_mux_init_gpio(igep_wlan_bt_gpios[1].gpio, OMAP_PIN_OUTPUT);
|
||||
omap_mux_init_gpio(igep_wlan_bt_gpios[2].gpio, OMAP_PIN_OUTPUT);
|
||||
|
||||
err = gpio_request_array(igep_wlan_bt_gpios,
|
||||
ARRAY_SIZE(igep_wlan_bt_gpios));
|
||||
if (err) {
|
||||
pr_warning("IGEP2: Could not obtain WIFI/BT gpios\n");
|
||||
return;
|
||||
}
|
||||
|
||||
gpio_export(igep_wlan_bt_gpios[0].gpio, 0);
|
||||
gpio_export(igep_wlan_bt_gpios[1].gpio, 0);
|
||||
gpio_export(igep_wlan_bt_gpios[2].gpio, 0);
|
||||
|
||||
gpio_set_value(igep_wlan_bt_gpios[1].gpio, 0);
|
||||
udelay(10);
|
||||
gpio_set_value(igep_wlan_bt_gpios[1].gpio, 1);
|
||||
|
||||
}
|
||||
#else
|
||||
static inline void __init igep_wlan_bt_init(void) { }
|
||||
#endif
|
||||
|
||||
static struct regulator_consumer_supply dummy_supplies[] = {
|
||||
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
|
||||
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
|
||||
};
|
||||
|
||||
static void __init igep_init(void)
|
||||
{
|
||||
regulator_register_fixed(1, dummy_supplies, ARRAY_SIZE(dummy_supplies));
|
||||
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
|
||||
|
||||
/* Get IGEP2 hardware revision */
|
||||
igep2_get_revision();
|
||||
|
||||
omap_hsmmc_init(mmc);
|
||||
|
||||
/* Register I2C busses and drivers */
|
||||
igep_i2c_init();
|
||||
platform_device_register(&igep_vwlan_device);
|
||||
omap3_igep2_display_init_of();
|
||||
omap_serial_init();
|
||||
omap_sdrc_init(m65kxxxxam_sdrc_params,
|
||||
m65kxxxxam_sdrc_params);
|
||||
usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
|
||||
usb_musb_init(NULL);
|
||||
|
||||
igep_flash_init();
|
||||
igep_leds_init();
|
||||
omap_twl4030_audio_init("igep2", NULL);
|
||||
|
||||
/*
|
||||
* WLAN-BT combo module from MuRata which has a Marvell WLAN
|
||||
* (88W8686) + CSR Bluetooth chipset. Uses SDIO interface.
|
||||
*/
|
||||
igep_wlan_bt_init();
|
||||
|
||||
if (machine_is_igep0020()) {
|
||||
igep2_init_smsc911x();
|
||||
usbhs_init_phys(igep2_phy_data, ARRAY_SIZE(igep2_phy_data));
|
||||
usbhs_init(&igep2_usbhs_bdata);
|
||||
} else {
|
||||
usbhs_init_phys(igep3_phy_data, ARRAY_SIZE(igep3_phy_data));
|
||||
usbhs_init(&igep3_usbhs_bdata);
|
||||
}
|
||||
}
|
||||
|
||||
MACHINE_START(IGEP0020, "IGEP v2 board")
|
||||
.atag_offset = 0x100,
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap35xx_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.handle_irq = omap3_intc_handle_irq,
|
||||
.init_machine = igep_init,
|
||||
.init_late = omap35xx_init_late,
|
||||
.init_time = omap3_sync32k_timer_init,
|
||||
.restart = omap3xxx_restart,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(IGEP0030, "IGEP OMAP3 module")
|
||||
.atag_offset = 0x100,
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap35xx_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.handle_irq = omap3_intc_handle_irq,
|
||||
.init_machine = igep_init,
|
||||
.init_late = omap35xx_init_late,
|
||||
.init_time = omap3_sync32k_timer_init,
|
||||
.restart = omap3xxx_restart,
|
||||
MACHINE_END
|
|
@ -36,7 +36,6 @@
|
|||
#include <asm/mach/map.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "board-zoom.h"
|
||||
#include "gpmc.h"
|
||||
#include "gpmc-smsc911x.h"
|
||||
|
||||
|
@ -406,7 +405,7 @@ static void __init omap_ldp_init(void)
|
|||
usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
|
||||
usb_musb_init(NULL);
|
||||
board_nand_init(ldp_nand_partitions, ARRAY_SIZE(ldp_nand_partitions),
|
||||
ZOOM_NAND_CS, 0, nand_default_timings);
|
||||
0, 0, nand_default_timings);
|
||||
|
||||
omap_hsmmc_init(mmc);
|
||||
ldp_display_init();
|
||||
|
|
|
@ -1,756 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-omap2/board-omap3evm.c
|
||||
*
|
||||
* Copyright (C) 2008 Texas Instruments
|
||||
*
|
||||
* Modified from mach-omap2/board-3430sdp.c
|
||||
*
|
||||
* Initial code: Syed Mohammed Khasim
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/input/matrix_keypad.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/mtd/nand.h>
|
||||
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/ads7846.h>
|
||||
#include <linux/i2c/twl.h>
|
||||
#include <linux/usb/otg.h>
|
||||
#include <linux/usb/musb.h>
|
||||
#include <linux/usb/usb_phy_gen_xceiv.h>
|
||||
#include <linux/smsc911x.h>
|
||||
|
||||
#include <linux/wl12xx.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/mmc/host.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/usb/phy.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include <linux/platform_data/mtd-nand-omap2.h>
|
||||
#include "common.h"
|
||||
#include <linux/platform_data/spi-omap2-mcspi.h>
|
||||
#include <video/omapdss.h>
|
||||
#include <video/omap-panel-data.h>
|
||||
|
||||
#include "soc.h"
|
||||
#include "mux.h"
|
||||
#include "sdram-micron-mt46h32m32lf-6.h"
|
||||
#include "hsmmc.h"
|
||||
#include "common-board-devices.h"
|
||||
#include "board-flash.h"
|
||||
|
||||
#define NAND_CS 0
|
||||
|
||||
#define OMAP3_EVM_TS_GPIO 175
|
||||
#define OMAP3_EVM_EHCI_VBUS 22
|
||||
#define OMAP3_EVM_EHCI_SELECT 61
|
||||
|
||||
#define OMAP3EVM_ETHR_START 0x2c000000
|
||||
#define OMAP3EVM_ETHR_SIZE 1024
|
||||
#define OMAP3EVM_ETHR_ID_REV 0x50
|
||||
#define OMAP3EVM_ETHR_GPIO_IRQ 176
|
||||
#define OMAP3EVM_SMSC911X_CS 5
|
||||
/*
|
||||
* Eth Reset signal
|
||||
* 64 = Generation 1 (<=RevD)
|
||||
* 7 = Generation 2 (>=RevE)
|
||||
*/
|
||||
#define OMAP3EVM_GEN1_ETHR_GPIO_RST 64
|
||||
#define OMAP3EVM_GEN2_ETHR_GPIO_RST 7
|
||||
|
||||
/*
|
||||
* OMAP35x EVM revision
|
||||
* Run time detection of EVM revision is done by reading Ethernet
|
||||
* PHY ID -
|
||||
* GEN_1 = 0x01150000
|
||||
* GEN_2 = 0x92200000
|
||||
*/
|
||||
enum {
|
||||
OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */
|
||||
OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */
|
||||
};
|
||||
|
||||
static u8 omap3_evm_version;
|
||||
|
||||
static u8 get_omap3_evm_rev(void)
|
||||
{
|
||||
return omap3_evm_version;
|
||||
}
|
||||
|
||||
static void __init omap3_evm_get_revision(void)
|
||||
{
|
||||
void __iomem *ioaddr;
|
||||
unsigned int smsc_id;
|
||||
|
||||
/* Ethernet PHY ID is stored at ID_REV register */
|
||||
ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K);
|
||||
if (!ioaddr)
|
||||
return;
|
||||
smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000;
|
||||
iounmap(ioaddr);
|
||||
|
||||
switch (smsc_id) {
|
||||
/*SMSC9115 chipset*/
|
||||
case 0x01150000:
|
||||
omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
|
||||
break;
|
||||
/*SMSC 9220 chipset*/
|
||||
case 0x92200000:
|
||||
default:
|
||||
omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
|
||||
#include "gpmc-smsc911x.h"
|
||||
|
||||
static struct omap_smsc911x_platform_data smsc911x_cfg = {
|
||||
.cs = OMAP3EVM_SMSC911X_CS,
|
||||
.gpio_irq = OMAP3EVM_ETHR_GPIO_IRQ,
|
||||
.gpio_reset = -EINVAL,
|
||||
.flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
|
||||
};
|
||||
|
||||
static inline void __init omap3evm_init_smsc911x(void)
|
||||
{
|
||||
/* Configure ethernet controller reset gpio */
|
||||
if (cpu_is_omap3430()) {
|
||||
if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
|
||||
smsc911x_cfg.gpio_reset = OMAP3EVM_GEN1_ETHR_GPIO_RST;
|
||||
else
|
||||
smsc911x_cfg.gpio_reset = OMAP3EVM_GEN2_ETHR_GPIO_RST;
|
||||
}
|
||||
|
||||
gpmc_smsc911x_init(&smsc911x_cfg);
|
||||
}
|
||||
|
||||
#else
|
||||
static inline void __init omap3evm_init_smsc911x(void) { return; }
|
||||
#endif
|
||||
|
||||
/*
|
||||
* OMAP3EVM LCD Panel control signals
|
||||
*/
|
||||
#define OMAP3EVM_LCD_PANEL_LR 2
|
||||
#define OMAP3EVM_LCD_PANEL_UD 3
|
||||
#define OMAP3EVM_LCD_PANEL_INI 152
|
||||
#define OMAP3EVM_LCD_PANEL_QVGA 154
|
||||
#define OMAP3EVM_LCD_PANEL_RESB 155
|
||||
|
||||
#define OMAP3EVM_LCD_PANEL_ENVDD 153
|
||||
#define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210
|
||||
|
||||
/*
|
||||
* OMAP3EVM DVI control signals
|
||||
*/
|
||||
#define OMAP3EVM_DVI_PANEL_EN_GPIO 199
|
||||
|
||||
#ifdef CONFIG_BROKEN
|
||||
static void __init omap3_evm_display_init(void)
|
||||
{
|
||||
int r;
|
||||
|
||||
r = gpio_request_one(OMAP3EVM_LCD_PANEL_ENVDD, GPIOF_OUT_INIT_LOW,
|
||||
"lcd_panel_envdd");
|
||||
if (r)
|
||||
pr_err("failed to get lcd_panel_envdd GPIO\n");
|
||||
|
||||
r = gpio_request_one(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO,
|
||||
GPIOF_OUT_INIT_LOW, "lcd_panel_bklight");
|
||||
if (r)
|
||||
pr_err("failed to get lcd_panel_bklight GPIO\n");
|
||||
|
||||
if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
|
||||
gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
|
||||
else
|
||||
gpio_set_value_cansleep(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
|
||||
}
|
||||
#endif
|
||||
|
||||
static struct panel_sharp_ls037v7dw01_platform_data omap3_evm_lcd_pdata = {
|
||||
.name = "lcd",
|
||||
.source = "dpi.0",
|
||||
|
||||
.data_lines = 18,
|
||||
|
||||
.resb_gpio = OMAP3EVM_LCD_PANEL_RESB,
|
||||
.ini_gpio = OMAP3EVM_LCD_PANEL_INI,
|
||||
.mo_gpio = OMAP3EVM_LCD_PANEL_QVGA,
|
||||
.lr_gpio = OMAP3EVM_LCD_PANEL_LR,
|
||||
.ud_gpio = OMAP3EVM_LCD_PANEL_UD,
|
||||
};
|
||||
|
||||
static struct platform_device omap3_evm_lcd_device = {
|
||||
.name = "panel-sharp-ls037v7dw01",
|
||||
.id = 0,
|
||||
.dev.platform_data = &omap3_evm_lcd_pdata,
|
||||
};
|
||||
|
||||
static struct connector_dvi_platform_data omap3_evm_dvi_connector_pdata = {
|
||||
.name = "dvi",
|
||||
.source = "tfp410.0",
|
||||
.i2c_bus_num = -1,
|
||||
};
|
||||
|
||||
static struct platform_device omap3_evm_dvi_connector_device = {
|
||||
.name = "connector-dvi",
|
||||
.id = 0,
|
||||
.dev.platform_data = &omap3_evm_dvi_connector_pdata,
|
||||
};
|
||||
|
||||
static struct encoder_tfp410_platform_data omap3_evm_tfp410_pdata = {
|
||||
.name = "tfp410.0",
|
||||
.source = "dpi.0",
|
||||
.data_lines = 24,
|
||||
.power_down_gpio = OMAP3EVM_DVI_PANEL_EN_GPIO,
|
||||
};
|
||||
|
||||
static struct platform_device omap3_evm_tfp410_device = {
|
||||
.name = "tfp410",
|
||||
.id = 0,
|
||||
.dev.platform_data = &omap3_evm_tfp410_pdata,
|
||||
};
|
||||
|
||||
static struct connector_atv_platform_data omap3_evm_tv_pdata = {
|
||||
.name = "tv",
|
||||
.source = "venc.0",
|
||||
.connector_type = OMAP_DSS_VENC_TYPE_SVIDEO,
|
||||
.invert_polarity = false,
|
||||
};
|
||||
|
||||
static struct platform_device omap3_evm_tv_connector_device = {
|
||||
.name = "connector-analog-tv",
|
||||
.id = 0,
|
||||
.dev.platform_data = &omap3_evm_tv_pdata,
|
||||
};
|
||||
|
||||
static struct omap_dss_board_info omap3_evm_dss_data = {
|
||||
.default_display_name = "lcd",
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply omap3evm_vsim_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
|
||||
static struct regulator_init_data omap3evm_vmmc1 = {
|
||||
.constraints = {
|
||||
.min_uV = 1850000,
|
||||
.max_uV = 3150000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply),
|
||||
.consumer_supplies = omap3evm_vmmc1_supply,
|
||||
};
|
||||
|
||||
/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
|
||||
static struct regulator_init_data omap3evm_vsim = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 3000000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply),
|
||||
.consumer_supplies = omap3evm_vsim_supply,
|
||||
};
|
||||
|
||||
static struct omap2_hsmmc_info mmc[] = {
|
||||
{
|
||||
.mmc = 1,
|
||||
.caps = MMC_CAP_4_BIT_DATA,
|
||||
.gpio_cd = -EINVAL,
|
||||
.gpio_wp = 63,
|
||||
.deferred = true,
|
||||
},
|
||||
#ifdef CONFIG_WILINK_PLATFORM_DATA
|
||||
{
|
||||
.name = "wl1271",
|
||||
.mmc = 2,
|
||||
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
|
||||
.gpio_wp = -EINVAL,
|
||||
.gpio_cd = -EINVAL,
|
||||
.nonremovable = true,
|
||||
},
|
||||
#endif
|
||||
{} /* Terminator */
|
||||
};
|
||||
|
||||
static struct gpio_led gpio_leds[] = {
|
||||
{
|
||||
.name = "omap3evm::ledb",
|
||||
/* normally not visible (board underside) */
|
||||
.default_trigger = "default-on",
|
||||
.gpio = -EINVAL, /* gets replaced */
|
||||
.active_low = true,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data gpio_led_info = {
|
||||
.leds = gpio_leds,
|
||||
.num_leds = ARRAY_SIZE(gpio_leds),
|
||||
};
|
||||
|
||||
static struct platform_device leds_gpio = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &gpio_led_info,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
static int omap3evm_twl_gpio_setup(struct device *dev,
|
||||
unsigned gpio, unsigned ngpio)
|
||||
{
|
||||
int r, lcd_bl_en;
|
||||
|
||||
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
|
||||
mmc[0].gpio_cd = gpio + 0;
|
||||
omap_hsmmc_late_init(mmc);
|
||||
|
||||
/*
|
||||
* Most GPIOs are for USB OTG. Some are mostly sent to
|
||||
* the P2 connector; notably LEDA for the LCD backlight.
|
||||
*/
|
||||
|
||||
/* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */
|
||||
lcd_bl_en = get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2 ?
|
||||
GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
|
||||
r = gpio_request_one(gpio + TWL4030_GPIO_MAX, lcd_bl_en, "EN_LCD_BKL");
|
||||
if (r)
|
||||
printk(KERN_ERR "failed to get/set lcd_bkl gpio\n");
|
||||
|
||||
/* gpio + 7 == DVI Enable */
|
||||
gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
|
||||
|
||||
/* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
|
||||
gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
|
||||
|
||||
platform_device_register(&leds_gpio);
|
||||
|
||||
/* Enable VBUS switch by setting TWL4030.GPIO2DIR as output
|
||||
* for starting USB tranceiver
|
||||
*/
|
||||
#ifdef CONFIG_TWL4030_CORE
|
||||
if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
|
||||
u8 val;
|
||||
|
||||
twl_i2c_read_u8(TWL4030_MODULE_GPIO, &val, REG_GPIODATADIR1);
|
||||
val |= 0x04; /* TWL4030.GPIO2DIR BIT at GPIODATADIR1(0x9B) */
|
||||
twl_i2c_write_u8(TWL4030_MODULE_GPIO, val, REG_GPIODATADIR1);
|
||||
}
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
|
||||
.use_leds = true,
|
||||
.setup = omap3evm_twl_gpio_setup,
|
||||
};
|
||||
|
||||
static uint32_t board_keymap[] = {
|
||||
KEY(0, 0, KEY_LEFT),
|
||||
KEY(0, 1, KEY_DOWN),
|
||||
KEY(0, 2, KEY_ENTER),
|
||||
KEY(0, 3, KEY_M),
|
||||
|
||||
KEY(1, 0, KEY_RIGHT),
|
||||
KEY(1, 1, KEY_UP),
|
||||
KEY(1, 2, KEY_I),
|
||||
KEY(1, 3, KEY_N),
|
||||
|
||||
KEY(2, 0, KEY_A),
|
||||
KEY(2, 1, KEY_E),
|
||||
KEY(2, 2, KEY_J),
|
||||
KEY(2, 3, KEY_O),
|
||||
|
||||
KEY(3, 0, KEY_B),
|
||||
KEY(3, 1, KEY_F),
|
||||
KEY(3, 2, KEY_K),
|
||||
KEY(3, 3, KEY_P)
|
||||
};
|
||||
|
||||
static struct matrix_keymap_data board_map_data = {
|
||||
.keymap = board_keymap,
|
||||
.keymap_size = ARRAY_SIZE(board_keymap),
|
||||
};
|
||||
|
||||
static struct twl4030_keypad_data omap3evm_kp_data = {
|
||||
.keymap_data = &board_map_data,
|
||||
.rows = 4,
|
||||
.cols = 4,
|
||||
.rep = 1,
|
||||
};
|
||||
|
||||
/* ads7846 on SPI */
|
||||
static struct regulator_consumer_supply omap3evm_vio_supply[] = {
|
||||
REGULATOR_SUPPLY("vcc", "spi1.0"),
|
||||
};
|
||||
|
||||
/* VIO for ads7846 */
|
||||
static struct regulator_init_data omap3evm_vio = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply),
|
||||
.consumer_supplies = omap3evm_vio_supply,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_WILINK_PLATFORM_DATA
|
||||
|
||||
#define OMAP3EVM_WLAN_PMENA_GPIO (150)
|
||||
#define OMAP3EVM_WLAN_IRQ_GPIO (149)
|
||||
|
||||
static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
|
||||
};
|
||||
|
||||
/* VMMC2 for driving the WL12xx module */
|
||||
static struct regulator_init_data omap3evm_vmmc2 = {
|
||||
.constraints = {
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply),
|
||||
.consumer_supplies = omap3evm_vmmc2_supply,
|
||||
};
|
||||
|
||||
static struct fixed_voltage_config omap3evm_vwlan = {
|
||||
.supply_name = "vwl1271",
|
||||
.microvolts = 1800000, /* 1.80V */
|
||||
.gpio = OMAP3EVM_WLAN_PMENA_GPIO,
|
||||
.startup_delay = 70000, /* 70ms */
|
||||
.enable_high = 1,
|
||||
.enabled_at_boot = 0,
|
||||
.init_data = &omap3evm_vmmc2,
|
||||
};
|
||||
|
||||
static struct platform_device omap3evm_wlan_regulator = {
|
||||
.name = "reg-fixed-voltage",
|
||||
.id = 1,
|
||||
.dev = {
|
||||
.platform_data = &omap3evm_vwlan,
|
||||
},
|
||||
};
|
||||
|
||||
struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
|
||||
.board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
|
||||
};
|
||||
#endif
|
||||
|
||||
/* VAUX2 for USB */
|
||||
static struct regulator_consumer_supply omap3evm_vaux2_supplies[] = {
|
||||
REGULATOR_SUPPLY("VDD_CSIPHY1", "omap3isp"), /* OMAP ISP */
|
||||
REGULATOR_SUPPLY("VDD_CSIPHY2", "omap3isp"), /* OMAP ISP */
|
||||
REGULATOR_SUPPLY("vcc", "usb_phy_gen_xceiv.2"), /* hsusb port 2 */
|
||||
REGULATOR_SUPPLY("vaux2", NULL),
|
||||
};
|
||||
|
||||
static struct regulator_init_data omap3evm_vaux2 = {
|
||||
.constraints = {
|
||||
.min_uV = 2800000,
|
||||
.max_uV = 2800000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(omap3evm_vaux2_supplies),
|
||||
.consumer_supplies = omap3evm_vaux2_supplies,
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data omap3evm_twldata = {
|
||||
/* platform_data for children goes here */
|
||||
.keypad = &omap3evm_kp_data,
|
||||
.gpio = &omap3evm_gpio_data,
|
||||
.vio = &omap3evm_vio,
|
||||
.vmmc1 = &omap3evm_vmmc1,
|
||||
.vsim = &omap3evm_vsim,
|
||||
};
|
||||
|
||||
static int __init omap3_evm_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&omap3evm_twldata,
|
||||
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
|
||||
TWL_COMMON_PDATA_AUDIO,
|
||||
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
|
||||
omap3evm_twldata.vdac->constraints.apply_uV = true;
|
||||
omap3evm_twldata.vpll2->constraints.apply_uV = true;
|
||||
|
||||
omap3_pmic_init("twl4030", &omap3evm_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, NULL, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct usbhs_phy_data phy_data[] __initdata = {
|
||||
{
|
||||
.port = 2,
|
||||
.reset_gpio = -1, /* set at runtime */
|
||||
.vcc_gpio = -EINVAL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
|
||||
.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
static struct omap_board_mux omap35x_board_mux[] __initdata = {
|
||||
OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
|
||||
OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
|
||||
OMAP_PIN_OFF_WAKEUPENABLE),
|
||||
OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
|
||||
OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
|
||||
OMAP_PIN_OFF_WAKEUPENABLE),
|
||||
OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
|
||||
OMAP_PIN_OFF_NONE),
|
||||
OMAP3_MUX(GPMC_WAIT2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
|
||||
OMAP_PIN_OFF_NONE),
|
||||
#ifdef CONFIG_WILINK_PLATFORM_DATA
|
||||
/* WLAN IRQ - GPIO 149 */
|
||||
OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
|
||||
|
||||
/* WLAN POWER ENABLE - GPIO 150 */
|
||||
OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
|
||||
|
||||
/* MMC2 SDIO pin muxes for WL12xx */
|
||||
OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
||||
OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
||||
OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
||||
OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
||||
OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
||||
OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
||||
#endif
|
||||
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
||||
};
|
||||
|
||||
static struct omap_board_mux omap36x_board_mux[] __initdata = {
|
||||
OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP |
|
||||
OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
|
||||
OMAP_PIN_OFF_WAKEUPENABLE),
|
||||
OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP |
|
||||
OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_OUTPUT_LOW |
|
||||
OMAP_PIN_OFF_WAKEUPENABLE),
|
||||
/* AM/DM37x EVM: DSS data bus muxed with sys_boot */
|
||||
OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
||||
OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
||||
OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
||||
OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
||||
OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
||||
OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
||||
OMAP3_MUX(SYS_BOOT0, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
||||
OMAP3_MUX(SYS_BOOT1, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
||||
OMAP3_MUX(SYS_BOOT3, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
||||
OMAP3_MUX(SYS_BOOT4, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
||||
OMAP3_MUX(SYS_BOOT5, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
||||
OMAP3_MUX(SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_OFF_NONE),
|
||||
#ifdef CONFIG_WILINK_PLATFORM_DATA
|
||||
/* WLAN IRQ - GPIO 149 */
|
||||
OMAP3_MUX(UART1_RTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
|
||||
|
||||
/* WLAN POWER ENABLE - GPIO 150 */
|
||||
OMAP3_MUX(UART1_CTS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
|
||||
|
||||
/* MMC2 SDIO pin muxes for WL12xx */
|
||||
OMAP3_MUX(SDMMC2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
||||
OMAP3_MUX(SDMMC2_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
||||
OMAP3_MUX(SDMMC2_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
||||
OMAP3_MUX(SDMMC2_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
||||
OMAP3_MUX(SDMMC2_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
||||
OMAP3_MUX(SDMMC2_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
|
||||
#endif
|
||||
|
||||
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
||||
};
|
||||
#else
|
||||
#define omap35x_board_mux NULL
|
||||
#define omap36x_board_mux NULL
|
||||
#endif
|
||||
|
||||
static struct omap_musb_board_data musb_board_data = {
|
||||
.interface_type = MUSB_INTERFACE_ULPI,
|
||||
.mode = MUSB_OTG,
|
||||
.power = 100,
|
||||
};
|
||||
|
||||
static struct gpio omap3_evm_ehci_gpios[] __initdata = {
|
||||
{ OMAP3_EVM_EHCI_VBUS, GPIOF_OUT_INIT_HIGH, "enable EHCI VBUS" },
|
||||
{ OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" },
|
||||
};
|
||||
|
||||
static void __init omap3_evm_wl12xx_init(void)
|
||||
{
|
||||
#ifdef CONFIG_WILINK_PLATFORM_DATA
|
||||
int ret;
|
||||
|
||||
/* WL12xx WLAN Init */
|
||||
omap3evm_wlan_data.irq = gpio_to_irq(OMAP3EVM_WLAN_IRQ_GPIO);
|
||||
ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
|
||||
if (ret)
|
||||
pr_err("error setting wl12xx data: %d\n", ret);
|
||||
ret = platform_device_register(&omap3evm_wlan_regulator);
|
||||
if (ret)
|
||||
pr_err("error registering wl12xx device: %d\n", ret);
|
||||
#endif
|
||||
}
|
||||
|
||||
static struct regulator_consumer_supply dummy_supplies[] = {
|
||||
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
|
||||
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
|
||||
};
|
||||
|
||||
static struct mtd_partition omap3evm_nand_partitions[] = {
|
||||
/* All the partition sizes are listed in terms of NAND block size */
|
||||
{
|
||||
.name = "X-Loader",
|
||||
.offset = 0,
|
||||
.size = 4*(SZ_128K),
|
||||
.mask_flags = MTD_WRITEABLE
|
||||
},
|
||||
{
|
||||
.name = "U-Boot",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 14*(SZ_128K),
|
||||
.mask_flags = MTD_WRITEABLE
|
||||
},
|
||||
{
|
||||
.name = "U-Boot Env",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 2*(SZ_128K)
|
||||
},
|
||||
{
|
||||
.name = "Kernel",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = 40*(SZ_128K)
|
||||
},
|
||||
{
|
||||
.name = "File system",
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
},
|
||||
};
|
||||
|
||||
static void __init omap3_evm_init(void)
|
||||
{
|
||||
struct omap_board_mux *obm;
|
||||
|
||||
omap3_evm_get_revision();
|
||||
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
|
||||
|
||||
obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux;
|
||||
omap3_mux_init(obm, OMAP_PACKAGE_CBB);
|
||||
|
||||
omap_mux_init_gpio(63, OMAP_PIN_INPUT);
|
||||
omap_hsmmc_init(mmc);
|
||||
|
||||
if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
|
||||
omap3evm_twldata.vaux2 = &omap3evm_vaux2;
|
||||
|
||||
omap3_evm_i2c_init();
|
||||
|
||||
omap_display_init(&omap3_evm_dss_data);
|
||||
platform_device_register(&omap3_evm_lcd_device);
|
||||
platform_device_register(&omap3_evm_tfp410_device);
|
||||
platform_device_register(&omap3_evm_dvi_connector_device);
|
||||
platform_device_register(&omap3_evm_tv_connector_device);
|
||||
|
||||
omap_serial_init();
|
||||
omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
|
||||
|
||||
/* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
|
||||
usb_nop_xceiv_register();
|
||||
|
||||
if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
|
||||
/* enable EHCI VBUS using GPIO22 */
|
||||
omap_mux_init_gpio(OMAP3_EVM_EHCI_VBUS, OMAP_PIN_INPUT_PULLUP);
|
||||
/* Select EHCI port on main board */
|
||||
omap_mux_init_gpio(OMAP3_EVM_EHCI_SELECT,
|
||||
OMAP_PIN_INPUT_PULLUP);
|
||||
gpio_request_array(omap3_evm_ehci_gpios,
|
||||
ARRAY_SIZE(omap3_evm_ehci_gpios));
|
||||
|
||||
/* setup EHCI phy reset config */
|
||||
omap_mux_init_gpio(21, OMAP_PIN_INPUT_PULLUP);
|
||||
phy_data[0].reset_gpio = 21;
|
||||
|
||||
/* EVM REV >= E can supply 500mA with EXTVBUS programming */
|
||||
musb_board_data.power = 500;
|
||||
musb_board_data.extvbus = 1;
|
||||
} else {
|
||||
/* setup EHCI phy reset on MDC */
|
||||
omap_mux_init_gpio(135, OMAP_PIN_OUTPUT);
|
||||
phy_data[0].reset_gpio = 135;
|
||||
}
|
||||
usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
|
||||
usb_musb_init(&musb_board_data);
|
||||
|
||||
usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
|
||||
usbhs_init(&usbhs_bdata);
|
||||
board_nand_init(omap3evm_nand_partitions,
|
||||
ARRAY_SIZE(omap3evm_nand_partitions), NAND_CS,
|
||||
NAND_BUSWIDTH_16, NULL);
|
||||
|
||||
omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
|
||||
omap3evm_init_smsc911x();
|
||||
#ifdef CONFIG_BROKEN
|
||||
omap3_evm_display_init();
|
||||
#endif
|
||||
omap3_evm_wl12xx_init();
|
||||
omap_twl4030_audio_init("omap3evm", NULL);
|
||||
}
|
||||
|
||||
MACHINE_START(OMAP3EVM, "OMAP3 EVM")
|
||||
/* Maintainer: Syed Mohammed Khasim - Texas Instruments */
|
||||
.atag_offset = 0x100,
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap35xx_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.handle_irq = omap3_intc_handle_irq,
|
||||
.init_machine = omap3_evm_init,
|
||||
.init_late = omap35xx_init_late,
|
||||
.init_time = omap3_sync32k_timer_init,
|
||||
.restart = omap3xxx_restart,
|
||||
MACHINE_END
|
|
@ -1,167 +0,0 @@
|
|||
/*
|
||||
* Board support file for Nokia N950 (RM-680) / N9 (RM-696).
|
||||
*
|
||||
* Copyright (C) 2010 Nokia
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/i2c/twl.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
#include <linux/platform_data/mtd-onenand-omap2.h>
|
||||
#include <linux/usb/phy.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "mux.h"
|
||||
#include "gpmc.h"
|
||||
#include "mmc.h"
|
||||
#include "hsmmc.h"
|
||||
#include "sdram-nokia.h"
|
||||
#include "common-board-devices.h"
|
||||
#include "gpmc-onenand.h"
|
||||
|
||||
static struct regulator_consumer_supply rm680_vemmc_consumers[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
|
||||
};
|
||||
|
||||
/* Fixed regulator for internal eMMC */
|
||||
static struct regulator_init_data rm680_vemmc = {
|
||||
.constraints = {
|
||||
.name = "rm680_vemmc",
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS
|
||||
| REGULATOR_CHANGE_MODE,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(rm680_vemmc_consumers),
|
||||
.consumer_supplies = rm680_vemmc_consumers,
|
||||
};
|
||||
|
||||
static struct fixed_voltage_config rm680_vemmc_config = {
|
||||
.supply_name = "VEMMC",
|
||||
.microvolts = 2900000,
|
||||
.gpio = 157,
|
||||
.startup_delay = 150,
|
||||
.enable_high = 1,
|
||||
.init_data = &rm680_vemmc,
|
||||
};
|
||||
|
||||
static struct platform_device rm680_vemmc_device = {
|
||||
.name = "reg-fixed-voltage",
|
||||
.dev = {
|
||||
.platform_data = &rm680_vemmc_config,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device *rm680_peripherals_devices[] __initdata = {
|
||||
&rm680_vemmc_device,
|
||||
};
|
||||
|
||||
/* TWL */
|
||||
static struct twl4030_gpio_platform_data rm680_gpio_data = {
|
||||
.pullups = BIT(0),
|
||||
.pulldowns = BIT(1) | BIT(2) | BIT(8) | BIT(15),
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data rm680_twl_data = {
|
||||
.gpio = &rm680_gpio_data,
|
||||
/* add rest of the children here */
|
||||
};
|
||||
|
||||
static void __init rm680_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&rm680_twl_data, TWL_COMMON_PDATA_USB, 0);
|
||||
omap_pmic_init(1, 2900, "twl5031", 7 + OMAP_INTC_START, &rm680_twl_data);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, NULL, 0);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
|
||||
defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
|
||||
static struct omap_onenand_platform_data board_onenand_data[] = {
|
||||
{
|
||||
.gpio_irq = 65,
|
||||
.flags = ONENAND_SYNC_READWRITE,
|
||||
}
|
||||
};
|
||||
#endif
|
||||
|
||||
/* eMMC */
|
||||
static struct omap2_hsmmc_info mmc[] __initdata = {
|
||||
{
|
||||
.name = "internal",
|
||||
.mmc = 2,
|
||||
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED,
|
||||
.gpio_cd = -EINVAL,
|
||||
.gpio_wp = -EINVAL,
|
||||
},
|
||||
{ /* Terminator */ }
|
||||
};
|
||||
|
||||
static void __init rm680_peripherals_init(void)
|
||||
{
|
||||
platform_add_devices(rm680_peripherals_devices,
|
||||
ARRAY_SIZE(rm680_peripherals_devices));
|
||||
rm680_i2c_init();
|
||||
gpmc_onenand_init(board_onenand_data);
|
||||
omap_hsmmc_init(mmc);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
static struct omap_board_mux board_mux[] __initdata = {
|
||||
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
||||
};
|
||||
#endif
|
||||
|
||||
static void __init rm680_init(void)
|
||||
{
|
||||
struct omap_sdrc_params *sdrc_params;
|
||||
|
||||
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
|
||||
omap_serial_init();
|
||||
|
||||
sdrc_params = nokia_get_sdram_timings();
|
||||
omap_sdrc_init(sdrc_params, sdrc_params);
|
||||
|
||||
usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
|
||||
usb_musb_init(NULL);
|
||||
rm680_peripherals_init();
|
||||
}
|
||||
|
||||
MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
|
||||
.atag_offset = 0x100,
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3630_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.handle_irq = omap3_intc_handle_irq,
|
||||
.init_machine = rm680_init,
|
||||
.init_late = omap3630_init_late,
|
||||
.init_time = omap3_sync32k_timer_init,
|
||||
.restart = omap3xxx_restart,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(NOKIA_RM696, "Nokia RM-696 board")
|
||||
.atag_offset = 0x100,
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3630_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.handle_irq = omap3_intc_handle_irq,
|
||||
.init_machine = rm680_init,
|
||||
.init_late = omap3630_init_late,
|
||||
.init_time = omap3_sync32k_timer_init,
|
||||
.restart = omap3xxx_restart,
|
||||
MACHINE_END
|
|
@ -167,38 +167,47 @@ static struct lp55xx_led_config rx51_lp5523_led_config[] = {
|
|||
.name = "lp5523:kb1",
|
||||
.chan_nr = 0,
|
||||
.led_current = 50,
|
||||
.max_current = 100,
|
||||
}, {
|
||||
.name = "lp5523:kb2",
|
||||
.chan_nr = 1,
|
||||
.led_current = 50,
|
||||
.max_current = 100,
|
||||
}, {
|
||||
.name = "lp5523:kb3",
|
||||
.chan_nr = 2,
|
||||
.led_current = 50,
|
||||
.max_current = 100,
|
||||
}, {
|
||||
.name = "lp5523:kb4",
|
||||
.chan_nr = 3,
|
||||
.led_current = 50,
|
||||
.max_current = 100,
|
||||
}, {
|
||||
.name = "lp5523:b",
|
||||
.chan_nr = 4,
|
||||
.led_current = 50,
|
||||
.max_current = 100,
|
||||
}, {
|
||||
.name = "lp5523:g",
|
||||
.chan_nr = 5,
|
||||
.led_current = 50,
|
||||
.max_current = 100,
|
||||
}, {
|
||||
.name = "lp5523:r",
|
||||
.chan_nr = 6,
|
||||
.led_current = 50,
|
||||
.max_current = 100,
|
||||
}, {
|
||||
.name = "lp5523:kb5",
|
||||
.chan_nr = 7,
|
||||
.led_current = 50,
|
||||
.max_current = 100,
|
||||
}, {
|
||||
.name = "lp5523:kb6",
|
||||
.chan_nr = 8,
|
||||
.led_current = 50,
|
||||
.max_current = 100,
|
||||
}
|
||||
};
|
||||
|
||||
|
|
|
@ -1,139 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2009 Texas Instruments Inc.
|
||||
* Mikkel Christensen <mlc@ti.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/serial_8250.h>
|
||||
#include <linux/smsc911x.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#include <linux/regulator/fixed.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
|
||||
#include "gpmc.h"
|
||||
#include "gpmc-smsc911x.h"
|
||||
|
||||
#include "board-zoom.h"
|
||||
|
||||
#include "soc.h"
|
||||
#include "common.h"
|
||||
|
||||
#define ZOOM_SMSC911X_CS 7
|
||||
#define ZOOM_SMSC911X_GPIO 158
|
||||
#define ZOOM_QUADUART_CS 3
|
||||
#define ZOOM_QUADUART_GPIO 102
|
||||
#define ZOOM_QUADUART_RST_GPIO 152
|
||||
#define QUART_CLK 1843200
|
||||
#define DEBUG_BASE 0x08000000
|
||||
#define ZOOM_ETHR_START DEBUG_BASE
|
||||
|
||||
static struct omap_smsc911x_platform_data zoom_smsc911x_cfg = {
|
||||
.cs = ZOOM_SMSC911X_CS,
|
||||
.gpio_irq = ZOOM_SMSC911X_GPIO,
|
||||
.gpio_reset = -EINVAL,
|
||||
.flags = SMSC911X_USE_32BIT,
|
||||
};
|
||||
|
||||
static inline void __init zoom_init_smsc911x(void)
|
||||
{
|
||||
gpmc_smsc911x_init(&zoom_smsc911x_cfg);
|
||||
}
|
||||
|
||||
static struct plat_serial8250_port serial_platform_data[] = {
|
||||
{
|
||||
.mapbase = ZOOM_UART_BASE,
|
||||
.flags = UPF_BOOT_AUTOCONF|UPF_IOREMAP|UPF_SHARE_IRQ,
|
||||
.irqflags = IRQF_SHARED | IRQF_TRIGGER_RISING,
|
||||
.iotype = UPIO_MEM,
|
||||
.regshift = 1,
|
||||
.uartclk = QUART_CLK,
|
||||
}, {
|
||||
.flags = 0
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_device zoom_debugboard_serial_device = {
|
||||
.name = "serial8250",
|
||||
.id = PLAT8250_DEV_PLATFORM,
|
||||
.dev = {
|
||||
.platform_data = serial_platform_data,
|
||||
},
|
||||
};
|
||||
|
||||
static inline void __init zoom_init_quaduart(void)
|
||||
{
|
||||
int quart_cs;
|
||||
unsigned long cs_mem_base;
|
||||
int quart_gpio = 0;
|
||||
|
||||
if (gpio_request_one(ZOOM_QUADUART_RST_GPIO,
|
||||
GPIOF_OUT_INIT_LOW,
|
||||
"TL16CP754C GPIO") < 0) {
|
||||
pr_err("Failed to request GPIO%d for TL16CP754C\n",
|
||||
ZOOM_QUADUART_RST_GPIO);
|
||||
return;
|
||||
}
|
||||
|
||||
quart_cs = ZOOM_QUADUART_CS;
|
||||
|
||||
if (gpmc_cs_request(quart_cs, SZ_1M, &cs_mem_base) < 0) {
|
||||
pr_err("Failed to request GPMC mem for Quad UART(TL16CP754C)\n");
|
||||
return;
|
||||
}
|
||||
|
||||
quart_gpio = ZOOM_QUADUART_GPIO;
|
||||
|
||||
if (gpio_request_one(quart_gpio, GPIOF_IN, "TL16CP754C GPIO") < 0)
|
||||
printk(KERN_ERR "Failed to request GPIO%d for TL16CP754C\n",
|
||||
quart_gpio);
|
||||
|
||||
serial_platform_data[0].irq = gpio_to_irq(102);
|
||||
}
|
||||
|
||||
static inline int omap_zoom_debugboard_detect(void)
|
||||
{
|
||||
int debug_board_detect = 0;
|
||||
int ret = 1;
|
||||
|
||||
debug_board_detect = ZOOM_SMSC911X_GPIO;
|
||||
|
||||
if (gpio_request_one(debug_board_detect, GPIOF_IN,
|
||||
"Zoom debug board detect") < 0) {
|
||||
pr_err("Failed to request GPIO%d for Zoom debug board detect\n",
|
||||
debug_board_detect);
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (!gpio_get_value(debug_board_detect)) {
|
||||
ret = 0;
|
||||
}
|
||||
gpio_free(debug_board_detect);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct platform_device *zoom_devices[] __initdata = {
|
||||
&zoom_debugboard_serial_device,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply dummy_supplies[] = {
|
||||
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
|
||||
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
|
||||
};
|
||||
|
||||
int __init zoom_debugboard_init(void)
|
||||
{
|
||||
if (!omap_zoom_debugboard_detect())
|
||||
return 0;
|
||||
|
||||
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
|
||||
zoom_init_smsc911x();
|
||||
zoom_init_quaduart();
|
||||
return platform_add_devices(zoom_devices, ARRAY_SIZE(zoom_devices));
|
||||
}
|
|
@ -1,71 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2010 Texas Instruments Inc.
|
||||
*
|
||||
* Modified from mach-omap2/board-zoom-peripherals.c
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/platform_data/spi-omap2-mcspi.h>
|
||||
#include <video/omapdss.h>
|
||||
#include <video/omap-panel-data.h>
|
||||
|
||||
#include "board-zoom.h"
|
||||
#include "soc.h"
|
||||
#include "common.h"
|
||||
|
||||
#define LCD_PANEL_RESET_GPIO_PROD 96
|
||||
#define LCD_PANEL_RESET_GPIO_PILOT 55
|
||||
#define LCD_PANEL_QVGA_GPIO 56
|
||||
|
||||
static struct panel_nec_nl8048hl11_platform_data zoom_lcd_pdata = {
|
||||
.name = "lcd",
|
||||
.source = "dpi.0",
|
||||
|
||||
.data_lines = 24,
|
||||
|
||||
.res_gpio = -1, /* filled in code */
|
||||
.qvga_gpio = LCD_PANEL_QVGA_GPIO,
|
||||
};
|
||||
|
||||
static struct omap_dss_board_info zoom_dss_data = {
|
||||
.default_display_name = "lcd",
|
||||
};
|
||||
|
||||
static void __init zoom_lcd_panel_init(void)
|
||||
{
|
||||
zoom_lcd_pdata.res_gpio = (omap_rev() > OMAP3430_REV_ES3_0) ?
|
||||
LCD_PANEL_RESET_GPIO_PROD :
|
||||
LCD_PANEL_RESET_GPIO_PILOT;
|
||||
}
|
||||
|
||||
static struct omap2_mcspi_device_config dss_lcd_mcspi_config = {
|
||||
.turbo_mode = 1,
|
||||
};
|
||||
|
||||
static struct spi_board_info nec_8048_spi_board_info[] __initdata = {
|
||||
[0] = {
|
||||
.modalias = "panel-nec-nl8048hl11",
|
||||
.bus_num = 1,
|
||||
.chip_select = 2,
|
||||
.max_speed_hz = 375000,
|
||||
.controller_data = &dss_lcd_mcspi_config,
|
||||
.platform_data = &zoom_lcd_pdata,
|
||||
},
|
||||
};
|
||||
|
||||
void __init zoom_display_init(void)
|
||||
{
|
||||
omap_display_init(&zoom_dss_data);
|
||||
zoom_lcd_panel_init();
|
||||
spi_register_board_info(nec_8048_spi_board_info,
|
||||
ARRAY_SIZE(nec_8048_spi_board_info));
|
||||
}
|
||||
|
|
@ -1,360 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2009 Texas Instruments Inc.
|
||||
*
|
||||
* Modified from mach-omap2/board-zoom2.c
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/input/matrix_keypad.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/i2c/twl.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
#include <linux/wl12xx.h>
|
||||
#include <linux/mmc/host.h>
|
||||
#include <linux/platform_data/gpio-omap.h>
|
||||
#include <linux/platform_data/omap-twl4030.h>
|
||||
#include <linux/usb/phy.h>
|
||||
#include <linux/pwm.h>
|
||||
#include <linux/leds_pwm.h>
|
||||
#include <linux/pwm_backlight.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include "common.h"
|
||||
|
||||
#include "board-zoom.h"
|
||||
|
||||
#include "mux.h"
|
||||
#include "hsmmc.h"
|
||||
#include "common-board-devices.h"
|
||||
|
||||
#define OMAP_ZOOM_WLAN_PMENA_GPIO (101)
|
||||
#define OMAP_ZOOM_TSC2004_IRQ_GPIO (153)
|
||||
#define OMAP_ZOOM_WLAN_IRQ_GPIO (162)
|
||||
|
||||
/* Zoom2 has Qwerty keyboard*/
|
||||
static uint32_t board_keymap[] = {
|
||||
KEY(0, 0, KEY_E),
|
||||
KEY(0, 1, KEY_R),
|
||||
KEY(0, 2, KEY_T),
|
||||
KEY(0, 3, KEY_HOME),
|
||||
KEY(0, 6, KEY_I),
|
||||
KEY(0, 7, KEY_LEFTSHIFT),
|
||||
KEY(1, 0, KEY_D),
|
||||
KEY(1, 1, KEY_F),
|
||||
KEY(1, 2, KEY_G),
|
||||
KEY(1, 3, KEY_SEND),
|
||||
KEY(1, 6, KEY_K),
|
||||
KEY(1, 7, KEY_ENTER),
|
||||
KEY(2, 0, KEY_X),
|
||||
KEY(2, 1, KEY_C),
|
||||
KEY(2, 2, KEY_V),
|
||||
KEY(2, 3, KEY_END),
|
||||
KEY(2, 6, KEY_DOT),
|
||||
KEY(2, 7, KEY_CAPSLOCK),
|
||||
KEY(3, 0, KEY_Z),
|
||||
KEY(3, 1, KEY_KPPLUS),
|
||||
KEY(3, 2, KEY_B),
|
||||
KEY(3, 3, KEY_F1),
|
||||
KEY(3, 6, KEY_O),
|
||||
KEY(3, 7, KEY_SPACE),
|
||||
KEY(4, 0, KEY_W),
|
||||
KEY(4, 1, KEY_Y),
|
||||
KEY(4, 2, KEY_U),
|
||||
KEY(4, 3, KEY_F2),
|
||||
KEY(4, 4, KEY_VOLUMEUP),
|
||||
KEY(4, 6, KEY_L),
|
||||
KEY(4, 7, KEY_LEFT),
|
||||
KEY(5, 0, KEY_S),
|
||||
KEY(5, 1, KEY_H),
|
||||
KEY(5, 2, KEY_J),
|
||||
KEY(5, 3, KEY_F3),
|
||||
KEY(5, 4, KEY_UNKNOWN),
|
||||
KEY(5, 5, KEY_VOLUMEDOWN),
|
||||
KEY(5, 6, KEY_M),
|
||||
KEY(5, 7, KEY_RIGHT),
|
||||
KEY(6, 0, KEY_Q),
|
||||
KEY(6, 1, KEY_A),
|
||||
KEY(6, 2, KEY_N),
|
||||
KEY(6, 3, KEY_BACKSPACE),
|
||||
KEY(6, 6, KEY_P),
|
||||
KEY(6, 7, KEY_UP),
|
||||
KEY(7, 0, KEY_PROG1), /*MACRO 1 <User defined> */
|
||||
KEY(7, 1, KEY_PROG2), /*MACRO 2 <User defined> */
|
||||
KEY(7, 2, KEY_PROG3), /*MACRO 3 <User defined> */
|
||||
KEY(7, 3, KEY_PROG4), /*MACRO 4 <User defined> */
|
||||
KEY(7, 6, KEY_SELECT),
|
||||
KEY(7, 7, KEY_DOWN)
|
||||
};
|
||||
|
||||
static struct matrix_keymap_data board_map_data = {
|
||||
.keymap = board_keymap,
|
||||
.keymap_size = ARRAY_SIZE(board_keymap),
|
||||
};
|
||||
|
||||
static struct twl4030_keypad_data zoom_kp_twl4030_data = {
|
||||
.keymap_data = &board_map_data,
|
||||
.rows = 8,
|
||||
.cols = 8,
|
||||
.rep = 1,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply zoom_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply zoom_vsim_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply zoom_vmmc2_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply zoom_vmmc3_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"),
|
||||
};
|
||||
|
||||
/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
|
||||
static struct regulator_init_data zoom_vmmc1 = {
|
||||
.constraints = {
|
||||
.min_uV = 1850000,
|
||||
.max_uV = 3150000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(zoom_vmmc1_supply),
|
||||
.consumer_supplies = zoom_vmmc1_supply,
|
||||
};
|
||||
|
||||
/* VMMC2 for MMC2 card */
|
||||
static struct regulator_init_data zoom_vmmc2 = {
|
||||
.constraints = {
|
||||
.min_uV = 1850000,
|
||||
.max_uV = 1850000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(zoom_vmmc2_supply),
|
||||
.consumer_supplies = zoom_vmmc2_supply,
|
||||
};
|
||||
|
||||
/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
|
||||
static struct regulator_init_data zoom_vsim = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 3000000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(zoom_vsim_supply),
|
||||
.consumer_supplies = zoom_vsim_supply,
|
||||
};
|
||||
|
||||
static struct regulator_init_data zoom_vmmc3 = {
|
||||
.constraints = {
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(zoom_vmmc3_supply),
|
||||
.consumer_supplies = zoom_vmmc3_supply,
|
||||
};
|
||||
|
||||
static struct fixed_voltage_config zoom_vwlan = {
|
||||
.supply_name = "vwl1271",
|
||||
.microvolts = 1800000, /* 1.8V */
|
||||
.gpio = OMAP_ZOOM_WLAN_PMENA_GPIO,
|
||||
.startup_delay = 70000, /* 70msec */
|
||||
.enable_high = 1,
|
||||
.enabled_at_boot = 0,
|
||||
.init_data = &zoom_vmmc3,
|
||||
};
|
||||
|
||||
static struct platform_device omap_vwlan_device = {
|
||||
.name = "reg-fixed-voltage",
|
||||
.id = 1,
|
||||
.dev = {
|
||||
.platform_data = &zoom_vwlan,
|
||||
},
|
||||
};
|
||||
|
||||
static struct pwm_lookup zoom_pwm_lookup[] = {
|
||||
PWM_LOOKUP("twl-pwm", 0, "leds_pwm", "zoom::keypad"),
|
||||
PWM_LOOKUP("twl-pwm", 1, "pwm-backlight", "backlight"),
|
||||
};
|
||||
|
||||
static struct led_pwm zoom_pwm_leds[] = {
|
||||
{
|
||||
.name = "zoom::keypad",
|
||||
.max_brightness = 127,
|
||||
.pwm_period_ns = 7812500,
|
||||
},
|
||||
};
|
||||
|
||||
static struct led_pwm_platform_data zoom_pwm_data = {
|
||||
.num_leds = ARRAY_SIZE(zoom_pwm_leds),
|
||||
.leds = zoom_pwm_leds,
|
||||
};
|
||||
|
||||
static struct platform_device zoom_leds_pwm = {
|
||||
.name = "leds_pwm",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &zoom_pwm_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_pwm_backlight_data zoom_backlight_data = {
|
||||
.pwm_id = 1,
|
||||
.max_brightness = 127,
|
||||
.dft_brightness = 127,
|
||||
.pwm_period_ns = 7812500,
|
||||
};
|
||||
|
||||
static struct platform_device zoom_backlight_pwm = {
|
||||
.name = "pwm-backlight",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &zoom_backlight_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device *zoom_devices[] __initdata = {
|
||||
&omap_vwlan_device,
|
||||
&zoom_leds_pwm,
|
||||
&zoom_backlight_pwm,
|
||||
};
|
||||
|
||||
static struct wl12xx_platform_data omap_zoom_wlan_data __initdata = {
|
||||
.board_ref_clock = WL12XX_REFCLOCK_26, /* 26 MHz */
|
||||
};
|
||||
|
||||
static struct omap2_hsmmc_info mmc[] = {
|
||||
{
|
||||
.name = "external",
|
||||
.mmc = 1,
|
||||
.caps = MMC_CAP_4_BIT_DATA,
|
||||
.gpio_wp = -EINVAL,
|
||||
.power_saving = true,
|
||||
.deferred = true,
|
||||
},
|
||||
{
|
||||
.name = "internal",
|
||||
.mmc = 2,
|
||||
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
|
||||
.gpio_cd = -EINVAL,
|
||||
.gpio_wp = -EINVAL,
|
||||
.nonremovable = true,
|
||||
.power_saving = true,
|
||||
},
|
||||
{
|
||||
.name = "wl1271",
|
||||
.mmc = 3,
|
||||
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
|
||||
.gpio_wp = -EINVAL,
|
||||
.gpio_cd = -EINVAL,
|
||||
.nonremovable = true,
|
||||
},
|
||||
{} /* Terminator */
|
||||
};
|
||||
|
||||
static struct omap_tw4030_pdata omap_twl4030_audio_data = {
|
||||
.voice_connected = true,
|
||||
.custom_routing = true,
|
||||
|
||||
.has_hs = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
|
||||
.has_hf = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
|
||||
|
||||
.has_mainmic = true,
|
||||
.has_submic = true,
|
||||
.has_hsmic = true,
|
||||
.has_linein = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
|
||||
};
|
||||
|
||||
static int zoom_twl_gpio_setup(struct device *dev,
|
||||
unsigned gpio, unsigned ngpio)
|
||||
{
|
||||
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
|
||||
mmc[0].gpio_cd = gpio + 0;
|
||||
omap_hsmmc_late_init(mmc);
|
||||
|
||||
/* Audio setup */
|
||||
omap_twl4030_audio_data.jack_detect = gpio + 2;
|
||||
omap_twl4030_audio_init("Zoom2", &omap_twl4030_audio_data);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct twl4030_gpio_platform_data zoom_gpio_data = {
|
||||
.setup = zoom_twl_gpio_setup,
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data zoom_twldata = {
|
||||
/* platform_data for children goes here */
|
||||
.gpio = &zoom_gpio_data,
|
||||
.keypad = &zoom_kp_twl4030_data,
|
||||
.vmmc1 = &zoom_vmmc1,
|
||||
.vmmc2 = &zoom_vmmc2,
|
||||
.vsim = &zoom_vsim,
|
||||
};
|
||||
|
||||
static int __init omap_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&zoom_twldata,
|
||||
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
|
||||
TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
|
||||
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
|
||||
if (machine_is_omap_zoom2())
|
||||
zoom_twldata.audio->codec->ramp_delay_value = 3; /* 161 ms */
|
||||
|
||||
omap_pmic_init(1, 2400, "twl5030", 7 + OMAP_INTC_START, &zoom_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, NULL, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void enable_board_wakeup_source(void)
|
||||
{
|
||||
/* T2 interrupt line (keypad) */
|
||||
omap_mux_init_signal("sys_nirq",
|
||||
OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
|
||||
}
|
||||
|
||||
void __init zoom_peripherals_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
omap_zoom_wlan_data.irq = gpio_to_irq(OMAP_ZOOM_WLAN_IRQ_GPIO);
|
||||
ret = wl12xx_set_platform_data(&omap_zoom_wlan_data);
|
||||
|
||||
if (ret)
|
||||
pr_err("error setting wl12xx data: %d\n", ret);
|
||||
|
||||
omap_hsmmc_init(mmc);
|
||||
omap_i2c_init();
|
||||
pwm_add_table(zoom_pwm_lookup, ARRAY_SIZE(zoom_pwm_lookup));
|
||||
platform_add_devices(zoom_devices, ARRAY_SIZE(zoom_devices));
|
||||
usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
|
||||
usb_musb_init(NULL);
|
||||
enable_board_wakeup_source();
|
||||
omap_serial_init();
|
||||
}
|
|
@ -1,159 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2009-2010 Texas Instruments Inc.
|
||||
* Mikkel Christensen <mlc@ti.com>
|
||||
* Felipe Balbi <balbi@ti.com>
|
||||
*
|
||||
* Modified from mach-omap2/board-ldp.c
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/i2c/twl.h>
|
||||
#include <linux/mtd/nand.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#include "common.h"
|
||||
|
||||
#include "board-zoom.h"
|
||||
|
||||
#include "board-flash.h"
|
||||
#include "mux.h"
|
||||
#include "sdram-micron-mt46h32m32lf-6.h"
|
||||
#include "sdram-hynix-h8mbx00u0mer-0em.h"
|
||||
|
||||
#define ZOOM3_EHCI_RESET_GPIO 64
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
static struct omap_board_mux board_mux[] __initdata = {
|
||||
/* WLAN IRQ - GPIO 162 */
|
||||
OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
|
||||
/* WLAN POWER ENABLE - GPIO 101 */
|
||||
OMAP3_MUX(CAM_D2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
|
||||
/* WLAN SDIO: MMC3 CMD */
|
||||
OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP),
|
||||
/* WLAN SDIO: MMC3 CLK */
|
||||
OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
|
||||
/* WLAN SDIO: MMC3 DAT[0-3] */
|
||||
OMAP3_MUX(ETK_D3, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
|
||||
OMAP3_MUX(ETK_D4, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
|
||||
OMAP3_MUX(ETK_D5, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
|
||||
OMAP3_MUX(ETK_D6, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
|
||||
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct mtd_partition zoom_nand_partitions[] = {
|
||||
/* All the partition sizes are listed in terms of NAND block size */
|
||||
{
|
||||
.name = "X-Loader-NAND",
|
||||
.offset = 0,
|
||||
.size = 4 * (64 * 2048), /* 512KB, 0x80000 */
|
||||
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
||||
},
|
||||
{
|
||||
.name = "U-Boot-NAND",
|
||||
.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
|
||||
.size = 10 * (64 * 2048), /* 1.25MB, 0x140000 */
|
||||
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
||||
},
|
||||
{
|
||||
.name = "Boot Env-NAND",
|
||||
.offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
|
||||
.size = 2 * (64 * 2048), /* 256KB, 0x40000 */
|
||||
},
|
||||
{
|
||||
.name = "Kernel-NAND",
|
||||
.offset = MTDPART_OFS_APPEND, /* Offset = 0x0200000*/
|
||||
.size = 240 * (64 * 2048), /* 30M, 0x1E00000 */
|
||||
},
|
||||
{
|
||||
.name = "system",
|
||||
.offset = MTDPART_OFS_APPEND, /* Offset = 0x2000000 */
|
||||
.size = 3328 * (64 * 2048), /* 416M, 0x1A000000 */
|
||||
},
|
||||
{
|
||||
.name = "userdata",
|
||||
.offset = MTDPART_OFS_APPEND, /* Offset = 0x1C000000*/
|
||||
.size = 256 * (64 * 2048), /* 32M, 0x2000000 */
|
||||
},
|
||||
{
|
||||
.name = "cache",
|
||||
.offset = MTDPART_OFS_APPEND, /* Offset = 0x1E000000*/
|
||||
.size = 256 * (64 * 2048), /* 32M, 0x2000000 */
|
||||
},
|
||||
};
|
||||
|
||||
static struct usbhs_phy_data phy_data[] __initdata = {
|
||||
{
|
||||
.port = 2,
|
||||
.reset_gpio = ZOOM3_EHCI_RESET_GPIO,
|
||||
.vcc_gpio = -EINVAL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
|
||||
.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
|
||||
};
|
||||
|
||||
static void __init omap_zoom_init(void)
|
||||
{
|
||||
if (machine_is_omap_zoom2()) {
|
||||
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
|
||||
} else if (machine_is_omap_zoom3()) {
|
||||
omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
|
||||
omap_mux_init_gpio(ZOOM3_EHCI_RESET_GPIO, OMAP_PIN_OUTPUT);
|
||||
|
||||
usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
|
||||
usbhs_init(&usbhs_bdata);
|
||||
}
|
||||
|
||||
board_nand_init(zoom_nand_partitions,
|
||||
ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS,
|
||||
NAND_BUSWIDTH_16, nand_default_timings);
|
||||
zoom_debugboard_init();
|
||||
zoom_peripherals_init();
|
||||
|
||||
if (machine_is_omap_zoom2())
|
||||
omap_sdrc_init(mt46h32m32lf6_sdrc_params,
|
||||
mt46h32m32lf6_sdrc_params);
|
||||
else if (machine_is_omap_zoom3())
|
||||
omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
|
||||
h8mbx00u0mer0em_sdrc_params);
|
||||
|
||||
zoom_display_init();
|
||||
}
|
||||
|
||||
MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
|
||||
.atag_offset = 0x100,
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3430_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.handle_irq = omap3_intc_handle_irq,
|
||||
.init_machine = omap_zoom_init,
|
||||
.init_late = omap3430_init_late,
|
||||
.init_time = omap3_sync32k_timer_init,
|
||||
.restart = omap3xxx_restart,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
|
||||
.atag_offset = 0x100,
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3630_init_early,
|
||||
.init_irq = omap3_init_irq,
|
||||
.handle_irq = omap3_intc_handle_irq,
|
||||
.init_machine = omap_zoom_init,
|
||||
.init_late = omap3630_init_late,
|
||||
.init_time = omap3_sync32k_timer_init,
|
||||
.restart = omap3xxx_restart,
|
||||
MACHINE_END
|
|
@ -1,10 +0,0 @@
|
|||
/*
|
||||
* Defines for zoom boards
|
||||
*/
|
||||
#include <video/omapdss.h>
|
||||
|
||||
#define ZOOM_NAND_CS 0
|
||||
|
||||
extern int __init zoom_debugboard_init(void);
|
||||
extern void __init zoom_peripherals_init(void);
|
||||
extern void __init zoom_display_init(void);
|
|
@ -272,9 +272,19 @@ static int omap2_onenand_setup_async(void __iomem *onenand_base)
|
|||
struct gpmc_timings t;
|
||||
int ret;
|
||||
|
||||
if (gpmc_onenand_data->of_node)
|
||||
if (gpmc_onenand_data->of_node) {
|
||||
gpmc_read_settings_dt(gpmc_onenand_data->of_node,
|
||||
&onenand_async);
|
||||
if (onenand_async.sync_read || onenand_async.sync_write) {
|
||||
if (onenand_async.sync_write)
|
||||
gpmc_onenand_data->flags |=
|
||||
ONENAND_SYNC_READWRITE;
|
||||
else
|
||||
gpmc_onenand_data->flags |= ONENAND_SYNC_READ;
|
||||
onenand_async.sync_read = false;
|
||||
onenand_async.sync_write = false;
|
||||
}
|
||||
}
|
||||
|
||||
omap2_onenand_set_async_mode(onenand_base);
|
||||
|
||||
|
|
|
@ -28,7 +28,7 @@
|
|||
#define OMAP_PULL_UP (1 << 4)
|
||||
#define OMAP_ALTELECTRICALSEL (1 << 5)
|
||||
|
||||
/* 34xx specific mux bit defines */
|
||||
/* omap3/4/5 specific mux bit defines */
|
||||
#define OMAP_INPUT_EN (1 << 8)
|
||||
#define OMAP_OFF_EN (1 << 9)
|
||||
#define OMAP_OFFOUT_EN (1 << 10)
|
||||
|
@ -36,8 +36,6 @@
|
|||
#define OMAP_OFF_PULL_EN (1 << 12)
|
||||
#define OMAP_OFF_PULL_UP (1 << 13)
|
||||
#define OMAP_WAKEUP_EN (1 << 14)
|
||||
|
||||
/* 44xx specific mux bit defines */
|
||||
#define OMAP_WAKEUP_EVENT (1 << 15)
|
||||
|
||||
/* Active pin states */
|
||||
|
|
|
@ -628,7 +628,7 @@ void __init omap4_local_timer_init(void)
|
|||
#endif /* CONFIG_HAVE_ARM_TWD */
|
||||
#endif /* CONFIG_ARCH_OMAP4 */
|
||||
|
||||
#ifdef CONFIG_SOC_OMAP5
|
||||
#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
|
||||
void __init omap5_realtime_timer_init(void)
|
||||
{
|
||||
omap4_sync32k_timer_init();
|
||||
|
@ -636,7 +636,7 @@ void __init omap5_realtime_timer_init(void)
|
|||
|
||||
clocksource_of_init();
|
||||
}
|
||||
#endif /* CONFIG_SOC_OMAP5 */
|
||||
#endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */
|
||||
|
||||
/**
|
||||
* omap_timer_init - build and register timer device with an
|
||||
|
|
|
@ -22,7 +22,7 @@
|
|||
|
||||
static __always_inline bool arch_static_branch(struct static_key *key)
|
||||
{
|
||||
asm goto("1:\tnop\n\t"
|
||||
asm_volatile_goto("1:\tnop\n\t"
|
||||
"nop\n\t"
|
||||
".pushsection __jump_table, \"aw\"\n\t"
|
||||
WORD_INSN " 1b, %l[l_yes], %0\n\t"
|
||||
|
|
|
@ -73,7 +73,7 @@
|
|||
3:
|
||||
|
||||
#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)
|
||||
PTR_L t8, __stack_chk_guard
|
||||
PTR_LA t8, __stack_chk_guard
|
||||
LONG_L t9, TASK_STACK_CANARY(a1)
|
||||
LONG_S t9, 0(t8)
|
||||
#endif
|
||||
|
|
|
@ -67,7 +67,7 @@ LEAF(resume)
|
|||
1:
|
||||
|
||||
#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)
|
||||
PTR_L t8, __stack_chk_guard
|
||||
PTR_LA t8, __stack_chk_guard
|
||||
LONG_L t9, TASK_STACK_CANARY(a1)
|
||||
LONG_S t9, 0(t8)
|
||||
#endif
|
||||
|
|
|
@ -69,7 +69,7 @@
|
|||
1:
|
||||
|
||||
#if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP)
|
||||
PTR_L t8, __stack_chk_guard
|
||||
PTR_LA t8, __stack_chk_guard
|
||||
LONG_L t9, TASK_STACK_CANARY(a1)
|
||||
LONG_S t9, 0(t8)
|
||||
#endif
|
||||
|
|
|
@ -6,7 +6,7 @@ struct pt_regs;
|
|||
|
||||
/* traps.c */
|
||||
void parisc_terminate(char *msg, struct pt_regs *regs,
|
||||
int code, unsigned long offset);
|
||||
int code, unsigned long offset) __noreturn __cold;
|
||||
|
||||
/* mm/fault.c */
|
||||
void do_page_fault(struct pt_regs *regs, unsigned long code,
|
||||
|
|
|
@ -602,6 +602,7 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long
|
|||
__flush_cache_page(vma, vmaddr, PFN_PHYS(pfn));
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(flush_cache_page);
|
||||
|
||||
#ifdef CONFIG_PARISC_TMPALIAS
|
||||
|
||||
|
|
|
@ -72,7 +72,6 @@ enum ipi_message_type {
|
|||
IPI_NOP=0,
|
||||
IPI_RESCHEDULE=1,
|
||||
IPI_CALL_FUNC,
|
||||
IPI_CALL_FUNC_SINGLE,
|
||||
IPI_CPU_START,
|
||||
IPI_CPU_STOP,
|
||||
IPI_CPU_TEST
|
||||
|
@ -164,11 +163,6 @@ ipi_interrupt(int irq, void *dev_id)
|
|||
generic_smp_call_function_interrupt();
|
||||
break;
|
||||
|
||||
case IPI_CALL_FUNC_SINGLE:
|
||||
smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC_SINGLE\n", this_cpu);
|
||||
generic_smp_call_function_single_interrupt();
|
||||
break;
|
||||
|
||||
case IPI_CPU_START:
|
||||
smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_START\n", this_cpu);
|
||||
break;
|
||||
|
@ -260,7 +254,7 @@ void arch_send_call_function_ipi_mask(const struct cpumask *mask)
|
|||
|
||||
void arch_send_call_function_single_ipi(int cpu)
|
||||
{
|
||||
send_IPI_single(cpu, IPI_CALL_FUNC_SINGLE);
|
||||
send_IPI_single(cpu, IPI_CALL_FUNC);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -291,11 +291,6 @@ void die_if_kernel(char *str, struct pt_regs *regs, long err)
|
|||
do_exit(SIGSEGV);
|
||||
}
|
||||
|
||||
int syscall_ipi(int (*syscall) (struct pt_regs *), struct pt_regs *regs)
|
||||
{
|
||||
return syscall(regs);
|
||||
}
|
||||
|
||||
/* gdb uses break 4,8 */
|
||||
#define GDB_BREAK_INSN 0x10004
|
||||
static void handle_gdb_break(struct pt_regs *regs, int wot)
|
||||
|
@ -805,14 +800,14 @@ void notrace handle_interruption(int code, struct pt_regs *regs)
|
|||
else {
|
||||
|
||||
/*
|
||||
* The kernel should never fault on its own address space.
|
||||
* The kernel should never fault on its own address space,
|
||||
* unless pagefault_disable() was called before.
|
||||
*/
|
||||
|
||||
if (fault_space == 0)
|
||||
if (fault_space == 0 && !in_atomic())
|
||||
{
|
||||
pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
|
||||
parisc_terminate("Kernel Fault", regs, code, fault_address);
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -56,7 +56,7 @@
|
|||
#ifdef __KERNEL__
|
||||
#include <linux/module.h>
|
||||
#include <linux/compiler.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <linux/uaccess.h>
|
||||
#define s_space "%%sr1"
|
||||
#define d_space "%%sr2"
|
||||
#else
|
||||
|
@ -524,4 +524,17 @@ EXPORT_SYMBOL(copy_to_user);
|
|||
EXPORT_SYMBOL(copy_from_user);
|
||||
EXPORT_SYMBOL(copy_in_user);
|
||||
EXPORT_SYMBOL(memcpy);
|
||||
|
||||
long probe_kernel_read(void *dst, const void *src, size_t size)
|
||||
{
|
||||
unsigned long addr = (unsigned long)src;
|
||||
|
||||
if (size < 0 || addr < PAGE_SIZE)
|
||||
return -EFAULT;
|
||||
|
||||
/* check for I/O space F_EXTEND(0xfff00000) access as well? */
|
||||
|
||||
return __probe_kernel_read(dst, src, size);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
@ -171,20 +171,25 @@ void do_page_fault(struct pt_regs *regs, unsigned long code,
|
|||
unsigned long address)
|
||||
{
|
||||
struct vm_area_struct *vma, *prev_vma;
|
||||
struct task_struct *tsk = current;
|
||||
struct mm_struct *mm = tsk->mm;
|
||||
struct task_struct *tsk;
|
||||
struct mm_struct *mm;
|
||||
unsigned long acc_type;
|
||||
int fault;
|
||||
unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
|
||||
unsigned int flags;
|
||||
|
||||
if (in_atomic() || !mm)
|
||||
if (in_atomic())
|
||||
goto no_context;
|
||||
|
||||
tsk = current;
|
||||
mm = tsk->mm;
|
||||
if (!mm)
|
||||
goto no_context;
|
||||
|
||||
flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
|
||||
if (user_mode(regs))
|
||||
flags |= FAULT_FLAG_USER;
|
||||
|
||||
acc_type = parisc_acctyp(code, regs->iir);
|
||||
|
||||
if (acc_type & VM_WRITE)
|
||||
flags |= FAULT_FLAG_WRITE;
|
||||
retry:
|
||||
|
|
|
@ -19,7 +19,7 @@
|
|||
|
||||
static __always_inline bool arch_static_branch(struct static_key *key)
|
||||
{
|
||||
asm goto("1:\n\t"
|
||||
asm_volatile_goto("1:\n\t"
|
||||
"nop\n\t"
|
||||
".pushsection __jump_table, \"aw\"\n\t"
|
||||
JUMP_ENTRY_TYPE "1b, %l[l_yes], %c0\n\t"
|
||||
|
|
|
@ -495,14 +495,15 @@ void __do_irq(struct pt_regs *regs)
|
|||
void do_IRQ(struct pt_regs *regs)
|
||||
{
|
||||
struct pt_regs *old_regs = set_irq_regs(regs);
|
||||
struct thread_info *curtp, *irqtp;
|
||||
struct thread_info *curtp, *irqtp, *sirqtp;
|
||||
|
||||
/* Switch to the irq stack to handle this */
|
||||
curtp = current_thread_info();
|
||||
irqtp = hardirq_ctx[raw_smp_processor_id()];
|
||||
sirqtp = softirq_ctx[raw_smp_processor_id()];
|
||||
|
||||
/* Already there ? */
|
||||
if (unlikely(curtp == irqtp)) {
|
||||
if (unlikely(curtp == irqtp || curtp == sirqtp)) {
|
||||
__do_irq(regs);
|
||||
set_irq_regs(old_regs);
|
||||
return;
|
||||
|
|
|
@ -1066,7 +1066,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
|
|||
BEGIN_FTR_SECTION
|
||||
mfspr r8, SPRN_DSCR
|
||||
ld r7, HSTATE_DSCR(r13)
|
||||
std r8, VCPU_DSCR(r7)
|
||||
std r8, VCPU_DSCR(r9)
|
||||
mtspr SPRN_DSCR, r7
|
||||
END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
|
||||
|
||||
|
|
|
@ -332,6 +332,13 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
|||
unsigned long hva;
|
||||
int pfnmap = 0;
|
||||
int tsize = BOOK3E_PAGESZ_4K;
|
||||
int ret = 0;
|
||||
unsigned long mmu_seq;
|
||||
struct kvm *kvm = vcpu_e500->vcpu.kvm;
|
||||
|
||||
/* used to check for invalidations in progress */
|
||||
mmu_seq = kvm->mmu_notifier_seq;
|
||||
smp_rmb();
|
||||
|
||||
/*
|
||||
* Translate guest physical to true physical, acquiring
|
||||
|
@ -449,6 +456,12 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
|||
gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
|
||||
}
|
||||
|
||||
spin_lock(&kvm->mmu_lock);
|
||||
if (mmu_notifier_retry(kvm, mmu_seq)) {
|
||||
ret = -EAGAIN;
|
||||
goto out;
|
||||
}
|
||||
|
||||
kvmppc_e500_ref_setup(ref, gtlbe, pfn);
|
||||
|
||||
kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize,
|
||||
|
@ -457,10 +470,13 @@ static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
|||
/* Clear i-cache for new pages */
|
||||
kvmppc_mmu_flush_icache(pfn);
|
||||
|
||||
out:
|
||||
spin_unlock(&kvm->mmu_lock);
|
||||
|
||||
/* Drop refcount on page, so that mmu notifiers can clear it */
|
||||
kvm_release_pfn_clean(pfn);
|
||||
|
||||
return 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* XXX only map the one-one case, for now use TLB0 */
|
||||
|
|
|
@ -15,7 +15,7 @@
|
|||
|
||||
static __always_inline bool arch_static_branch(struct static_key *key)
|
||||
{
|
||||
asm goto("0: brcl 0,0\n"
|
||||
asm_volatile_goto("0: brcl 0,0\n"
|
||||
".pushsection __jump_table, \"aw\"\n"
|
||||
ASM_ALIGN "\n"
|
||||
ASM_PTR " 0b, %l[label], %0\n"
|
||||
|
|
|
@ -40,28 +40,26 @@ static inline void *load_real_addr(void *addr)
|
|||
}
|
||||
|
||||
/*
|
||||
* Copy up to one page to vmalloc or real memory
|
||||
* Copy real to virtual or real memory
|
||||
*/
|
||||
static ssize_t copy_page_real(void *buf, void *src, size_t csize)
|
||||
static int copy_from_realmem(void *dest, void *src, size_t count)
|
||||
{
|
||||
size_t size;
|
||||
unsigned long size;
|
||||
int rc;
|
||||
|
||||
if (is_vmalloc_addr(buf)) {
|
||||
BUG_ON(csize >= PAGE_SIZE);
|
||||
/* If buf is not page aligned, copy first part */
|
||||
size = min(roundup(__pa(buf), PAGE_SIZE) - __pa(buf), csize);
|
||||
if (size) {
|
||||
if (memcpy_real(load_real_addr(buf), src, size))
|
||||
return -EFAULT;
|
||||
buf += size;
|
||||
src += size;
|
||||
}
|
||||
/* Copy second part */
|
||||
size = csize - size;
|
||||
return (size) ? memcpy_real(load_real_addr(buf), src, size) : 0;
|
||||
} else {
|
||||
return memcpy_real(buf, src, csize);
|
||||
}
|
||||
if (!count)
|
||||
return 0;
|
||||
if (!is_vmalloc_or_module_addr(dest))
|
||||
return memcpy_real(dest, src, count);
|
||||
do {
|
||||
size = min(count, PAGE_SIZE - (__pa(dest) & ~PAGE_MASK));
|
||||
if (memcpy_real(load_real_addr(dest), src, size))
|
||||
return -EFAULT;
|
||||
count -= size;
|
||||
dest += size;
|
||||
src += size;
|
||||
} while (count);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -114,7 +112,7 @@ static ssize_t copy_oldmem_page_kdump(char *buf, size_t csize,
|
|||
rc = copy_to_user_real((void __force __user *) buf,
|
||||
(void *) src, csize);
|
||||
else
|
||||
rc = copy_page_real(buf, (void *) src, csize);
|
||||
rc = copy_from_realmem(buf, (void *) src, csize);
|
||||
return (rc == 0) ? rc : csize;
|
||||
}
|
||||
|
||||
|
@ -210,7 +208,7 @@ int copy_from_oldmem(void *dest, void *src, size_t count)
|
|||
if (OLDMEM_BASE) {
|
||||
if ((unsigned long) src < OLDMEM_SIZE) {
|
||||
copied = min(count, OLDMEM_SIZE - (unsigned long) src);
|
||||
rc = memcpy_real(dest, src + OLDMEM_BASE, copied);
|
||||
rc = copy_from_realmem(dest, src + OLDMEM_BASE, copied);
|
||||
if (rc)
|
||||
return rc;
|
||||
}
|
||||
|
@ -223,7 +221,7 @@ int copy_from_oldmem(void *dest, void *src, size_t count)
|
|||
return rc;
|
||||
}
|
||||
}
|
||||
return memcpy_real(dest + copied, src + copied, count - copied);
|
||||
return copy_from_realmem(dest + copied, src + copied, count - copied);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -266,6 +266,7 @@ sysc_sigpending:
|
|||
tm __TI_flags+3(%r12),_TIF_SYSCALL
|
||||
jno sysc_return
|
||||
lm %r2,%r7,__PT_R2(%r11) # load svc arguments
|
||||
l %r10,__TI_sysc_table(%r12) # 31 bit system call table
|
||||
xr %r8,%r8 # svc 0 returns -ENOSYS
|
||||
clc __PT_INT_CODE+2(2,%r11),BASED(.Lnr_syscalls+2)
|
||||
jnl sysc_nr_ok # invalid svc number -> do svc 0
|
||||
|
|
|
@ -297,6 +297,7 @@ sysc_sigpending:
|
|||
tm __TI_flags+7(%r12),_TIF_SYSCALL
|
||||
jno sysc_return
|
||||
lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
|
||||
lg %r10,__TI_sysc_table(%r12) # address of system call table
|
||||
lghi %r8,0 # svc 0 returns -ENOSYS
|
||||
llgh %r1,__PT_INT_CODE+2(%r11) # load new svc number
|
||||
cghi %r1,NR_syscalls
|
||||
|
|
|
@ -67,6 +67,11 @@ static int __kprobes is_prohibited_opcode(kprobe_opcode_t *insn)
|
|||
case 0xac: /* stnsm */
|
||||
case 0xad: /* stosm */
|
||||
return -EINVAL;
|
||||
case 0xc6:
|
||||
switch (insn[0] & 0x0f) {
|
||||
case 0x00: /* exrl */
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
switch (insn[0]) {
|
||||
case 0x0101: /* pr */
|
||||
|
@ -180,7 +185,6 @@ static int __kprobes is_insn_relative_long(kprobe_opcode_t *insn)
|
|||
break;
|
||||
case 0xc6:
|
||||
switch (insn[0] & 0x0f) {
|
||||
case 0x00: /* exrl */
|
||||
case 0x02: /* pfdrl */
|
||||
case 0x04: /* cghrl */
|
||||
case 0x05: /* chrl */
|
||||
|
|
|
@ -9,7 +9,7 @@
|
|||
|
||||
static __always_inline bool arch_static_branch(struct static_key *key)
|
||||
{
|
||||
asm goto("1:\n\t"
|
||||
asm_volatile_goto("1:\n\t"
|
||||
"nop\n\t"
|
||||
"nop\n\t"
|
||||
".pushsection __jump_table, \"aw\"\n\t"
|
||||
|
|
|
@ -166,7 +166,7 @@ static inline int atomic_cmpxchg(atomic_t *v, int o, int n)
|
|||
*
|
||||
* Atomically sets @v to @i and returns old @v
|
||||
*/
|
||||
static inline u64 atomic64_xchg(atomic64_t *v, u64 n)
|
||||
static inline long long atomic64_xchg(atomic64_t *v, long long n)
|
||||
{
|
||||
return xchg64(&v->counter, n);
|
||||
}
|
||||
|
@ -180,7 +180,8 @@ static inline u64 atomic64_xchg(atomic64_t *v, u64 n)
|
|||
* Atomically checks if @v holds @o and replaces it with @n if so.
|
||||
* Returns the old value at @v.
|
||||
*/
|
||||
static inline u64 atomic64_cmpxchg(atomic64_t *v, u64 o, u64 n)
|
||||
static inline long long atomic64_cmpxchg(atomic64_t *v, long long o,
|
||||
long long n)
|
||||
{
|
||||
return cmpxchg64(&v->counter, o, n);
|
||||
}
|
||||
|
|
|
@ -80,7 +80,7 @@ static inline void atomic_set(atomic_t *v, int n)
|
|||
/* A 64bit atomic type */
|
||||
|
||||
typedef struct {
|
||||
u64 __aligned(8) counter;
|
||||
long long counter;
|
||||
} atomic64_t;
|
||||
|
||||
#define ATOMIC64_INIT(val) { (val) }
|
||||
|
@ -91,14 +91,14 @@ typedef struct {
|
|||
*
|
||||
* Atomically reads the value of @v.
|
||||
*/
|
||||
static inline u64 atomic64_read(const atomic64_t *v)
|
||||
static inline long long atomic64_read(const atomic64_t *v)
|
||||
{
|
||||
/*
|
||||
* Requires an atomic op to read both 32-bit parts consistently.
|
||||
* Casting away const is safe since the atomic support routines
|
||||
* do not write to memory if the value has not been modified.
|
||||
*/
|
||||
return _atomic64_xchg_add((u64 *)&v->counter, 0);
|
||||
return _atomic64_xchg_add((long long *)&v->counter, 0);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -108,7 +108,7 @@ static inline u64 atomic64_read(const atomic64_t *v)
|
|||
*
|
||||
* Atomically adds @i to @v.
|
||||
*/
|
||||
static inline void atomic64_add(u64 i, atomic64_t *v)
|
||||
static inline void atomic64_add(long long i, atomic64_t *v)
|
||||
{
|
||||
_atomic64_xchg_add(&v->counter, i);
|
||||
}
|
||||
|
@ -120,7 +120,7 @@ static inline void atomic64_add(u64 i, atomic64_t *v)
|
|||
*
|
||||
* Atomically adds @i to @v and returns @i + @v
|
||||
*/
|
||||
static inline u64 atomic64_add_return(u64 i, atomic64_t *v)
|
||||
static inline long long atomic64_add_return(long long i, atomic64_t *v)
|
||||
{
|
||||
smp_mb(); /* barrier for proper semantics */
|
||||
return _atomic64_xchg_add(&v->counter, i) + i;
|
||||
|
@ -135,7 +135,8 @@ static inline u64 atomic64_add_return(u64 i, atomic64_t *v)
|
|||
* Atomically adds @a to @v, so long as @v was not already @u.
|
||||
* Returns non-zero if @v was not @u, and zero otherwise.
|
||||
*/
|
||||
static inline u64 atomic64_add_unless(atomic64_t *v, u64 a, u64 u)
|
||||
static inline long long atomic64_add_unless(atomic64_t *v, long long a,
|
||||
long long u)
|
||||
{
|
||||
smp_mb(); /* barrier for proper semantics */
|
||||
return _atomic64_xchg_add_unless(&v->counter, a, u) != u;
|
||||
|
@ -151,7 +152,7 @@ static inline u64 atomic64_add_unless(atomic64_t *v, u64 a, u64 u)
|
|||
* atomic64_set() can't be just a raw store, since it would be lost if it
|
||||
* fell between the load and store of one of the other atomic ops.
|
||||
*/
|
||||
static inline void atomic64_set(atomic64_t *v, u64 n)
|
||||
static inline void atomic64_set(atomic64_t *v, long long n)
|
||||
{
|
||||
_atomic64_xchg(&v->counter, n);
|
||||
}
|
||||
|
@ -236,11 +237,13 @@ extern struct __get_user __atomic_xchg_add_unless(volatile int *p,
|
|||
extern struct __get_user __atomic_or(volatile int *p, int *lock, int n);
|
||||
extern struct __get_user __atomic_andn(volatile int *p, int *lock, int n);
|
||||
extern struct __get_user __atomic_xor(volatile int *p, int *lock, int n);
|
||||
extern u64 __atomic64_cmpxchg(volatile u64 *p, int *lock, u64 o, u64 n);
|
||||
extern u64 __atomic64_xchg(volatile u64 *p, int *lock, u64 n);
|
||||
extern u64 __atomic64_xchg_add(volatile u64 *p, int *lock, u64 n);
|
||||
extern u64 __atomic64_xchg_add_unless(volatile u64 *p,
|
||||
int *lock, u64 o, u64 n);
|
||||
extern long long __atomic64_cmpxchg(volatile long long *p, int *lock,
|
||||
long long o, long long n);
|
||||
extern long long __atomic64_xchg(volatile long long *p, int *lock, long long n);
|
||||
extern long long __atomic64_xchg_add(volatile long long *p, int *lock,
|
||||
long long n);
|
||||
extern long long __atomic64_xchg_add_unless(volatile long long *p,
|
||||
int *lock, long long o, long long n);
|
||||
|
||||
/* Return failure from the atomic wrappers. */
|
||||
struct __get_user __atomic_bad_address(int __user *addr);
|
||||
|
|
|
@ -35,10 +35,10 @@ int _atomic_xchg(int *ptr, int n);
|
|||
int _atomic_xchg_add(int *v, int i);
|
||||
int _atomic_xchg_add_unless(int *v, int a, int u);
|
||||
int _atomic_cmpxchg(int *ptr, int o, int n);
|
||||
u64 _atomic64_xchg(u64 *v, u64 n);
|
||||
u64 _atomic64_xchg_add(u64 *v, u64 i);
|
||||
u64 _atomic64_xchg_add_unless(u64 *v, u64 a, u64 u);
|
||||
u64 _atomic64_cmpxchg(u64 *v, u64 o, u64 n);
|
||||
long long _atomic64_xchg(long long *v, long long n);
|
||||
long long _atomic64_xchg_add(long long *v, long long i);
|
||||
long long _atomic64_xchg_add_unless(long long *v, long long a, long long u);
|
||||
long long _atomic64_cmpxchg(long long *v, long long o, long long n);
|
||||
|
||||
#define xchg(ptr, n) \
|
||||
({ \
|
||||
|
@ -53,7 +53,8 @@ u64 _atomic64_cmpxchg(u64 *v, u64 o, u64 n);
|
|||
if (sizeof(*(ptr)) != 4) \
|
||||
__cmpxchg_called_with_bad_pointer(); \
|
||||
smp_mb(); \
|
||||
(typeof(*(ptr)))_atomic_cmpxchg((int *)ptr, (int)o, (int)n); \
|
||||
(typeof(*(ptr)))_atomic_cmpxchg((int *)ptr, (int)o, \
|
||||
(int)n); \
|
||||
})
|
||||
|
||||
#define xchg64(ptr, n) \
|
||||
|
@ -61,7 +62,8 @@ u64 _atomic64_cmpxchg(u64 *v, u64 o, u64 n);
|
|||
if (sizeof(*(ptr)) != 8) \
|
||||
__xchg_called_with_bad_pointer(); \
|
||||
smp_mb(); \
|
||||
(typeof(*(ptr)))_atomic64_xchg((u64 *)(ptr), (u64)(n)); \
|
||||
(typeof(*(ptr)))_atomic64_xchg((long long *)(ptr), \
|
||||
(long long)(n)); \
|
||||
})
|
||||
|
||||
#define cmpxchg64(ptr, o, n) \
|
||||
|
@ -69,7 +71,8 @@ u64 _atomic64_cmpxchg(u64 *v, u64 o, u64 n);
|
|||
if (sizeof(*(ptr)) != 8) \
|
||||
__cmpxchg_called_with_bad_pointer(); \
|
||||
smp_mb(); \
|
||||
(typeof(*(ptr)))_atomic64_cmpxchg((u64 *)ptr, (u64)o, (u64)n); \
|
||||
(typeof(*(ptr)))_atomic64_cmpxchg((long long *)ptr, \
|
||||
(long long)o, (long long)n); \
|
||||
})
|
||||
|
||||
#else
|
||||
|
@ -81,10 +84,11 @@ u64 _atomic64_cmpxchg(u64 *v, u64 o, u64 n);
|
|||
switch (sizeof(*(ptr))) { \
|
||||
case 4: \
|
||||
__x = (typeof(__x))(unsigned long) \
|
||||
__insn_exch4((ptr), (u32)(unsigned long)(n)); \
|
||||
__insn_exch4((ptr), \
|
||||
(u32)(unsigned long)(n)); \
|
||||
break; \
|
||||
case 8: \
|
||||
__x = (typeof(__x)) \
|
||||
__x = (typeof(__x)) \
|
||||
__insn_exch((ptr), (unsigned long)(n)); \
|
||||
break; \
|
||||
default: \
|
||||
|
@ -103,10 +107,12 @@ u64 _atomic64_cmpxchg(u64 *v, u64 o, u64 n);
|
|||
switch (sizeof(*(ptr))) { \
|
||||
case 4: \
|
||||
__x = (typeof(__x))(unsigned long) \
|
||||
__insn_cmpexch4((ptr), (u32)(unsigned long)(n)); \
|
||||
__insn_cmpexch4((ptr), \
|
||||
(u32)(unsigned long)(n)); \
|
||||
break; \
|
||||
case 8: \
|
||||
__x = (typeof(__x))__insn_cmpexch((ptr), (u64)(n)); \
|
||||
__x = (typeof(__x))__insn_cmpexch((ptr), \
|
||||
(long long)(n)); \
|
||||
break; \
|
||||
default: \
|
||||
__cmpxchg_called_with_bad_pointer(); \
|
||||
|
|
|
@ -15,9 +15,37 @@
|
|||
#ifndef _ASM_TILE_PERCPU_H
|
||||
#define _ASM_TILE_PERCPU_H
|
||||
|
||||
register unsigned long __my_cpu_offset __asm__("tp");
|
||||
#define __my_cpu_offset __my_cpu_offset
|
||||
#define set_my_cpu_offset(tp) (__my_cpu_offset = (tp))
|
||||
register unsigned long my_cpu_offset_reg asm("tp");
|
||||
|
||||
#ifdef CONFIG_PREEMPT
|
||||
/*
|
||||
* For full preemption, we can't just use the register variable
|
||||
* directly, since we need barrier() to hazard against it, causing the
|
||||
* compiler to reload anything computed from a previous "tp" value.
|
||||
* But we also don't want to use volatile asm, since we'd like the
|
||||
* compiler to be able to cache the value across multiple percpu reads.
|
||||
* So we use a fake stack read as a hazard against barrier().
|
||||
* The 'U' constraint is like 'm' but disallows postincrement.
|
||||
*/
|
||||
static inline unsigned long __my_cpu_offset(void)
|
||||
{
|
||||
unsigned long tp;
|
||||
register unsigned long *sp asm("sp");
|
||||
asm("move %0, tp" : "=r" (tp) : "U" (*sp));
|
||||
return tp;
|
||||
}
|
||||
#define __my_cpu_offset __my_cpu_offset()
|
||||
#else
|
||||
/*
|
||||
* We don't need to hazard against barrier() since "tp" doesn't ever
|
||||
* change with PREEMPT_NONE, and with PREEMPT_VOLUNTARY it only
|
||||
* changes at function call points, at which we are already re-reading
|
||||
* the value of "tp" due to "my_cpu_offset_reg" being a global variable.
|
||||
*/
|
||||
#define __my_cpu_offset my_cpu_offset_reg
|
||||
#endif
|
||||
|
||||
#define set_my_cpu_offset(tp) (my_cpu_offset_reg = (tp))
|
||||
|
||||
#include <asm-generic/percpu.h>
|
||||
|
||||
|
|
|
@ -66,7 +66,7 @@ static struct hardwall_type hardwall_types[] = {
|
|||
0,
|
||||
"udn",
|
||||
LIST_HEAD_INIT(hardwall_types[HARDWALL_UDN].list),
|
||||
__SPIN_LOCK_INITIALIZER(hardwall_types[HARDWALL_UDN].lock),
|
||||
__SPIN_LOCK_UNLOCKED(hardwall_types[HARDWALL_UDN].lock),
|
||||
NULL
|
||||
},
|
||||
#ifndef __tilepro__
|
||||
|
@ -77,7 +77,7 @@ static struct hardwall_type hardwall_types[] = {
|
|||
1, /* disabled pending hypervisor support */
|
||||
"idn",
|
||||
LIST_HEAD_INIT(hardwall_types[HARDWALL_IDN].list),
|
||||
__SPIN_LOCK_INITIALIZER(hardwall_types[HARDWALL_IDN].lock),
|
||||
__SPIN_LOCK_UNLOCKED(hardwall_types[HARDWALL_IDN].lock),
|
||||
NULL
|
||||
},
|
||||
{ /* access to user-space IPI */
|
||||
|
@ -87,7 +87,7 @@ static struct hardwall_type hardwall_types[] = {
|
|||
0,
|
||||
"ipi",
|
||||
LIST_HEAD_INIT(hardwall_types[HARDWALL_IPI].list),
|
||||
__SPIN_LOCK_INITIALIZER(hardwall_types[HARDWALL_IPI].lock),
|
||||
__SPIN_LOCK_UNLOCKED(hardwall_types[HARDWALL_IPI].lock),
|
||||
NULL
|
||||
},
|
||||
#endif
|
||||
|
|
|
@ -815,6 +815,9 @@ STD_ENTRY(interrupt_return)
|
|||
}
|
||||
bzt r28, 1f
|
||||
bnz r29, 1f
|
||||
/* Disable interrupts explicitly for preemption. */
|
||||
IRQ_DISABLE(r20,r21)
|
||||
TRACE_IRQS_OFF
|
||||
jal preempt_schedule_irq
|
||||
FEEDBACK_REENTER(interrupt_return)
|
||||
1:
|
||||
|
|
|
@ -841,6 +841,9 @@ STD_ENTRY(interrupt_return)
|
|||
}
|
||||
beqzt r28, 1f
|
||||
bnez r29, 1f
|
||||
/* Disable interrupts explicitly for preemption. */
|
||||
IRQ_DISABLE(r20,r21)
|
||||
TRACE_IRQS_OFF
|
||||
jal preempt_schedule_irq
|
||||
FEEDBACK_REENTER(interrupt_return)
|
||||
1:
|
||||
|
|
|
@ -23,6 +23,7 @@
|
|||
#include <linux/mmzone.h>
|
||||
#include <linux/dcache.h>
|
||||
#include <linux/fs.h>
|
||||
#include <linux/string.h>
|
||||
#include <asm/backtrace.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/ucontext.h>
|
||||
|
@ -332,21 +333,18 @@ static void describe_addr(struct KBacktraceIterator *kbt,
|
|||
}
|
||||
|
||||
if (vma->vm_file) {
|
||||
char *s;
|
||||
p = d_path(&vma->vm_file->f_path, buf, bufsize);
|
||||
if (IS_ERR(p))
|
||||
p = "?";
|
||||
s = strrchr(p, '/');
|
||||
if (s)
|
||||
p = s+1;
|
||||
name = kbasename(p);
|
||||
} else {
|
||||
p = "anon";
|
||||
name = "anon";
|
||||
}
|
||||
|
||||
/* Generate a string description of the vma info. */
|
||||
namelen = strlen(p);
|
||||
namelen = strlen(name);
|
||||
remaining = (bufsize - 1) - namelen;
|
||||
memmove(buf, p, namelen);
|
||||
memmove(buf, name, namelen);
|
||||
snprintf(buf + namelen, remaining, "[%lx+%lx] ",
|
||||
vma->vm_start, vma->vm_end - vma->vm_start);
|
||||
}
|
||||
|
|
|
@ -107,19 +107,19 @@ unsigned long _atomic_xor(volatile unsigned long *p, unsigned long mask)
|
|||
EXPORT_SYMBOL(_atomic_xor);
|
||||
|
||||
|
||||
u64 _atomic64_xchg(u64 *v, u64 n)
|
||||
long long _atomic64_xchg(long long *v, long long n)
|
||||
{
|
||||
return __atomic64_xchg(v, __atomic_setup(v), n);
|
||||
}
|
||||
EXPORT_SYMBOL(_atomic64_xchg);
|
||||
|
||||
u64 _atomic64_xchg_add(u64 *v, u64 i)
|
||||
long long _atomic64_xchg_add(long long *v, long long i)
|
||||
{
|
||||
return __atomic64_xchg_add(v, __atomic_setup(v), i);
|
||||
}
|
||||
EXPORT_SYMBOL(_atomic64_xchg_add);
|
||||
|
||||
u64 _atomic64_xchg_add_unless(u64 *v, u64 a, u64 u)
|
||||
long long _atomic64_xchg_add_unless(long long *v, long long a, long long u)
|
||||
{
|
||||
/*
|
||||
* Note: argument order is switched here since it is easier
|
||||
|
@ -130,7 +130,7 @@ u64 _atomic64_xchg_add_unless(u64 *v, u64 a, u64 u)
|
|||
}
|
||||
EXPORT_SYMBOL(_atomic64_xchg_add_unless);
|
||||
|
||||
u64 _atomic64_cmpxchg(u64 *v, u64 o, u64 n)
|
||||
long long _atomic64_cmpxchg(long long *v, long long o, long long n)
|
||||
{
|
||||
return __atomic64_cmpxchg(v, __atomic_setup(v), o, n);
|
||||
}
|
||||
|
|
|
@ -860,7 +860,7 @@ source "kernel/Kconfig.preempt"
|
|||
|
||||
config X86_UP_APIC
|
||||
bool "Local APIC support on uniprocessors"
|
||||
depends on X86_32 && !SMP && !X86_32_NON_STANDARD
|
||||
depends on X86_32 && !SMP && !X86_32_NON_STANDARD && !PCI_MSI
|
||||
---help---
|
||||
A local APIC (Advanced Programmable Interrupt Controller) is an
|
||||
integrated interrupt controller in the CPU. If you have a single-CPU
|
||||
|
@ -885,11 +885,11 @@ config X86_UP_IOAPIC
|
|||
|
||||
config X86_LOCAL_APIC
|
||||
def_bool y
|
||||
depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC
|
||||
depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC || PCI_MSI
|
||||
|
||||
config X86_IO_APIC
|
||||
def_bool y
|
||||
depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_IOAPIC
|
||||
depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_IOAPIC || PCI_MSI
|
||||
|
||||
config X86_VISWS_APIC
|
||||
def_bool y
|
||||
|
|
|
@ -374,7 +374,7 @@ static __always_inline __pure bool __static_cpu_has(u16 bit)
|
|||
* Catch too early usage of this before alternatives
|
||||
* have run.
|
||||
*/
|
||||
asm goto("1: jmp %l[t_warn]\n"
|
||||
asm_volatile_goto("1: jmp %l[t_warn]\n"
|
||||
"2:\n"
|
||||
".section .altinstructions,\"a\"\n"
|
||||
" .long 1b - .\n"
|
||||
|
@ -388,7 +388,7 @@ static __always_inline __pure bool __static_cpu_has(u16 bit)
|
|||
|
||||
#endif
|
||||
|
||||
asm goto("1: jmp %l[t_no]\n"
|
||||
asm_volatile_goto("1: jmp %l[t_no]\n"
|
||||
"2:\n"
|
||||
".section .altinstructions,\"a\"\n"
|
||||
" .long 1b - .\n"
|
||||
|
@ -453,7 +453,7 @@ static __always_inline __pure bool _static_cpu_has_safe(u16 bit)
|
|||
* have. Thus, we force the jump to the widest, 4-byte, signed relative
|
||||
* offset even though the last would often fit in less bytes.
|
||||
*/
|
||||
asm goto("1: .byte 0xe9\n .long %l[t_dynamic] - 2f\n"
|
||||
asm_volatile_goto("1: .byte 0xe9\n .long %l[t_dynamic] - 2f\n"
|
||||
"2:\n"
|
||||
".section .altinstructions,\"a\"\n"
|
||||
" .long 1b - .\n" /* src offset */
|
||||
|
|
|
@ -18,7 +18,7 @@
|
|||
|
||||
static __always_inline bool arch_static_branch(struct static_key *key)
|
||||
{
|
||||
asm goto("1:"
|
||||
asm_volatile_goto("1:"
|
||||
".byte " __stringify(STATIC_KEY_INIT_NOP) "\n\t"
|
||||
".pushsection __jump_table, \"aw\" \n\t"
|
||||
_ASM_ALIGN "\n\t"
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
static inline void __mutex_fastpath_lock(atomic_t *v,
|
||||
void (*fail_fn)(atomic_t *))
|
||||
{
|
||||
asm volatile goto(LOCK_PREFIX " decl %0\n"
|
||||
asm_volatile_goto(LOCK_PREFIX " decl %0\n"
|
||||
" jns %l[exit]\n"
|
||||
: : "m" (v->counter)
|
||||
: "memory", "cc"
|
||||
|
@ -75,7 +75,7 @@ static inline int __mutex_fastpath_lock_retval(atomic_t *count)
|
|||
static inline void __mutex_fastpath_unlock(atomic_t *v,
|
||||
void (*fail_fn)(atomic_t *))
|
||||
{
|
||||
asm volatile goto(LOCK_PREFIX " incl %0\n"
|
||||
asm_volatile_goto(LOCK_PREFIX " incl %0\n"
|
||||
" jg %l[exit]\n"
|
||||
: : "m" (v->counter)
|
||||
: "memory", "cc"
|
||||
|
|
|
@ -1888,10 +1888,7 @@ void arch_perf_update_userpage(struct perf_event_mmap_page *userpg, u64 now)
|
|||
userpg->cap_user_rdpmc = x86_pmu.attr_rdpmc;
|
||||
userpg->pmc_width = x86_pmu.cntval_bits;
|
||||
|
||||
if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
|
||||
return;
|
||||
|
||||
if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
|
||||
if (!sched_clock_stable)
|
||||
return;
|
||||
|
||||
userpg->cap_user_time = 1;
|
||||
|
@ -1899,10 +1896,8 @@ void arch_perf_update_userpage(struct perf_event_mmap_page *userpg, u64 now)
|
|||
userpg->time_shift = CYC2NS_SCALE_FACTOR;
|
||||
userpg->time_offset = this_cpu_read(cyc2ns_offset) - now;
|
||||
|
||||
if (sched_clock_stable && !check_tsc_disabled()) {
|
||||
userpg->cap_user_time_zero = 1;
|
||||
userpg->time_zero = this_cpu_read(cyc2ns_offset);
|
||||
}
|
||||
userpg->cap_user_time_zero = 1;
|
||||
userpg->time_zero = this_cpu_read(cyc2ns_offset);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -326,6 +326,14 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
|
|||
DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6320"),
|
||||
},
|
||||
},
|
||||
{ /* Handle problems with rebooting on the Latitude E5410. */
|
||||
.callback = set_pci_reboot,
|
||||
.ident = "Dell Latitude E5410",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E5410"),
|
||||
},
|
||||
},
|
||||
{ /* Handle problems with rebooting on the Latitude E5420. */
|
||||
.callback = set_pci_reboot,
|
||||
.ident = "Dell Latitude E5420",
|
||||
|
|
|
@ -3255,25 +3255,29 @@ static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
|
|||
|
||||
static void ept_load_pdptrs(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
|
||||
|
||||
if (!test_bit(VCPU_EXREG_PDPTR,
|
||||
(unsigned long *)&vcpu->arch.regs_dirty))
|
||||
return;
|
||||
|
||||
if (is_paging(vcpu) && is_pae(vcpu) && !is_long_mode(vcpu)) {
|
||||
vmcs_write64(GUEST_PDPTR0, vcpu->arch.mmu.pdptrs[0]);
|
||||
vmcs_write64(GUEST_PDPTR1, vcpu->arch.mmu.pdptrs[1]);
|
||||
vmcs_write64(GUEST_PDPTR2, vcpu->arch.mmu.pdptrs[2]);
|
||||
vmcs_write64(GUEST_PDPTR3, vcpu->arch.mmu.pdptrs[3]);
|
||||
vmcs_write64(GUEST_PDPTR0, mmu->pdptrs[0]);
|
||||
vmcs_write64(GUEST_PDPTR1, mmu->pdptrs[1]);
|
||||
vmcs_write64(GUEST_PDPTR2, mmu->pdptrs[2]);
|
||||
vmcs_write64(GUEST_PDPTR3, mmu->pdptrs[3]);
|
||||
}
|
||||
}
|
||||
|
||||
static void ept_save_pdptrs(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
|
||||
|
||||
if (is_paging(vcpu) && is_pae(vcpu) && !is_long_mode(vcpu)) {
|
||||
vcpu->arch.mmu.pdptrs[0] = vmcs_read64(GUEST_PDPTR0);
|
||||
vcpu->arch.mmu.pdptrs[1] = vmcs_read64(GUEST_PDPTR1);
|
||||
vcpu->arch.mmu.pdptrs[2] = vmcs_read64(GUEST_PDPTR2);
|
||||
vcpu->arch.mmu.pdptrs[3] = vmcs_read64(GUEST_PDPTR3);
|
||||
mmu->pdptrs[0] = vmcs_read64(GUEST_PDPTR0);
|
||||
mmu->pdptrs[1] = vmcs_read64(GUEST_PDPTR1);
|
||||
mmu->pdptrs[2] = vmcs_read64(GUEST_PDPTR2);
|
||||
mmu->pdptrs[3] = vmcs_read64(GUEST_PDPTR3);
|
||||
}
|
||||
|
||||
__set_bit(VCPU_EXREG_PDPTR,
|
||||
|
@ -7777,10 +7781,6 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
|
|||
vmcs_write64(GUEST_PDPTR1, vmcs12->guest_pdptr1);
|
||||
vmcs_write64(GUEST_PDPTR2, vmcs12->guest_pdptr2);
|
||||
vmcs_write64(GUEST_PDPTR3, vmcs12->guest_pdptr3);
|
||||
__clear_bit(VCPU_EXREG_PDPTR,
|
||||
(unsigned long *)&vcpu->arch.regs_avail);
|
||||
__clear_bit(VCPU_EXREG_PDPTR,
|
||||
(unsigned long *)&vcpu->arch.regs_dirty);
|
||||
}
|
||||
|
||||
kvm_register_write(vcpu, VCPU_REGS_RSP, vmcs12->guest_rsp);
|
||||
|
|
|
@ -640,7 +640,7 @@ struct timer_rand_state {
|
|||
*/
|
||||
void add_device_randomness(const void *buf, unsigned int size)
|
||||
{
|
||||
unsigned long time = get_cycles() ^ jiffies;
|
||||
unsigned long time = random_get_entropy() ^ jiffies;
|
||||
|
||||
mix_pool_bytes(&input_pool, buf, size, NULL);
|
||||
mix_pool_bytes(&input_pool, &time, sizeof(time), NULL);
|
||||
|
@ -677,7 +677,7 @@ static void add_timer_randomness(struct timer_rand_state *state, unsigned num)
|
|||
goto out;
|
||||
|
||||
sample.jiffies = jiffies;
|
||||
sample.cycles = get_cycles();
|
||||
sample.cycles = random_get_entropy();
|
||||
sample.num = num;
|
||||
mix_pool_bytes(&input_pool, &sample, sizeof(sample), NULL);
|
||||
|
||||
|
@ -744,7 +744,7 @@ void add_interrupt_randomness(int irq, int irq_flags)
|
|||
struct fast_pool *fast_pool = &__get_cpu_var(irq_randomness);
|
||||
struct pt_regs *regs = get_irq_regs();
|
||||
unsigned long now = jiffies;
|
||||
__u32 input[4], cycles = get_cycles();
|
||||
__u32 input[4], cycles = random_get_entropy();
|
||||
|
||||
input[0] = cycles ^ jiffies;
|
||||
input[1] = irq;
|
||||
|
@ -1459,12 +1459,11 @@ struct ctl_table random_table[] = {
|
|||
|
||||
static u32 random_int_secret[MD5_MESSAGE_BYTES / 4] ____cacheline_aligned;
|
||||
|
||||
static int __init random_int_secret_init(void)
|
||||
int random_int_secret_init(void)
|
||||
{
|
||||
get_random_bytes(random_int_secret, sizeof(random_int_secret));
|
||||
return 0;
|
||||
}
|
||||
late_initcall(random_int_secret_init);
|
||||
|
||||
/*
|
||||
* Get a random word for internal kernel use only. Similar to urandom but
|
||||
|
@ -1483,7 +1482,7 @@ unsigned int get_random_int(void)
|
|||
|
||||
hash = get_cpu_var(get_random_int_hash);
|
||||
|
||||
hash[0] += current->pid + jiffies + get_cycles();
|
||||
hash[0] += current->pid + jiffies + random_get_entropy();
|
||||
md5_transform(hash, random_int_secret);
|
||||
ret = hash[0];
|
||||
put_cpu_var(get_random_int_hash);
|
||||
|
|
|
@ -306,6 +306,7 @@ static struct dma_async_tx_descriptor *edma_prep_slave_sg(
|
|||
EDMA_SLOT_ANY);
|
||||
if (echan->slot[i] < 0) {
|
||||
dev_err(dev, "Failed to allocate slot\n");
|
||||
kfree(edesc);
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -93,6 +93,7 @@ struct hpb_dmae_chan {
|
|||
void __iomem *base;
|
||||
const struct hpb_dmae_slave_config *cfg;
|
||||
char dev_id[16]; /* unique name per DMAC of channel */
|
||||
dma_addr_t slave_addr;
|
||||
};
|
||||
|
||||
struct hpb_dmae_device {
|
||||
|
@ -432,7 +433,6 @@ hpb_dmae_alloc_chan_resources(struct hpb_dmae_chan *hpb_chan,
|
|||
hpb_chan->xfer_mode = XFER_DOUBLE;
|
||||
} else {
|
||||
dev_err(hpb_chan->shdma_chan.dev, "DCR setting error");
|
||||
shdma_free_irq(&hpb_chan->shdma_chan);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
@ -446,7 +446,8 @@ hpb_dmae_alloc_chan_resources(struct hpb_dmae_chan *hpb_chan,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int hpb_dmae_set_slave(struct shdma_chan *schan, int slave_id, bool try)
|
||||
static int hpb_dmae_set_slave(struct shdma_chan *schan, int slave_id,
|
||||
dma_addr_t slave_addr, bool try)
|
||||
{
|
||||
struct hpb_dmae_chan *chan = to_chan(schan);
|
||||
const struct hpb_dmae_slave_config *sc =
|
||||
|
@ -457,6 +458,7 @@ static int hpb_dmae_set_slave(struct shdma_chan *schan, int slave_id, bool try)
|
|||
if (try)
|
||||
return 0;
|
||||
chan->cfg = sc;
|
||||
chan->slave_addr = slave_addr ? : sc->addr;
|
||||
return hpb_dmae_alloc_chan_resources(chan, sc);
|
||||
}
|
||||
|
||||
|
@ -468,7 +470,7 @@ static dma_addr_t hpb_dmae_slave_addr(struct shdma_chan *schan)
|
|||
{
|
||||
struct hpb_dmae_chan *chan = to_chan(schan);
|
||||
|
||||
return chan->cfg->addr;
|
||||
return chan->slave_addr;
|
||||
}
|
||||
|
||||
static struct shdma_desc *hpb_dmae_embedded_desc(void *buf, int i)
|
||||
|
@ -614,7 +616,6 @@ static void hpb_dmae_chan_remove(struct hpb_dmae_device *hpbdev)
|
|||
shdma_for_each_chan(schan, &hpbdev->shdma_dev, i) {
|
||||
BUG_ON(!schan);
|
||||
|
||||
shdma_free_irq(schan);
|
||||
shdma_chan_remove(schan);
|
||||
}
|
||||
dma_dev->chancnt = 0;
|
||||
|
|
|
@ -2925,6 +2925,8 @@ int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
|
|||
/* Speaker Allocation Data Block */
|
||||
if (dbl == 3) {
|
||||
*sadb = kmalloc(dbl, GFP_KERNEL);
|
||||
if (!*sadb)
|
||||
return -ENOMEM;
|
||||
memcpy(*sadb, &db[1], dbl);
|
||||
count = dbl;
|
||||
break;
|
||||
|
|
|
@ -407,14 +407,6 @@ static void drm_fb_helper_dpms(struct fb_info *info, int dpms_mode)
|
|||
struct drm_connector *connector;
|
||||
int i, j;
|
||||
|
||||
/*
|
||||
* fbdev->blank can be called from irq context in case of a panic.
|
||||
* Since we already have our own special panic handler which will
|
||||
* restore the fbdev console mode completely, just bail out early.
|
||||
*/
|
||||
if (oops_in_progress)
|
||||
return;
|
||||
|
||||
/*
|
||||
* fbdev->blank can be called from irq context in case of a panic.
|
||||
* Since we already have our own special panic handler which will
|
||||
|
|
|
@ -204,6 +204,7 @@ static int psb_gtt_attach_pages(struct gtt_range *gt)
|
|||
if (IS_ERR(pages))
|
||||
return PTR_ERR(pages);
|
||||
|
||||
gt->npage = gt->gem.size / PAGE_SIZE;
|
||||
gt->pages = pages;
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -1290,12 +1290,9 @@ static int i915_load_modeset_init(struct drm_device *dev)
|
|||
* then we do not take part in VGA arbitration and the
|
||||
* vga_client_register() fails with -ENODEV.
|
||||
*/
|
||||
if (!HAS_PCH_SPLIT(dev)) {
|
||||
ret = vga_client_register(dev->pdev, dev, NULL,
|
||||
i915_vga_set_decode);
|
||||
if (ret && ret != -ENODEV)
|
||||
goto out;
|
||||
}
|
||||
ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode);
|
||||
if (ret && ret != -ENODEV)
|
||||
goto out;
|
||||
|
||||
intel_register_dsm_handler();
|
||||
|
||||
|
@ -1351,12 +1348,6 @@ static int i915_load_modeset_init(struct drm_device *dev)
|
|||
*/
|
||||
intel_fbdev_initial_config(dev);
|
||||
|
||||
/*
|
||||
* Must do this after fbcon init so that
|
||||
* vgacon_save_screen() works during the handover.
|
||||
*/
|
||||
i915_disable_vga_mem(dev);
|
||||
|
||||
/* Only enable hotplug handling once the fbdev is fully set up. */
|
||||
dev_priv->enable_hotplug_processing = true;
|
||||
|
||||
|
|
|
@ -3881,6 +3881,9 @@
|
|||
#define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG 0x9030
|
||||
#define GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB (1<<11)
|
||||
|
||||
#define HSW_SCRATCH1 0xb038
|
||||
#define HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE (1<<27)
|
||||
|
||||
#define HSW_FUSE_STRAP 0x42014
|
||||
#define HSW_CDCLK_LIMIT (1 << 24)
|
||||
|
||||
|
@ -4728,6 +4731,9 @@
|
|||
#define GEN7_ROW_CHICKEN2_GT2 0xf4f4
|
||||
#define DOP_CLOCK_GATING_DISABLE (1<<0)
|
||||
|
||||
#define HSW_ROW_CHICKEN3 0xe49c
|
||||
#define HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE (1 << 6)
|
||||
|
||||
#define G4X_AUD_VID_DID (dev_priv->info->display_mmio_offset + 0x62020)
|
||||
#define INTEL_AUDIO_DEVCL 0x808629FB
|
||||
#define INTEL_AUDIO_DEVBLC 0x80862801
|
||||
|
|
|
@ -3941,8 +3941,6 @@ static void intel_connector_check_state(struct intel_connector *connector)
|
|||
* consider. */
|
||||
void intel_connector_dpms(struct drm_connector *connector, int mode)
|
||||
{
|
||||
struct intel_encoder *encoder = intel_attached_encoder(connector);
|
||||
|
||||
/* All the simple cases only support two dpms states. */
|
||||
if (mode != DRM_MODE_DPMS_ON)
|
||||
mode = DRM_MODE_DPMS_OFF;
|
||||
|
@ -3953,10 +3951,8 @@ void intel_connector_dpms(struct drm_connector *connector, int mode)
|
|||
connector->dpms = mode;
|
||||
|
||||
/* Only need to change hw state when actually enabled */
|
||||
if (encoder->base.crtc)
|
||||
intel_encoder_dpms(encoder, mode);
|
||||
else
|
||||
WARN_ON(encoder->connectors_active != false);
|
||||
if (connector->encoder)
|
||||
intel_encoder_dpms(to_intel_encoder(connector->encoder), mode);
|
||||
|
||||
intel_modeset_check_state(connector->dev);
|
||||
}
|
||||
|
@ -10049,33 +10045,6 @@ static void i915_disable_vga(struct drm_device *dev)
|
|||
POSTING_READ(vga_reg);
|
||||
}
|
||||
|
||||
static void i915_enable_vga_mem(struct drm_device *dev)
|
||||
{
|
||||
/* Enable VGA memory on Intel HD */
|
||||
if (HAS_PCH_SPLIT(dev)) {
|
||||
vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
|
||||
outb(inb(VGA_MSR_READ) | VGA_MSR_MEM_EN, VGA_MSR_WRITE);
|
||||
vga_set_legacy_decoding(dev->pdev, VGA_RSRC_LEGACY_IO |
|
||||
VGA_RSRC_LEGACY_MEM |
|
||||
VGA_RSRC_NORMAL_IO |
|
||||
VGA_RSRC_NORMAL_MEM);
|
||||
vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
|
||||
}
|
||||
}
|
||||
|
||||
void i915_disable_vga_mem(struct drm_device *dev)
|
||||
{
|
||||
/* Disable VGA memory on Intel HD */
|
||||
if (HAS_PCH_SPLIT(dev)) {
|
||||
vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
|
||||
outb(inb(VGA_MSR_READ) & ~VGA_MSR_MEM_EN, VGA_MSR_WRITE);
|
||||
vga_set_legacy_decoding(dev->pdev, VGA_RSRC_LEGACY_IO |
|
||||
VGA_RSRC_NORMAL_IO |
|
||||
VGA_RSRC_NORMAL_MEM);
|
||||
vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
|
||||
}
|
||||
}
|
||||
|
||||
void intel_modeset_init_hw(struct drm_device *dev)
|
||||
{
|
||||
intel_init_power_well(dev);
|
||||
|
@ -10354,7 +10323,6 @@ void i915_redisable_vga(struct drm_device *dev)
|
|||
if (I915_READ(vga_reg) != VGA_DISP_DISABLE) {
|
||||
DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
|
||||
i915_disable_vga(dev);
|
||||
i915_disable_vga_mem(dev);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -10568,8 +10536,6 @@ void intel_modeset_cleanup(struct drm_device *dev)
|
|||
|
||||
intel_disable_fbc(dev);
|
||||
|
||||
i915_enable_vga_mem(dev);
|
||||
|
||||
intel_disable_gt_powersave(dev);
|
||||
|
||||
ironlake_teardown_rc6(dev);
|
||||
|
|
|
@ -1467,7 +1467,7 @@ static void intel_edp_psr_setup(struct intel_dp *intel_dp)
|
|||
|
||||
/* Avoid continuous PSR exit by masking memup and hpd */
|
||||
I915_WRITE(EDP_PSR_DEBUG_CTL, EDP_PSR_DEBUG_MASK_MEMUP |
|
||||
EDP_PSR_DEBUG_MASK_HPD);
|
||||
EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP);
|
||||
|
||||
intel_dp->psr_setup_done = true;
|
||||
}
|
||||
|
|
|
@ -793,6 +793,5 @@ extern void hsw_pc8_disable_interrupts(struct drm_device *dev);
|
|||
extern void hsw_pc8_restore_interrupts(struct drm_device *dev);
|
||||
extern void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
|
||||
extern void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
|
||||
extern void i915_disable_vga_mem(struct drm_device *dev);
|
||||
|
||||
#endif /* __INTEL_DRV_H__ */
|
||||
|
|
|
@ -3864,8 +3864,6 @@ static void valleyview_enable_rps(struct drm_device *dev)
|
|||
dev_priv->rps.rpe_delay),
|
||||
dev_priv->rps.rpe_delay);
|
||||
|
||||
INIT_DELAYED_WORK(&dev_priv->rps.vlv_work, vlv_rps_timer_work);
|
||||
|
||||
valleyview_set_rps(dev_priv->dev, dev_priv->rps.rpe_delay);
|
||||
|
||||
gen6_enable_rps_interrupts(dev);
|
||||
|
@ -4955,6 +4953,11 @@ static void haswell_init_clock_gating(struct drm_device *dev)
|
|||
I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER,
|
||||
GEN7_WA_L3_CHICKEN_MODE);
|
||||
|
||||
/* L3 caching of data atomics doesn't work -- disable it. */
|
||||
I915_WRITE(HSW_SCRATCH1, HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE);
|
||||
I915_WRITE(HSW_ROW_CHICKEN3,
|
||||
_MASKED_BIT_ENABLE(HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE));
|
||||
|
||||
/* This is required by WaCatErrorRejectionIssue:hsw */
|
||||
I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
|
||||
I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |
|
||||
|
@ -5681,5 +5684,7 @@ void intel_pm_init(struct drm_device *dev)
|
|||
|
||||
INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work,
|
||||
intel_gen6_powersave_work);
|
||||
|
||||
INIT_DELAYED_WORK(&dev_priv->rps.vlv_work, vlv_rps_timer_work);
|
||||
}
|
||||
|
||||
|
|
|
@ -113,7 +113,7 @@ nouveau_mc_create_(struct nouveau_object *parent, struct nouveau_object *engine,
|
|||
pmc->use_msi = false;
|
||||
break;
|
||||
default:
|
||||
pmc->use_msi = nouveau_boolopt(device->cfgopt, "NvMSI", true);
|
||||
pmc->use_msi = nouveau_boolopt(device->cfgopt, "NvMSI", false);
|
||||
if (pmc->use_msi) {
|
||||
pmc->use_msi = pci_enable_msi(device->pdev) == 0;
|
||||
if (pmc->use_msi) {
|
||||
|
|
|
@ -1930,7 +1930,7 @@ static int btc_set_mc_special_registers(struct radeon_device *rdev,
|
|||
}
|
||||
j++;
|
||||
|
||||
if (j > SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE)
|
||||
if (j >= SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE)
|
||||
return -EINVAL;
|
||||
|
||||
tmp = RREG32(MC_PMG_CMD_MRS);
|
||||
|
@ -1945,7 +1945,7 @@ static int btc_set_mc_special_registers(struct radeon_device *rdev,
|
|||
}
|
||||
j++;
|
||||
|
||||
if (j > SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE)
|
||||
if (j >= SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE)
|
||||
return -EINVAL;
|
||||
break;
|
||||
case MC_SEQ_RESERVE_M >> 2:
|
||||
|
@ -1959,7 +1959,7 @@ static int btc_set_mc_special_registers(struct radeon_device *rdev,
|
|||
}
|
||||
j++;
|
||||
|
||||
if (j > SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE)
|
||||
if (j >= SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE)
|
||||
return -EINVAL;
|
||||
break;
|
||||
default:
|
||||
|
|
|
@ -77,6 +77,8 @@ static void cik_pcie_gen3_enable(struct radeon_device *rdev);
|
|||
static void cik_program_aspm(struct radeon_device *rdev);
|
||||
static void cik_init_pg(struct radeon_device *rdev);
|
||||
static void cik_init_cg(struct radeon_device *rdev);
|
||||
static void cik_fini_pg(struct radeon_device *rdev);
|
||||
static void cik_fini_cg(struct radeon_device *rdev);
|
||||
static void cik_enable_gui_idle_interrupt(struct radeon_device *rdev,
|
||||
bool enable);
|
||||
|
||||
|
@ -4185,6 +4187,10 @@ static void cik_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
|
|||
dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n",
|
||||
RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS));
|
||||
|
||||
/* disable CG/PG */
|
||||
cik_fini_pg(rdev);
|
||||
cik_fini_cg(rdev);
|
||||
|
||||
/* stop the rlc */
|
||||
cik_rlc_stop(rdev);
|
||||
|
||||
|
|
|
@ -3131,7 +3131,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
|
|||
rdev->config.evergreen.sx_max_export_size = 256;
|
||||
rdev->config.evergreen.sx_max_export_pos_size = 64;
|
||||
rdev->config.evergreen.sx_max_export_smx_size = 192;
|
||||
rdev->config.evergreen.max_hw_contexts = 8;
|
||||
rdev->config.evergreen.max_hw_contexts = 4;
|
||||
rdev->config.evergreen.sq_num_cf_insts = 2;
|
||||
|
||||
rdev->config.evergreen.sc_prim_fifo_size = 0x40;
|
||||
|
|
|
@ -288,8 +288,7 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
|
|||
/* fglrx clears sth in AFMT_AUDIO_PACKET_CONTROL2 here */
|
||||
|
||||
WREG32(HDMI_ACR_PACKET_CONTROL + offset,
|
||||
HDMI_ACR_AUTO_SEND | /* allow hw to sent ACR packets when required */
|
||||
HDMI_ACR_SOURCE); /* select SW CTS value */
|
||||
HDMI_ACR_AUTO_SEND); /* allow hw to sent ACR packets when required */
|
||||
|
||||
evergreen_hdmi_update_ACR(encoder, mode->clock);
|
||||
|
||||
|
|
|
@ -1501,7 +1501,7 @@
|
|||
* 6. COMMAND [29:22] | BYTE_COUNT [20:0]
|
||||
*/
|
||||
# define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20)
|
||||
/* 0 - SRC_ADDR
|
||||
/* 0 - DST_ADDR
|
||||
* 1 - GDS
|
||||
*/
|
||||
# define PACKET3_CP_DMA_ENGINE(x) ((x) << 27)
|
||||
|
@ -1516,7 +1516,7 @@
|
|||
# define PACKET3_CP_DMA_CP_SYNC (1 << 31)
|
||||
/* COMMAND */
|
||||
# define PACKET3_CP_DMA_DIS_WC (1 << 21)
|
||||
# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23)
|
||||
# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22)
|
||||
/* 0 - none
|
||||
* 1 - 8 in 16
|
||||
* 2 - 8 in 32
|
||||
|
|
|
@ -57,15 +57,15 @@ enum r600_hdmi_iec_status_bits {
|
|||
static const struct radeon_hdmi_acr r600_hdmi_predefined_acr[] = {
|
||||
/* 32kHz 44.1kHz 48kHz */
|
||||
/* Clock N CTS N CTS N CTS */
|
||||
{ 25174, 4576, 28125, 7007, 31250, 6864, 28125 }, /* 25,20/1.001 MHz */
|
||||
{ 25175, 4576, 28125, 7007, 31250, 6864, 28125 }, /* 25,20/1.001 MHz */
|
||||
{ 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */
|
||||
{ 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */
|
||||
{ 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */
|
||||
{ 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */
|
||||
{ 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */
|
||||
{ 74175, 11648, 210937, 17836, 234375, 11648, 140625 }, /* 74.25/1.001 MHz */
|
||||
{ 74176, 11648, 210937, 17836, 234375, 11648, 140625 }, /* 74.25/1.001 MHz */
|
||||
{ 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */
|
||||
{ 148351, 11648, 421875, 8918, 234375, 5824, 140625 }, /* 148.50/1.001 MHz */
|
||||
{ 148352, 11648, 421875, 8918, 234375, 5824, 140625 }, /* 148.50/1.001 MHz */
|
||||
{ 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */
|
||||
{ 0, 4096, 0, 6272, 0, 6144, 0 } /* Other */
|
||||
};
|
||||
|
@ -75,8 +75,15 @@ static const struct radeon_hdmi_acr r600_hdmi_predefined_acr[] = {
|
|||
*/
|
||||
static void r600_hdmi_calc_cts(uint32_t clock, int *CTS, int N, int freq)
|
||||
{
|
||||
if (*CTS == 0)
|
||||
*CTS = clock * N / (128 * freq) * 1000;
|
||||
u64 n;
|
||||
u32 d;
|
||||
|
||||
if (*CTS == 0) {
|
||||
n = (u64)clock * (u64)N * 1000ULL;
|
||||
d = 128 * freq;
|
||||
do_div(n, d);
|
||||
*CTS = n;
|
||||
}
|
||||
DRM_DEBUG("Using ACR timing N=%d CTS=%d for frequency %d\n",
|
||||
N, *CTS, freq);
|
||||
}
|
||||
|
@ -444,8 +451,8 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod
|
|||
}
|
||||
|
||||
WREG32(HDMI0_ACR_PACKET_CONTROL + offset,
|
||||
HDMI0_ACR_AUTO_SEND | /* allow hw to sent ACR packets when required */
|
||||
HDMI0_ACR_SOURCE); /* select SW CTS value */
|
||||
HDMI0_ACR_SOURCE | /* select SW CTS value - XXX verify that hw CTS works on all families */
|
||||
HDMI0_ACR_AUTO_SEND); /* allow hw to sent ACR packets when required */
|
||||
|
||||
WREG32(HDMI0_VBI_PACKET_CONTROL + offset,
|
||||
HDMI0_NULL_SEND | /* send null packets when required */
|
||||
|
|
|
@ -1523,7 +1523,7 @@
|
|||
*/
|
||||
# define PACKET3_CP_DMA_CP_SYNC (1 << 31)
|
||||
/* COMMAND */
|
||||
# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23)
|
||||
# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22)
|
||||
/* 0 - none
|
||||
* 1 - 8 in 16
|
||||
* 2 - 8 in 32
|
||||
|
|
|
@ -945,6 +945,8 @@ void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable)
|
|||
if (enable) {
|
||||
mutex_lock(&rdev->pm.mutex);
|
||||
rdev->pm.dpm.uvd_active = true;
|
||||
/* disable this for now */
|
||||
#if 0
|
||||
if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0))
|
||||
dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_SD;
|
||||
else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0))
|
||||
|
@ -954,6 +956,7 @@ void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable)
|
|||
else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2))
|
||||
dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD2;
|
||||
else
|
||||
#endif
|
||||
dpm_state = POWER_STATE_TYPE_INTERNAL_UVD;
|
||||
rdev->pm.dpm.state = dpm_state;
|
||||
mutex_unlock(&rdev->pm.mutex);
|
||||
|
|
|
@ -36,8 +36,8 @@ static void radeon_do_test_moves(struct radeon_device *rdev, int flag)
|
|||
struct radeon_bo *vram_obj = NULL;
|
||||
struct radeon_bo **gtt_obj = NULL;
|
||||
uint64_t gtt_addr, vram_addr;
|
||||
unsigned i, n, size;
|
||||
int r, ring;
|
||||
unsigned n, size;
|
||||
int i, r, ring;
|
||||
|
||||
switch (flag) {
|
||||
case RADEON_TEST_COPY_DMA:
|
||||
|
|
|
@ -798,7 +798,8 @@ void radeon_uvd_note_usage(struct radeon_device *rdev)
|
|||
(rdev->pm.dpm.hd != hd)) {
|
||||
rdev->pm.dpm.sd = sd;
|
||||
rdev->pm.dpm.hd = hd;
|
||||
streams_changed = true;
|
||||
/* disable this for now */
|
||||
/*streams_changed = true;*/
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -85,6 +85,9 @@ extern void si_dma_vm_set_page(struct radeon_device *rdev,
|
|||
uint32_t incr, uint32_t flags);
|
||||
static void si_enable_gui_idle_interrupt(struct radeon_device *rdev,
|
||||
bool enable);
|
||||
static void si_fini_pg(struct radeon_device *rdev);
|
||||
static void si_fini_cg(struct radeon_device *rdev);
|
||||
static void si_rlc_stop(struct radeon_device *rdev);
|
||||
|
||||
static const u32 verde_rlc_save_restore_register_list[] =
|
||||
{
|
||||
|
@ -3608,6 +3611,13 @@ static void si_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
|
|||
dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n",
|
||||
RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS));
|
||||
|
||||
/* disable PG/CG */
|
||||
si_fini_pg(rdev);
|
||||
si_fini_cg(rdev);
|
||||
|
||||
/* stop the rlc */
|
||||
si_rlc_stop(rdev);
|
||||
|
||||
/* Disable CP parsing/prefetching */
|
||||
WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);
|
||||
|
||||
|
|
|
@ -5208,7 +5208,7 @@ static int si_set_mc_special_registers(struct radeon_device *rdev,
|
|||
table->mc_reg_table_entry[k].mc_data[j] |= 0x100;
|
||||
}
|
||||
j++;
|
||||
if (j > SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE)
|
||||
if (j >= SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE)
|
||||
return -EINVAL;
|
||||
|
||||
if (!pi->mem_gddr5) {
|
||||
|
@ -5218,7 +5218,7 @@ static int si_set_mc_special_registers(struct radeon_device *rdev,
|
|||
table->mc_reg_table_entry[k].mc_data[j] =
|
||||
(table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16;
|
||||
j++;
|
||||
if (j > SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE)
|
||||
if (j >= SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE)
|
||||
return -EINVAL;
|
||||
}
|
||||
break;
|
||||
|
@ -5231,7 +5231,7 @@ static int si_set_mc_special_registers(struct radeon_device *rdev,
|
|||
(temp_reg & 0xffff0000) |
|
||||
(table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff);
|
||||
j++;
|
||||
if (j > SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE)
|
||||
if (j >= SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE)
|
||||
return -EINVAL;
|
||||
break;
|
||||
default:
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue