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USB: mos7720: rename registers
Some of the register names defined here are matching with registers defined in other places. Like DCR is defined here and DCR is also a register in mn10300 architecture. So when we are building this with mn10300, build fails. To avoid we rename all the registers. Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org> Signed-off-by: Johan Hovold <johan@kernel.org>
This commit is contained in:
parent
f6d7fb37f9
commit
ee5729ece7
1 changed files with 138 additions and 115 deletions
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@ -121,26 +121,26 @@ static DEFINE_SPINLOCK(release_lock);
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static const unsigned int dummy; /* for clarity in register access fns */
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enum mos_regs {
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THR, /* serial port regs */
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RHR,
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IER,
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FCR,
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ISR,
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LCR,
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MCR,
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LSR,
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MSR,
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SPR,
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DLL,
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DLM,
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DPR, /* parallel port regs */
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DSR,
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DCR,
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ECR,
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SP1_REG, /* device control regs */
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SP2_REG, /* serial port 2 (7720 only) */
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PP_REG,
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SP_CONTROL_REG,
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MOS7720_THR, /* serial port regs */
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MOS7720_RHR,
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MOS7720_IER,
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MOS7720_FCR,
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MOS7720_ISR,
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MOS7720_LCR,
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MOS7720_MCR,
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MOS7720_LSR,
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MOS7720_MSR,
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MOS7720_SPR,
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MOS7720_DLL,
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MOS7720_DLM,
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MOS7720_DPR, /* parallel port regs */
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MOS7720_DSR,
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MOS7720_DCR,
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MOS7720_ECR,
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MOS7720_SP1_REG, /* device control regs */
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MOS7720_SP2_REG, /* serial port 2 (7720 only) */
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MOS7720_PP_REG,
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MOS7720_SP_CONTROL_REG,
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};
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/*
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@ -150,26 +150,26 @@ enum mos_regs {
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static inline __u16 get_reg_index(enum mos_regs reg)
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{
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static const __u16 mos7715_index_lookup_table[] = {
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0x00, /* THR */
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0x00, /* RHR */
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0x01, /* IER */
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0x02, /* FCR */
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0x02, /* ISR */
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0x03, /* LCR */
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0x04, /* MCR */
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0x05, /* LSR */
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0x06, /* MSR */
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0x07, /* SPR */
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0x00, /* DLL */
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0x01, /* DLM */
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0x00, /* DPR */
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0x01, /* DSR */
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0x02, /* DCR */
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0x0a, /* ECR */
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0x01, /* SP1_REG */
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0x02, /* SP2_REG (7720 only) */
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0x04, /* PP_REG (7715 only) */
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0x08, /* SP_CONTROL_REG */
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0x00, /* MOS7720_THR */
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0x00, /* MOS7720_RHR */
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0x01, /* MOS7720_IER */
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0x02, /* MOS7720_FCR */
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0x02, /* MOS7720_ISR */
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0x03, /* MOS7720_LCR */
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0x04, /* MOS7720_MCR */
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0x05, /* MOS7720_LSR */
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0x06, /* MOS7720_MSR */
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0x07, /* MOS7720_SPR */
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0x00, /* MOS7720_DLL */
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0x01, /* MOS7720_DLM */
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0x00, /* MOS7720_DPR */
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0x01, /* MOS7720_DSR */
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0x02, /* MOS7720_DCR */
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0x0a, /* MOS7720_ECR */
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0x01, /* MOS7720_SP1_REG */
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0x02, /* MOS7720_SP2_REG (7720 only) */
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0x04, /* MOS7720_PP_REG (7715 only) */
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0x08, /* MOS7720_SP_CONTROL_REG */
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};
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return mos7715_index_lookup_table[reg];
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}
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@ -181,10 +181,10 @@ static inline __u16 get_reg_index(enum mos_regs reg)
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static inline __u16 get_reg_value(enum mos_regs reg,
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unsigned int serial_portnum)
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{
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if (reg >= SP1_REG) /* control reg */
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if (reg >= MOS7720_SP1_REG) /* control reg */
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return 0x0000;
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else if (reg >= DPR) /* parallel port reg (7715 only) */
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else if (reg >= MOS7720_DPR) /* parallel port reg (7715 only) */
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return 0x0100;
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else /* serial port reg */
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@ -252,7 +252,8 @@ static inline int mos7715_change_mode(struct mos7715_parport *mos_parport,
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enum mos7715_pp_modes mode)
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{
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mos_parport->shadowECR = mode;
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write_mos_reg(mos_parport->serial, dummy, ECR, mos_parport->shadowECR);
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write_mos_reg(mos_parport->serial, dummy, MOS7720_ECR,
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mos_parport->shadowECR);
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return 0;
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}
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@ -486,7 +487,7 @@ static void parport_mos7715_write_data(struct parport *pp, unsigned char d)
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if (parport_prologue(pp) < 0)
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return;
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mos7715_change_mode(mos_parport, SPP);
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write_mos_reg(mos_parport->serial, dummy, DPR, (__u8)d);
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write_mos_reg(mos_parport->serial, dummy, MOS7720_DPR, (__u8)d);
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parport_epilogue(pp);
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}
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@ -497,7 +498,7 @@ static unsigned char parport_mos7715_read_data(struct parport *pp)
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if (parport_prologue(pp) < 0)
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return 0;
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read_mos_reg(mos_parport->serial, dummy, DPR, &d);
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read_mos_reg(mos_parport->serial, dummy, MOS7720_DPR, &d);
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parport_epilogue(pp);
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return d;
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}
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@ -510,7 +511,7 @@ static void parport_mos7715_write_control(struct parport *pp, unsigned char d)
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if (parport_prologue(pp) < 0)
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return;
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data = ((__u8)d & 0x0f) | (mos_parport->shadowDCR & 0xf0);
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write_mos_reg(mos_parport->serial, dummy, DCR, data);
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write_mos_reg(mos_parport->serial, dummy, MOS7720_DCR, data);
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mos_parport->shadowDCR = data;
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parport_epilogue(pp);
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}
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@ -543,7 +544,8 @@ static unsigned char parport_mos7715_frob_control(struct parport *pp,
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if (parport_prologue(pp) < 0)
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return 0;
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mos_parport->shadowDCR = (mos_parport->shadowDCR & (~mask)) ^ val;
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write_mos_reg(mos_parport->serial, dummy, DCR, mos_parport->shadowDCR);
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write_mos_reg(mos_parport->serial, dummy, MOS7720_DCR,
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mos_parport->shadowDCR);
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dcr = mos_parport->shadowDCR & 0x0f;
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parport_epilogue(pp);
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return dcr;
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@ -581,7 +583,8 @@ static void parport_mos7715_data_forward(struct parport *pp)
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return;
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mos7715_change_mode(mos_parport, PS2);
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mos_parport->shadowDCR &= ~0x20;
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write_mos_reg(mos_parport->serial, dummy, DCR, mos_parport->shadowDCR);
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write_mos_reg(mos_parport->serial, dummy, MOS7720_DCR,
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mos_parport->shadowDCR);
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parport_epilogue(pp);
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}
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@ -593,7 +596,8 @@ static void parport_mos7715_data_reverse(struct parport *pp)
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return;
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mos7715_change_mode(mos_parport, PS2);
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mos_parport->shadowDCR |= 0x20;
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write_mos_reg(mos_parport->serial, dummy, DCR, mos_parport->shadowDCR);
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write_mos_reg(mos_parport->serial, dummy, MOS7720_DCR,
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mos_parport->shadowDCR);
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parport_epilogue(pp);
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}
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@ -633,8 +637,10 @@ static void parport_mos7715_restore_state(struct parport *pp,
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spin_unlock(&release_lock);
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return;
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}
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write_parport_reg_nonblock(mos_parport, DCR, mos_parport->shadowDCR);
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write_parport_reg_nonblock(mos_parport, ECR, mos_parport->shadowECR);
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write_parport_reg_nonblock(mos_parport, MOS7720_DCR,
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mos_parport->shadowDCR);
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write_parport_reg_nonblock(mos_parport, MOS7720_ECR,
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mos_parport->shadowECR);
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spin_unlock(&release_lock);
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}
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@ -714,14 +720,16 @@ static int mos7715_parport_init(struct usb_serial *serial)
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init_completion(&mos_parport->syncmsg_compl);
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/* cycle parallel port reset bit */
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write_mos_reg(mos_parport->serial, dummy, PP_REG, (__u8)0x80);
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write_mos_reg(mos_parport->serial, dummy, PP_REG, (__u8)0x00);
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write_mos_reg(mos_parport->serial, dummy, MOS7720_PP_REG, (__u8)0x80);
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write_mos_reg(mos_parport->serial, dummy, MOS7720_PP_REG, (__u8)0x00);
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/* initialize device registers */
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mos_parport->shadowDCR = DCR_INIT_VAL;
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write_mos_reg(mos_parport->serial, dummy, DCR, mos_parport->shadowDCR);
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write_mos_reg(mos_parport->serial, dummy, MOS7720_DCR,
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mos_parport->shadowDCR);
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mos_parport->shadowECR = ECR_INIT_VAL;
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write_mos_reg(mos_parport->serial, dummy, ECR, mos_parport->shadowECR);
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write_mos_reg(mos_parport->serial, dummy, MOS7720_ECR,
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mos_parport->shadowECR);
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/* register with parport core */
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mos_parport->pp = parport_register_port(0, PARPORT_IRQ_NONE,
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@ -1033,45 +1041,49 @@ static int mos7720_open(struct tty_struct *tty, struct usb_serial_port *port)
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/* Initialize MCS7720 -- Write Init values to corresponding Registers
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*
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* Register Index
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* 0 : THR/RHR
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* 1 : IER
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* 2 : FCR
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* 3 : LCR
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* 4 : MCR
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* 5 : LSR
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* 6 : MSR
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* 7 : SPR
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* 0 : MOS7720_THR/MOS7720_RHR
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* 1 : MOS7720_IER
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* 2 : MOS7720_FCR
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* 3 : MOS7720_LCR
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* 4 : MOS7720_MCR
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* 5 : MOS7720_LSR
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* 6 : MOS7720_MSR
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* 7 : MOS7720_SPR
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*
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* 0x08 : SP1/2 Control Reg
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*/
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port_number = port->port_number;
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read_mos_reg(serial, port_number, LSR, &data);
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read_mos_reg(serial, port_number, MOS7720_LSR, &data);
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dev_dbg(&port->dev, "SS::%p LSR:%x\n", mos7720_port, data);
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write_mos_reg(serial, dummy, SP1_REG, 0x02);
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write_mos_reg(serial, dummy, SP2_REG, 0x02);
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write_mos_reg(serial, dummy, MOS7720_SP1_REG, 0x02);
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write_mos_reg(serial, dummy, MOS7720_SP2_REG, 0x02);
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write_mos_reg(serial, port_number, IER, 0x00);
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write_mos_reg(serial, port_number, FCR, 0x00);
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write_mos_reg(serial, port_number, MOS7720_IER, 0x00);
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write_mos_reg(serial, port_number, MOS7720_FCR, 0x00);
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write_mos_reg(serial, port_number, FCR, 0xcf);
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write_mos_reg(serial, port_number, MOS7720_FCR, 0xcf);
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mos7720_port->shadowLCR = 0x03;
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write_mos_reg(serial, port_number, LCR, mos7720_port->shadowLCR);
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write_mos_reg(serial, port_number, MOS7720_LCR,
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mos7720_port->shadowLCR);
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mos7720_port->shadowMCR = 0x0b;
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write_mos_reg(serial, port_number, MCR, mos7720_port->shadowMCR);
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write_mos_reg(serial, port_number, MOS7720_MCR,
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mos7720_port->shadowMCR);
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write_mos_reg(serial, port_number, SP_CONTROL_REG, 0x00);
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read_mos_reg(serial, dummy, SP_CONTROL_REG, &data);
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write_mos_reg(serial, port_number, MOS7720_SP_CONTROL_REG, 0x00);
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read_mos_reg(serial, dummy, MOS7720_SP_CONTROL_REG, &data);
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data = data | (port->port_number + 1);
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write_mos_reg(serial, dummy, SP_CONTROL_REG, data);
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write_mos_reg(serial, dummy, MOS7720_SP_CONTROL_REG, data);
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mos7720_port->shadowLCR = 0x83;
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write_mos_reg(serial, port_number, LCR, mos7720_port->shadowLCR);
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write_mos_reg(serial, port_number, THR, 0x0c);
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write_mos_reg(serial, port_number, IER, 0x00);
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write_mos_reg(serial, port_number, MOS7720_LCR,
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mos7720_port->shadowLCR);
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write_mos_reg(serial, port_number, MOS7720_THR, 0x0c);
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write_mos_reg(serial, port_number, MOS7720_IER, 0x00);
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mos7720_port->shadowLCR = 0x03;
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write_mos_reg(serial, port_number, LCR, mos7720_port->shadowLCR);
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write_mos_reg(serial, port_number, IER, 0x0c);
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write_mos_reg(serial, port_number, MOS7720_LCR,
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mos7720_port->shadowLCR);
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write_mos_reg(serial, port_number, MOS7720_IER, 0x0c);
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response = usb_submit_urb(port->read_urb, GFP_KERNEL);
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if (response)
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@ -1144,8 +1156,8 @@ static void mos7720_close(struct usb_serial_port *port)
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usb_kill_urb(port->write_urb);
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usb_kill_urb(port->read_urb);
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write_mos_reg(serial, port->port_number, MCR, 0x00);
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write_mos_reg(serial, port->port_number, IER, 0x00);
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write_mos_reg(serial, port->port_number, MOS7720_MCR, 0x00);
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write_mos_reg(serial, port->port_number, MOS7720_IER, 0x00);
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mos7720_port->open = 0;
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}
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@ -1169,7 +1181,8 @@ static void mos7720_break(struct tty_struct *tty, int break_state)
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data = mos7720_port->shadowLCR & ~UART_LCR_SBC;
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mos7720_port->shadowLCR = data;
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write_mos_reg(serial, port->port_number, LCR, mos7720_port->shadowLCR);
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write_mos_reg(serial, port->port_number, MOS7720_LCR,
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mos7720_port->shadowLCR);
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}
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/*
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@ -1297,7 +1310,7 @@ static void mos7720_throttle(struct tty_struct *tty)
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/* if we are implementing RTS/CTS, toggle that line */
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if (tty->termios.c_cflag & CRTSCTS) {
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mos7720_port->shadowMCR &= ~UART_MCR_RTS;
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write_mos_reg(port->serial, port->port_number, MCR,
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write_mos_reg(port->serial, port->port_number, MOS7720_MCR,
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mos7720_port->shadowMCR);
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}
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}
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@ -1327,7 +1340,7 @@ static void mos7720_unthrottle(struct tty_struct *tty)
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/* if we are implementing RTS/CTS, toggle that line */
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if (tty->termios.c_cflag & CRTSCTS) {
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mos7720_port->shadowMCR |= UART_MCR_RTS;
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write_mos_reg(port->serial, port->port_number, MCR,
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write_mos_reg(port->serial, port->port_number, MOS7720_MCR,
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mos7720_port->shadowMCR);
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}
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}
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@ -1352,35 +1365,39 @@ static int set_higher_rates(struct moschip_port *mos7720_port,
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dev_dbg(&port->dev, "Sending Setting Commands ..........\n");
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port_number = port->port_number;
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write_mos_reg(serial, port_number, IER, 0x00);
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write_mos_reg(serial, port_number, FCR, 0x00);
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write_mos_reg(serial, port_number, FCR, 0xcf);
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write_mos_reg(serial, port_number, MOS7720_IER, 0x00);
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write_mos_reg(serial, port_number, MOS7720_FCR, 0x00);
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write_mos_reg(serial, port_number, MOS7720_FCR, 0xcf);
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mos7720_port->shadowMCR = 0x0b;
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write_mos_reg(serial, port_number, MCR, mos7720_port->shadowMCR);
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write_mos_reg(serial, dummy, SP_CONTROL_REG, 0x00);
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write_mos_reg(serial, port_number, MOS7720_MCR,
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mos7720_port->shadowMCR);
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write_mos_reg(serial, dummy, MOS7720_SP_CONTROL_REG, 0x00);
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/***********************************************
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* Set for higher rates *
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***********************************************/
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/* writing baud rate verbatum into uart clock field clearly not right */
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if (port_number == 0)
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sp_reg = SP1_REG;
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sp_reg = MOS7720_SP1_REG;
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else
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sp_reg = SP2_REG;
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sp_reg = MOS7720_SP2_REG;
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write_mos_reg(serial, dummy, sp_reg, baud * 0x10);
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write_mos_reg(serial, dummy, SP_CONTROL_REG, 0x03);
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write_mos_reg(serial, dummy, MOS7720_SP_CONTROL_REG, 0x03);
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mos7720_port->shadowMCR = 0x2b;
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write_mos_reg(serial, port_number, MCR, mos7720_port->shadowMCR);
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write_mos_reg(serial, port_number, MOS7720_MCR,
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mos7720_port->shadowMCR);
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/***********************************************
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* Set DLL/DLM
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***********************************************/
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mos7720_port->shadowLCR = mos7720_port->shadowLCR | UART_LCR_DLAB;
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write_mos_reg(serial, port_number, LCR, mos7720_port->shadowLCR);
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write_mos_reg(serial, port_number, DLL, 0x01);
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write_mos_reg(serial, port_number, DLM, 0x00);
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write_mos_reg(serial, port_number, MOS7720_LCR,
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mos7720_port->shadowLCR);
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write_mos_reg(serial, port_number, MOS7720_DLL, 0x01);
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write_mos_reg(serial, port_number, MOS7720_DLM, 0x00);
|
||||
mos7720_port->shadowLCR = mos7720_port->shadowLCR & ~UART_LCR_DLAB;
|
||||
write_mos_reg(serial, port_number, LCR, mos7720_port->shadowLCR);
|
||||
write_mos_reg(serial, port_number, MOS7720_LCR,
|
||||
mos7720_port->shadowLCR);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -1488,15 +1505,16 @@ static int send_cmd_write_baud_rate(struct moschip_port *mos7720_port,
|
|||
|
||||
/* Enable access to divisor latch */
|
||||
mos7720_port->shadowLCR = mos7720_port->shadowLCR | UART_LCR_DLAB;
|
||||
write_mos_reg(serial, number, LCR, mos7720_port->shadowLCR);
|
||||
write_mos_reg(serial, number, MOS7720_LCR, mos7720_port->shadowLCR);
|
||||
|
||||
/* Write the divisor */
|
||||
write_mos_reg(serial, number, DLL, (__u8)(divisor & 0xff));
|
||||
write_mos_reg(serial, number, DLM, (__u8)((divisor & 0xff00) >> 8));
|
||||
write_mos_reg(serial, number, MOS7720_DLL, (__u8)(divisor & 0xff));
|
||||
write_mos_reg(serial, number, MOS7720_DLM,
|
||||
(__u8)((divisor & 0xff00) >> 8));
|
||||
|
||||
/* Disable access to divisor latch */
|
||||
mos7720_port->shadowLCR = mos7720_port->shadowLCR & ~UART_LCR_DLAB;
|
||||
write_mos_reg(serial, number, LCR, mos7720_port->shadowLCR);
|
||||
write_mos_reg(serial, number, MOS7720_LCR, mos7720_port->shadowLCR);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
@ -1600,14 +1618,16 @@ static void change_port_settings(struct tty_struct *tty,
|
|||
|
||||
|
||||
/* Disable Interrupts */
|
||||
write_mos_reg(serial, port_number, IER, 0x00);
|
||||
write_mos_reg(serial, port_number, FCR, 0x00);
|
||||
write_mos_reg(serial, port_number, FCR, 0xcf);
|
||||
write_mos_reg(serial, port_number, MOS7720_IER, 0x00);
|
||||
write_mos_reg(serial, port_number, MOS7720_FCR, 0x00);
|
||||
write_mos_reg(serial, port_number, MOS7720_FCR, 0xcf);
|
||||
|
||||
/* Send the updated LCR value to the mos7720 */
|
||||
write_mos_reg(serial, port_number, LCR, mos7720_port->shadowLCR);
|
||||
write_mos_reg(serial, port_number, MOS7720_LCR,
|
||||
mos7720_port->shadowLCR);
|
||||
mos7720_port->shadowMCR = 0x0b;
|
||||
write_mos_reg(serial, port_number, MCR, mos7720_port->shadowMCR);
|
||||
write_mos_reg(serial, port_number, MOS7720_MCR,
|
||||
mos7720_port->shadowMCR);
|
||||
|
||||
/* set up the MCR register and send it to the mos7720 */
|
||||
mos7720_port->shadowMCR = UART_MCR_OUT2;
|
||||
|
@ -1619,14 +1639,17 @@ static void change_port_settings(struct tty_struct *tty,
|
|||
/* To set hardware flow control to the specified *
|
||||
* serial port, in SP1/2_CONTROL_REG */
|
||||
if (port_number)
|
||||
write_mos_reg(serial, dummy, SP_CONTROL_REG, 0x01);
|
||||
write_mos_reg(serial, dummy, MOS7720_SP_CONTROL_REG,
|
||||
0x01);
|
||||
else
|
||||
write_mos_reg(serial, dummy, SP_CONTROL_REG, 0x02);
|
||||
write_mos_reg(serial, dummy, MOS7720_SP_CONTROL_REG,
|
||||
0x02);
|
||||
|
||||
} else
|
||||
mos7720_port->shadowMCR &= ~(UART_MCR_XONANY);
|
||||
|
||||
write_mos_reg(serial, port_number, MCR, mos7720_port->shadowMCR);
|
||||
write_mos_reg(serial, port_number, MOS7720_MCR,
|
||||
mos7720_port->shadowMCR);
|
||||
|
||||
/* Determine divisor based on baud rate */
|
||||
baud = tty_get_baud_rate(tty);
|
||||
|
@ -1639,7 +1662,7 @@ static void change_port_settings(struct tty_struct *tty,
|
|||
if (baud >= 230400) {
|
||||
set_higher_rates(mos7720_port, baud);
|
||||
/* Enable Interrupts */
|
||||
write_mos_reg(serial, port_number, IER, 0x0c);
|
||||
write_mos_reg(serial, port_number, MOS7720_IER, 0x0c);
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -1650,7 +1673,7 @@ static void change_port_settings(struct tty_struct *tty,
|
|||
if (cflag & CBAUD)
|
||||
tty_encode_baud_rate(tty, baud, baud);
|
||||
/* Enable Interrupts */
|
||||
write_mos_reg(serial, port_number, IER, 0x0c);
|
||||
write_mos_reg(serial, port_number, MOS7720_IER, 0x0c);
|
||||
|
||||
if (port->read_urb->status != -EINPROGRESS) {
|
||||
status = usb_submit_urb(port->read_urb, GFP_KERNEL);
|
||||
|
@ -1725,7 +1748,7 @@ static int get_lsr_info(struct tty_struct *tty,
|
|||
|
||||
count = mos7720_chars_in_buffer(tty);
|
||||
if (count == 0) {
|
||||
read_mos_reg(port->serial, port_number, LSR, &data);
|
||||
read_mos_reg(port->serial, port_number, MOS7720_LSR, &data);
|
||||
if ((data & (UART_LSR_TEMT | UART_LSR_THRE))
|
||||
== (UART_LSR_TEMT | UART_LSR_THRE)) {
|
||||
dev_dbg(&port->dev, "%s -- Empty\n", __func__);
|
||||
|
@ -1782,7 +1805,7 @@ static int mos7720_tiocmset(struct tty_struct *tty,
|
|||
mcr &= ~UART_MCR_LOOP;
|
||||
|
||||
mos7720_port->shadowMCR = mcr;
|
||||
write_mos_reg(port->serial, port->port_number, MCR,
|
||||
write_mos_reg(port->serial, port->port_number, MOS7720_MCR,
|
||||
mos7720_port->shadowMCR);
|
||||
|
||||
return 0;
|
||||
|
@ -1827,7 +1850,7 @@ static int set_modem_info(struct moschip_port *mos7720_port, unsigned int cmd,
|
|||
}
|
||||
|
||||
mos7720_port->shadowMCR = mcr;
|
||||
write_mos_reg(port->serial, port->port_number, MCR,
|
||||
write_mos_reg(port->serial, port->port_number, MOS7720_MCR,
|
||||
mos7720_port->shadowMCR);
|
||||
|
||||
return 0;
|
||||
|
@ -1942,7 +1965,7 @@ static int mos7720_startup(struct usb_serial *serial)
|
|||
}
|
||||
#endif
|
||||
/* LSR For Port 1 */
|
||||
read_mos_reg(serial, 0, LSR, &data);
|
||||
read_mos_reg(serial, 0, MOS7720_LSR, &data);
|
||||
dev_dbg(&dev->dev, "LSR:%x\n", data);
|
||||
|
||||
return 0;
|
||||
|
|
Loading…
Reference in a new issue