MIPS: mscc: ocelot: rename pinctrl nodes

The pinctrl device tree binding will be converted to YAML format. Rename
the pin nodes so they end with "-pins" to match the schema.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Michael Walle 2022-04-20 21:50:17 +02:00 committed by Thomas Bogendoerfer
parent 3949aaa608
commit ee5930c99a
2 changed files with 5 additions and 5 deletions

View file

@ -225,7 +225,7 @@ uart2_pins: uart2-pins {
function = "uart2";
};
miim1: miim1 {
miim1_pins: miim1-pins {
pins = "GPIO_14", "GPIO_15";
function = "miim";
};
@ -261,7 +261,7 @@ mdio1: mdio@10700c0 {
reg = <0x10700c0 0x24>;
interrupts = <15>;
pinctrl-names = "default";
pinctrl-0 = <&miim1>;
pinctrl-0 = <&miim1_pins>;
status = "disabled";
};

View file

@ -22,12 +22,12 @@ memory@0 {
};
&gpio {
phy_int_pins: phy_int_pins {
phy_int_pins: phy-int-pins {
pins = "GPIO_4";
function = "gpio";
};
phy_load_save_pins: phy_load_save_pins {
phy_load_save_pins: phy-load-save-pins {
pins = "GPIO_10";
function = "ptp2";
};
@ -40,7 +40,7 @@ &mdio0 {
&mdio1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&miim1>, <&phy_int_pins>, <&phy_load_save_pins>;
pinctrl-0 = <&miim1_pins>, <&phy_int_pins>, <&phy_load_save_pins>;
phy7: ethernet-phy@0 {
reg = <0>;