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kprobes/x86: Prohibit probing on exception masking instructions
Since MOV SS and POP SS instructions will delay the exceptions until the next instruction is executed, single-stepping on it by kprobes must be prohibited. However, kprobes usually executes those instructions directly on trampoline buffer (a.k.a. kprobe-booster), except for the kprobes which has post_handler. Thus if kprobe user probes MOV SS with post_handler, it will do single-stepping on the MOV SS. This means it is safe that if it is used via ftrace or perf/bpf since those don't use the post_handler. Anyway, since the stack switching is a rare case, it is safer just rejecting kprobes on such instructions. Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Ricardo Neri <ricardo.neri-calderon@linux.intel.com> Cc: Francis Deslauriers <francis.deslauriers@efficios.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Alexei Starovoitov <ast@kernel.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: "H . Peter Anvin" <hpa@zytor.com> Cc: Yonghong Song <yhs@fb.com> Cc: Borislav Petkov <bp@suse.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: "David S . Miller" <davem@davemloft.net> Link: https://lkml.kernel.org/r/152587069574.17316.3311695234863248641.stgit@devbox
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2 changed files with 22 additions and 0 deletions
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@ -208,4 +208,22 @@ static inline int insn_offset_immediate(struct insn *insn)
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return insn_offset_displacement(insn) + insn->displacement.nbytes;
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}
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#define POP_SS_OPCODE 0x1f
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#define MOV_SREG_OPCODE 0x8e
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/*
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* Intel SDM Vol.3A 6.8.3 states;
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* "Any single-step trap that would be delivered following the MOV to SS
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* instruction or POP to SS instruction (because EFLAGS.TF is 1) is
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* suppressed."
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* This function returns true if @insn is MOV SS or POP SS. On these
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* instructions, single stepping is suppressed.
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*/
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static inline int insn_masking_exception(struct insn *insn)
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{
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return insn->opcode.bytes[0] == POP_SS_OPCODE ||
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(insn->opcode.bytes[0] == MOV_SREG_OPCODE &&
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X86_MODRM_REG(insn->modrm.bytes[0]) == 2);
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}
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#endif /* _ASM_X86_INSN_H */
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@ -370,6 +370,10 @@ int __copy_instruction(u8 *dest, u8 *src, u8 *real, struct insn *insn)
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if (insn->opcode.bytes[0] == BREAKPOINT_INSTRUCTION)
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return 0;
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/* We should not singlestep on the exception masking instructions */
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if (insn_masking_exception(insn))
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return 0;
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#ifdef CONFIG_X86_64
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/* Only x86_64 has RIP relative instructions */
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if (insn_rip_relative(insn)) {
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