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cnic: Add support for 57712 device
Add new interrupt ack functions and other hardware interface logic to support the new device. Update version to 2.2.6. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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parent
a3ceeeb8f1
commit
ee87a82a28
3 changed files with 103 additions and 17 deletions
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@ -1077,7 +1077,7 @@ static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
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cp->ctx_blks = blks;
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cp->ctx_blk_size = ctx_blk_size;
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if (BNX2X_CHIP_IS_E1H(cp->chip_id))
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if (!BNX2X_CHIP_IS_57710(cp->chip_id))
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cp->ctx_align = 0;
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else
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cp->ctx_align = ctx_blk_size;
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@ -2406,6 +2406,22 @@ static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
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CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
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}
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static void cnic_ack_igu_sb(struct cnic_dev *dev, u8 igu_sb_id, u8 segment,
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u16 index, u8 op, u8 update)
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{
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struct igu_regular cmd_data;
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u32 igu_addr = BAR_IGU_INTMEM + (IGU_CMD_INT_ACK_BASE + igu_sb_id) * 8;
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cmd_data.sb_id_and_flags =
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(index << IGU_REGULAR_SB_INDEX_SHIFT) |
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(segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
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(update << IGU_REGULAR_BUPDATE_SHIFT) |
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(op << IGU_REGULAR_ENABLE_INT_SHIFT);
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CNIC_WR(dev, igu_addr, cmd_data.sb_id_and_flags);
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}
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static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
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{
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struct cnic_local *cp = dev->cnic_priv;
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@ -2414,6 +2430,14 @@ static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
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IGU_INT_DISABLE, 0);
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}
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static void cnic_ack_bnx2x_e2_msix(struct cnic_dev *dev)
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{
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struct cnic_local *cp = dev->cnic_priv;
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cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, 0,
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IGU_INT_DISABLE, 0);
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}
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static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info)
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{
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u32 last_status = *info->status_idx_ptr;
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@ -2445,8 +2469,12 @@ static void cnic_service_bnx2x_bh(unsigned long data)
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status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1);
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CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx + MAX_KCQ_IDX);
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cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, USTORM_ID,
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status_idx, IGU_INT_ENABLE, 1);
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if (BNX2X_CHIP_IS_E2(cp->chip_id))
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cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF,
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status_idx, IGU_INT_ENABLE, 1);
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else
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cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, USTORM_ID,
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status_idx, IGU_INT_ENABLE, 1);
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}
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static int cnic_service_bnx2x(void *data, void *status_blk)
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@ -4208,7 +4236,7 @@ static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev,
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static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev)
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{
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struct cnic_local *cp = dev->cnic_priv;
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u32 base, addr, val;
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u32 base, base2, addr, val;
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int port = CNIC_PORT(cp);
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dev->max_iscsi_conn = 0;
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@ -4216,6 +4244,8 @@ static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev)
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if (base == 0)
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return;
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base2 = CNIC_RD(dev, (CNIC_PATH(cp) ? MISC_REG_GENERIC_CR_1 :
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MISC_REG_GENERIC_CR_0));
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addr = BNX2X_SHMEM_ADDR(base,
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dev_info.port_hw_config[port].iscsi_mac_upper);
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@ -4248,11 +4278,15 @@ static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev)
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val16 ^= 0x1e1e;
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dev->max_iscsi_conn = val16;
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}
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if (BNX2X_CHIP_IS_E1H(cp->chip_id)) {
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if (BNX2X_CHIP_IS_E1H(cp->chip_id) || BNX2X_CHIP_IS_E2(cp->chip_id)) {
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int func = CNIC_FUNC(cp);
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u32 mf_cfg_addr;
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mf_cfg_addr = base + BNX2X_SHMEM_MF_BLK_OFFSET;
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if (BNX2X_SHMEM2_HAS(base2, mf_cfg_addr))
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mf_cfg_addr = CNIC_RD(dev, BNX2X_SHMEM2_ADDR(base2,
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mf_cfg_addr));
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else
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mf_cfg_addr = base + BNX2X_SHMEM_MF_BLK_OFFSET;
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addr = mf_cfg_addr +
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offsetof(struct mf_cfg, func_mf_config[func].e1hov_tag);
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@ -4277,9 +4311,22 @@ static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
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struct cnic_eth_dev *ethdev = cp->ethdev;
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int func = CNIC_FUNC(cp), ret, i;
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u32 pfid;
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struct host_hc_status_block_e1x *sb = cp->status_blk.gen;
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cp->pfid = func;
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if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
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u32 val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN_OVWR);
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if (!(val & 1))
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val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN);
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else
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val = (val >> 1) & 1;
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if (val)
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cp->pfid = func >> 1;
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else
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cp->pfid = func & 0x6;
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} else {
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cp->pfid = func;
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}
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pfid = cp->pfid;
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ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
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@ -4294,10 +4341,21 @@ static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
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CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0);
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cp->kcq1.sw_prod_idx = 0;
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cp->kcq1.hw_prod_idx_ptr =
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&sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
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cp->kcq1.status_idx_ptr =
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&sb->sb.running_index[SM_RX_ID];
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if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
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struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
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cp->kcq1.hw_prod_idx_ptr =
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&sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
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cp->kcq1.status_idx_ptr =
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&sb->sb.running_index[SM_RX_ID];
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} else {
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struct host_hc_status_block_e1x *sb = cp->status_blk.gen;
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cp->kcq1.hw_prod_idx_ptr =
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&sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
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cp->kcq1.status_idx_ptr =
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&sb->sb.running_index[SM_RX_ID];
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}
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cnic_get_bnx2x_iscsi_info(dev);
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@ -4380,7 +4438,9 @@ static void cnic_init_rings(struct cnic_dev *dev)
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cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
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off = BAR_USTRORM_INTMEM +
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USTORM_RX_PRODS_E1X_OFFSET(CNIC_PORT(cp), cli);
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(BNX2X_CHIP_IS_E2(cp->chip_id) ?
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USTORM_RX_PRODS_E2_OFFSET(cl_qzone_id) :
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USTORM_RX_PRODS_E1X_OFFSET(CNIC_PORT(cp), cli));
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for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
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CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
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@ -4506,7 +4566,6 @@ static int cnic_start_hw(struct cnic_dev *dev)
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return -EALREADY;
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dev->regview = ethdev->io_base;
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cp->chip_id = ethdev->chip_id;
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pci_dev_get(dev->pcidev);
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cp->func = PCI_FUNC(dev->pcidev->devfn);
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cp->status_blk.gen = ethdev->irq_arr[0].status_blk;
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@ -4683,6 +4742,7 @@ static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
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cp = cdev->cnic_priv;
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cp->ethdev = ethdev;
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cdev->pcidev = pdev;
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cp->chip_id = ethdev->chip_id;
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cp->cnic_ops = &cnic_bnx2_ops;
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cp->start_hw = cnic_start_bnx2_hw;
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@ -4737,6 +4797,7 @@ static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
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cp = cdev->cnic_priv;
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cp->ethdev = ethdev;
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cdev->pcidev = pdev;
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cp->chip_id = ethdev->chip_id;
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cp->cnic_ops = &cnic_bnx2x_ops;
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cp->start_hw = cnic_start_bnx2x_hw;
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@ -4748,7 +4809,10 @@ static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
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cp->stop_cm = cnic_cm_stop_bnx2x_hw;
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cp->enable_int = cnic_enable_bnx2x_int;
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cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
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cp->ack_int = cnic_ack_bnx2x_msix;
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if (BNX2X_CHIP_IS_E2(cp->chip_id))
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cp->ack_int = cnic_ack_bnx2x_e2_msix;
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else
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cp->ack_int = cnic_ack_bnx2x_msix;
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cp->close_conn = cnic_close_bnx2x_conn;
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cp->next_idx = cnic_bnx2x_next_idx;
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cp->hw_idx = cnic_bnx2x_hw_idx;
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@ -372,15 +372,35 @@ struct bnx2x_bd_chain_next {
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#define BNX2X_ISCSI_PBL_NOT_CACHED 0xff
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#define BNX2X_ISCSI_PDU_HEADER_NOT_CACHED 0xff
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#define BNX2X_CHIP_NUM_57710 0x164e
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#define BNX2X_CHIP_NUM_57711 0x164f
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#define BNX2X_CHIP_NUM_57711E 0x1650
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#define BNX2X_CHIP_NUM_57712 0x1662
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#define BNX2X_CHIP_NUM_57712E 0x1663
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#define BNX2X_CHIP_NUM_57713 0x1651
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#define BNX2X_CHIP_NUM_57713E 0x1652
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#define BNX2X_CHIP_NUM(x) (x >> 16)
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#define BNX2X_CHIP_IS_57710(x) \
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(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57710)
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#define BNX2X_CHIP_IS_57711(x) \
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(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711)
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#define BNX2X_CHIP_IS_57711E(x) \
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(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711E)
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#define BNX2X_CHIP_IS_E1H(x) \
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(BNX2X_CHIP_IS_57711(x) || BNX2X_CHIP_IS_57711E(x))
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#define BNX2X_CHIP_IS_57712(x) \
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(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57712)
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#define BNX2X_CHIP_IS_57712E(x) \
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(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57712E)
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#define BNX2X_CHIP_IS_57713(x) \
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(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57713)
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#define BNX2X_CHIP_IS_57713E(x) \
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(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57713E)
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#define BNX2X_CHIP_IS_E2(x) \
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(BNX2X_CHIP_IS_57712(x) || BNX2X_CHIP_IS_57712E(x) || \
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BNX2X_CHIP_IS_57713(x) || BNX2X_CHIP_IS_57713E(x))
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#define IS_E1H_OFFSET BNX2X_CHIP_IS_E1H(cp->chip_id)
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#define BNX2X_RX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_bd))
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@ -409,6 +429,8 @@ struct bnx2x_bd_chain_next {
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#define CNIC_PORT(cp) ((cp)->pfid & 1)
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#define CNIC_FUNC(cp) ((cp)->func)
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#define CNIC_PATH(cp) (!BNX2X_CHIP_IS_E2(cp->chip_id) ? 0 :\
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(CNIC_FUNC(cp) & 1))
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#define CNIC_E1HVN(cp) ((cp)->pfid >> 1)
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#define BNX2X_HW_CID(cp, x) ((CNIC_PORT(cp) << 23) | \
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@ -12,8 +12,8 @@
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#ifndef CNIC_IF_H
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#define CNIC_IF_H
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#define CNIC_MODULE_VERSION "2.2.5"
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#define CNIC_MODULE_RELDATE "September 29, 2010"
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#define CNIC_MODULE_VERSION "2.2.6"
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#define CNIC_MODULE_RELDATE "Oct 12, 2010"
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#define CNIC_ULP_RDMA 0
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#define CNIC_ULP_ISCSI 1
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