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powerpc/4xx: Fix build errors from mfdcr()
lkp reported a build error in fsp2.o: CC arch/powerpc/platforms/44x/fsp2.o {standard input}:577: Error: unsupported relocation against base Which comes from: pr_err("GESR0: 0x%08x\n", mfdcr(base + PLB4OPB_GESR0)); Where our mfdcr() macro is stringifying "base + PLB4OPB_GESR0", and passing that to the assembler, which obviously doesn't work. The mfdcr() macro already checks that the argument is constant using __builtin_constant_p(), and if not calls the out-of-line version of mfdcr(). But in this case GCC is smart enough to notice that "base + PLB4OPB_GESR0" will be constant, even though it's not something we can immediately stringify into a register number. Segher pointed out that passing the register number to the inline asm as a constant would be better, and in fact it fixes the build error, presumably because it gives GCC a chance to resolve the value. While we're at it, change mtdcr() similarly. Reported-by: kernel test robot <lkp@intel.com> Suggested-by: Segher Boessenkool <segher@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Acked-by: Feng Tang <feng.tang@intel.com> Link: https://lore.kernel.org/r/20210218123058.748882-1-mpe@ellerman.id.au
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1 changed files with 4 additions and 4 deletions
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@ -53,8 +53,8 @@ static inline void mtdcrx(unsigned int reg, unsigned int val)
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#define mfdcr(rn) \
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({unsigned int rval; \
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if (__builtin_constant_p(rn) && rn < 1024) \
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asm volatile("mfdcr %0," __stringify(rn) \
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: "=r" (rval)); \
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asm volatile("mfdcr %0, %1" : "=r" (rval) \
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: "n" (rn)); \
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else if (likely(cpu_has_feature(CPU_FTR_INDEXED_DCR))) \
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rval = mfdcrx(rn); \
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else \
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@ -64,8 +64,8 @@ static inline void mtdcrx(unsigned int reg, unsigned int val)
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#define mtdcr(rn, v) \
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do { \
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if (__builtin_constant_p(rn) && rn < 1024) \
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asm volatile("mtdcr " __stringify(rn) ",%0" \
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: : "r" (v)); \
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asm volatile("mtdcr %0, %1" \
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: : "n" (rn), "r" (v)); \
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else if (likely(cpu_has_feature(CPU_FTR_INDEXED_DCR))) \
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mtdcrx(rn, v); \
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else \
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