ARM64: dts: marvell: armada-cp110: Add registers clock for the NAND node

This extra clock is needed to access the registers of the NAND controller
used on CP110 component of the Armada 7K/8K SoCs.

This follow the changes already made in the binding documentation (as
well as in the driver): "mtd: nand: marvell: Fix clock resource by adding
a register clock"

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This commit is contained in:
Gregory CLEMENT 2018-03-14 17:19:27 +01:00
parent 3c7f7f1503
commit ef04faf106

View file

@ -365,7 +365,9 @@ CP110_LABEL(nand_controller): nand@720000 {
#address-cells = <1>;
#size-cells = <0>;
interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&CP110_LABEL(clk) 1 2>;
clock-names = "core", "reg";
clocks = <&CP110_LABEL(clk) 1 2>,
<&CP110_LABEL(clk) 1 17>;
marvell,system-controller = <&CP110_LABEL(syscon0)>;
status = "disabled";
};