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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-27 12:57:53 +00:00
ARM: dts: add support for Laird SOM60 module and DVK boards
This adds support for Lairds upcoming SOM module, featuring Marvell WiFi and Bluetooth, 2Gb NAND / 1Gb LPDDR SDRAM, and an Atmel SAMA5D3 CPU. Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
Ben Whitten
Alexandre Belloni
parent
fd2c7ef943
commit
ef8375bea2
5 changed files with 575 additions and 0 deletions
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@ -51,6 +51,7 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
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at91-sama5d2_ptc_ek.dtb \
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at91-sama5d2_xplained.dtb \
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at91-sama5d3_xplained.dtb \
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at91-dvk_som60.dtb \
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at91-gatwick.dtb \
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at91-tse850-3.dtb \
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at91-wb50n.dtb \
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95
arch/arm/boot/dts/at91-dvk_som60.dts
Normal file
95
arch/arm/boot/dts/at91-dvk_som60.dts
Normal file
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@ -0,0 +1,95 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* at91-dvk_som60.dts - Device Tree file for the DVK SOM60 board
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*
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* Copyright (C) 2018 Laird,
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* 2018 Ben Whitten <ben.whitten@lairdtech.com>
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*
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*/
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/dts-v1/;
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#include "at91-som60.dtsi"
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#include "at91-dvk_su60_somc.dtsi"
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#include "at91-dvk_su60_somc_lcm.dtsi"
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/ {
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model = "Laird DVK SOM60";
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compatible = "laird,dvk-som60", "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
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chosen {
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stdout-path = &dbgu;
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tick-timer = &pit;
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};
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};
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&mmc0 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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};
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&ssc0 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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};
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&i2c1 {
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status = "okay";
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};
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&usart1 {
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status = "okay";
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};
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&usart2 {
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status = "okay";
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};
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&usart3 {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&dbgu {
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status = "okay";
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};
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&pit {
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status = "okay";
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};
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&adc0 {
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status = "okay";
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};
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&can1 {
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status = "okay";
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};
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&macb0 {
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status = "okay";
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};
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&macb1 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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&usb2 {
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status = "okay";
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};
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159
arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
Normal file
159
arch/arm/boot/dts/at91-dvk_su60_somc.dtsi
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@ -0,0 +1,159 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* at91-dvk_su60_somc.dtsi - Device Tree file for the DVK SOM60 base board
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*
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* Copyright (C) 2018 Laird,
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* 2018 Ben Whitten <ben.whitten@lairdtech.com>
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*
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*/
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/ {
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sound {
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compatible = "atmel,asoc-wm8904";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pck2_as_audio_mck>;
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atmel,model = "wm8904 @ DVK-SOM60";
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atmel,audio-routing =
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"Headphone Jack", "HPOUTL",
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"Headphone Jack", "HPOUTR",
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"IN2L", "Line In Jack",
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"IN2R", "Line In Jack",
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"Mic", "MICBIAS",
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"IN1L", "Mic";
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atmel,ssc-controller = <&ssc0>;
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atmel,audio-codec = <&wm8904>;
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status = "okay";
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};
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};
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&mmc0 {
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status = "okay";
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pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
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slot@0 {
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bus-width = <4>;
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cd-gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
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cd-inverted;
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};
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};
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&spi0 {
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status = "okay";
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/* spi0.0: 4M Flash Macronix MX25R4035FM1IL0 */
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spi-flash@0 {
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compatible = "mxicy,mx25u4035", "jedec,spi-nor";
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spi-max-frequency = <33000000>;
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reg = <0>;
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};
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};
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&ssc0 {
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atmel,clk-from-rk-pin;
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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wm8904: wm8904@1a {
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compatible = "wlf,wm8904";
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reg = <0x1a>;
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clocks = <&pck2>;
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clock-names = "mclk";
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};
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};
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&i2c1 {
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status = "okay";
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eeprom@87 {
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compatible = "giantec,gt24c32a", "atmel,24c32";
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reg = <87>;
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pagesize = <32>;
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};
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};
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&usart1 {
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status = "okay";
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};
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&usart2 {
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status = "okay";
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};
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&usart3 {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&dbgu {
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status = "okay";
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};
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&pit {
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status = "okay";
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};
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&adc0 {
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status = "okay";
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};
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&can1 {
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status = "okay";
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};
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&macb0 {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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ethernet-phy@7 {
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reg = <7>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_geth_int>;
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interrupt-parent = <&pioB>;
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interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
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txen-skew-ps = <800>;
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txc-skew-ps = <3000>;
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rxdv-skew-ps = <400>;
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rxc-skew-ps = <3000>;
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rxd0-skew-ps = <400>;
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rxd1-skew-ps = <400>;
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rxd2-skew-ps = <400>;
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rxd3-skew-ps = <400>;
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};
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};
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&macb1 {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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ethernet-phy@1 {
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reg = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_eth_int>;
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interrupt-parent = <&pioC>;
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interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
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};
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};
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&usb0 {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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&usb2 {
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status = "okay";
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};
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90
arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
Normal file
90
arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi
Normal file
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@ -0,0 +1,90 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* at91-dvk_su60_somc_lcm.dtsi - Device Tree file for the DVK SOM60 LCD board
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*
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* Copyright (C) 2018 Laird,
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* 2018 Ben Whitten <ben.whitten@lairdtech.com>
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*
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*/
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/ {
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&hlcdc_pwm 0 50000 0>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <6>;
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status = "okay";
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};
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panel: panel {
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compatible = "winstar,wf70gtiagdng0", "innolux,at070tn92", "simple-panel";
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backlight = <&backlight>;
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power-supply = <&vcc_lcd_reg>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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port@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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panel_input: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&hlcdc_panel_output>;
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};
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};
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};
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vcc_lcd_reg: fixedregulator_lcd {
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compatible = "regulator-fixed";
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regulator-name = "VCC LCM";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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status = "okay";
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};
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};
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&pinctrl {
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board {
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pinctrl_lcd_ctp_int: lcd_ctp_int {
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atmel,pins =
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<AT91_PIOC 28 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
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};
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};
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};
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&i2c1 {
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status = "okay";
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ft5426@56 {
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compatible = "focaltech,ft5426", "edt,edt-ft5406";
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reg = <56>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lcd_ctp_int>;
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interrupt-parent = <&pioC>;
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interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
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touchscreen-size-x = <800>;
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touchscreen-size-y = <480>;
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};
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};
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&hlcdc {
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status = "okay";
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hlcdc-display-controller {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
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port@0 {
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hlcdc_panel_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&panel_input>;
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};
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};
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};
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};
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230
arch/arm/boot/dts/at91-som60.dtsi
Normal file
230
arch/arm/boot/dts/at91-som60.dtsi
Normal file
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@ -0,0 +1,230 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* at91-som60.dtsi - Device Tree file for the SOM60 module
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*
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* Copyright (C) 2018 Laird,
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* 2018 Ben Whitten <ben.whitten@lairdtech.com>
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*
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*/
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#include "sama5d36.dtsi"
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/ {
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model = "Laird SOM60";
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compatible = "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
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chosen {
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stdout-path = &dbgu;
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};
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memory {
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reg = <0x20000000 0x8000000>;
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};
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clocks {
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slow_xtal {
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clock-frequency = <32768>;
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};
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main_xtal {
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clock-frequency = <12000000>;
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};
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};
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};
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&pinctrl {
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board {
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pinctrl_mmc0_cd: mmc0_cd {
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atmel,pins =
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<AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
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};
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pinctrl_mmc0_en: mmc0_en {
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atmel,pins =
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<AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
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};
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pinctrl_nand0_wp: nand0_wp {
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atmel,pins =
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<AT91_PIOE 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
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};
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pinctrl_usb_vbus: usb_vbus {
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atmel,pins =
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<AT91_PIOE 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
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/* Conflicts with USART2_SCK */
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};
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pinctrl_usart2_sck: usart2_sck {
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atmel,pins =
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<AT91_PIOE 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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/* Conflicts with USB_VBUS */
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};
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pinctrl_usb_oc: usb_oc {
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atmel,pins =
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<AT91_PIOE 15 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
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/* Conflicts with USART3_SCK */
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};
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pinctrl_usart3_sck: usart3_sck {
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atmel,pins =
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<AT91_PIOE 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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/* Conflicts with USB_OC */
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};
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pinctrl_usba_vbus: usba_vbus {
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atmel,pins =
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<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
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};
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pinctrl_geth_int: geth_int {
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atmel,pins =
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<AT91_PIOB 25 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
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/* Conflicts with USART1_SCK */
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};
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pinctrl_usart1_sck: usart1_sck {
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atmel,pins =
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<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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/* Conflicts with GETH_INT */
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};
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pinctrl_eth_int: eth_int {
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atmel,pins =
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<AT91_PIOC 10 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
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};
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pinctrl_pck2_as_audio_mck: pck2_as_audio_mck {
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atmel,pins =
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<AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
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};
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};
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};
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&mmc0 {
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slot@0 {
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reg = <0>;
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bus-width = <8>;
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};
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};
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&mmc1 {
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status = "okay";
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slot@0 {
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reg = <0>;
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bus-width = <4>;
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};
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};
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&spi0 {
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cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
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};
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&usart0 {
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "okay";
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pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
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};
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&usart1 {
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pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
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};
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&usart2 {
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pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts_cts>;
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};
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&usart3 {
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pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
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};
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&adc0 {
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pinctrl-0 = <
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&pinctrl_adc0_adtrg
|
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&pinctrl_adc0_ad0
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&pinctrl_adc0_ad1
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&pinctrl_adc0_ad2
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&pinctrl_adc0_ad3
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&pinctrl_adc0_ad4
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&pinctrl_adc0_ad5
|
||||
>;
|
||||
};
|
||||
|
||||
&macb0 {
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
&macb1 {
|
||||
phy-mode = "rmii";
|
||||
};
|
||||
|
||||
&ebi {
|
||||
pinctrl-0 = <&pinctrl_ebi_nand_addr>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&nand_controller {
|
||||
status = "okay";
|
||||
|
||||
nand: nand@3 {
|
||||
reg = <0x3 0x0 0x2>;
|
||||
atmel,rb = <0>;
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-ecc-strength = <8>;
|
||||
nand-ecc-step-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
label = "atmel_nand";
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
ubootspl@0 {
|
||||
label = "u-boot-spl";
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
uboot@20000 {
|
||||
label = "u-boot";
|
||||
reg = <0x20000 0x80000>;
|
||||
};
|
||||
|
||||
ubootenv@a0000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0xa0000 0x20000>;
|
||||
};
|
||||
|
||||
ubootenv@c0000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0xc0000 0x20000>;
|
||||
};
|
||||
|
||||
ubi@e0000 {
|
||||
label = "ubi";
|
||||
reg = <0xe0000 0xfe00000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usba_vbus>;
|
||||
atmel,vbus-gpio = <&pioC 14 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb_vbus &pinctrl_usb_oc>;
|
||||
num-ports = <3>;
|
||||
atmel,vbus-gpio = <0
|
||||
&pioE 20 GPIO_ACTIVE_HIGH
|
||||
0>;
|
||||
atmel,oc-gpio = <0
|
||||
&pioE 15 GPIO_ACTIVE_LOW
|
||||
0>;
|
||||
};
|
||||
Loading…
Reference in a new issue