MIPS: Netlogic: Cache, TLB support and feature overrides for XLR

CPU_XLR case added to mm/tlbex.c
CPU_XLR case added to mm/c-r4k.c for PINDEX attribute
Feature overrides for XLR cpu.

Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2333/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Jayachandran C 2011-05-07 01:36:21 +05:30 committed by Ralf Baechle
parent 3c595a515d
commit efa0f81c11
3 changed files with 4 additions and 0 deletions

View file

@ -118,6 +118,8 @@ search_module_dbetables(unsigned long addr)
#define MODULE_PROC_FAMILY "LOONGSON2 " #define MODULE_PROC_FAMILY "LOONGSON2 "
#elif defined CONFIG_CPU_CAVIUM_OCTEON #elif defined CONFIG_CPU_CAVIUM_OCTEON
#define MODULE_PROC_FAMILY "OCTEON " #define MODULE_PROC_FAMILY "OCTEON "
#elif defined CONFIG_CPU_XLR
#define MODULE_PROC_FAMILY "XLR "
#else #else
#error MODULE_PROC_FAMILY undefined for your processor configuration #error MODULE_PROC_FAMILY undefined for your processor configuration
#endif #endif

View file

@ -1006,6 +1006,7 @@ static void __cpuinit probe_pcache(void)
case CPU_25KF: case CPU_25KF:
case CPU_SB1: case CPU_SB1:
case CPU_SB1A: case CPU_SB1A:
case CPU_XLR:
c->dcache.flags |= MIPS_CACHE_PINDEX; c->dcache.flags |= MIPS_CACHE_PINDEX;
break; break;

View file

@ -404,6 +404,7 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
case CPU_5KC: case CPU_5KC:
case CPU_TX49XX: case CPU_TX49XX:
case CPU_PR4450: case CPU_PR4450:
case CPU_XLR:
uasm_i_nop(p); uasm_i_nop(p);
tlbw(p); tlbw(p);
break; break;