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KVM: x86: Update IRTE for posted-interrupts
This patch adds the routine to update IRTE for posted-interrupts when guest changes the interrupt configuration. Signed-off-by: Feng Wu <feng.wu@intel.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> [Squashed in automatically generated patch from the build robot "KVM: x86: vcpu_to_pi_desc() can be static" - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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6d7425f109
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4 changed files with 121 additions and 0 deletions
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@ -897,6 +897,9 @@ struct kvm_x86_ops {
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gfn_t offset, unsigned long mask);
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/* pmu operations of sub-arch */
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const struct kvm_pmu_ops *pmu_ops;
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int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq,
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uint32_t guest_irq, bool set);
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};
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struct kvm_arch_async_pf {
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@ -992,6 +992,39 @@ TRACE_EVENT(kvm_enter_smm,
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__entry->smbase)
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);
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/*
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* Tracepoint for VT-d posted-interrupts.
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*/
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TRACE_EVENT(kvm_pi_irte_update,
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TP_PROTO(unsigned int vcpu_id, unsigned int gsi,
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unsigned int gvec, u64 pi_desc_addr, bool set),
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TP_ARGS(vcpu_id, gsi, gvec, pi_desc_addr, set),
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TP_STRUCT__entry(
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__field( unsigned int, vcpu_id )
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__field( unsigned int, gsi )
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__field( unsigned int, gvec )
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__field( u64, pi_desc_addr )
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__field( bool, set )
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),
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TP_fast_assign(
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__entry->vcpu_id = vcpu_id;
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__entry->gsi = gsi;
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__entry->gvec = gvec;
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__entry->pi_desc_addr = pi_desc_addr;
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__entry->set = set;
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),
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TP_printk("VT-d PI is %s for this irq, vcpu %u, gsi: 0x%x, "
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"gvec: 0x%x, pi_desc_addr: 0x%llx",
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__entry->set ? "enabled and being updated" : "disabled",
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__entry->vcpu_id,
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__entry->gsi,
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__entry->gvec,
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__entry->pi_desc_addr)
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);
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#endif /* _TRACE_KVM_H */
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#undef TRACE_INCLUDE_PATH
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@ -45,6 +45,7 @@
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#include <asm/debugreg.h>
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#include <asm/kexec.h>
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#include <asm/apic.h>
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#include <asm/irq_remapping.h>
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#include "trace.h"
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#include "pmu.h"
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@ -603,6 +604,11 @@ static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
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return container_of(vcpu, struct vcpu_vmx, vcpu);
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}
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static struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu)
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{
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return &(to_vmx(vcpu)->pi_desc);
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}
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#define VMCS12_OFFSET(x) offsetof(struct vmcs12, x)
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#define FIELD(number, name) [number] = VMCS12_OFFSET(name)
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#define FIELD64(number, name) [number] = VMCS12_OFFSET(name), \
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@ -10345,6 +10351,81 @@ static void vmx_enable_log_dirty_pt_masked(struct kvm *kvm,
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kvm_mmu_clear_dirty_pt_masked(kvm, memslot, offset, mask);
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}
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/*
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* vmx_update_pi_irte - set IRTE for Posted-Interrupts
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*
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* @kvm: kvm
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* @host_irq: host irq of the interrupt
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* @guest_irq: gsi of the interrupt
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* @set: set or unset PI
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* returns 0 on success, < 0 on failure
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*/
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static int vmx_update_pi_irte(struct kvm *kvm, unsigned int host_irq,
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uint32_t guest_irq, bool set)
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{
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struct kvm_kernel_irq_routing_entry *e;
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struct kvm_irq_routing_table *irq_rt;
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struct kvm_lapic_irq irq;
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struct kvm_vcpu *vcpu;
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struct vcpu_data vcpu_info;
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int idx, ret = -EINVAL;
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if (!kvm_arch_has_assigned_device(kvm) ||
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!irq_remapping_cap(IRQ_POSTING_CAP))
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return 0;
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idx = srcu_read_lock(&kvm->irq_srcu);
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irq_rt = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
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BUG_ON(guest_irq >= irq_rt->nr_rt_entries);
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hlist_for_each_entry(e, &irq_rt->map[guest_irq], link) {
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if (e->type != KVM_IRQ_ROUTING_MSI)
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continue;
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/*
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* VT-d PI cannot support posting multicast/broadcast
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* interrupts to a vCPU, we still use interrupt remapping
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* for these kind of interrupts.
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*
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* For lowest-priority interrupts, we only support
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* those with single CPU as the destination, e.g. user
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* configures the interrupts via /proc/irq or uses
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* irqbalance to make the interrupts single-CPU.
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*
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* We will support full lowest-priority interrupt later.
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*/
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kvm_set_msi_irq(e, &irq);
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if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu))
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continue;
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vcpu_info.pi_desc_addr = __pa(vcpu_to_pi_desc(vcpu));
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vcpu_info.vector = irq.vector;
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trace_kvm_pi_irte_update(vcpu->vcpu_id, e->gsi,
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vcpu_info.vector, vcpu_info.pi_desc_addr, set);
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if (set)
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ret = irq_set_vcpu_affinity(host_irq, &vcpu_info);
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else {
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/* suppress notification event before unposting */
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pi_set_sn(vcpu_to_pi_desc(vcpu));
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ret = irq_set_vcpu_affinity(host_irq, NULL);
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pi_clear_sn(vcpu_to_pi_desc(vcpu));
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}
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if (ret < 0) {
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printk(KERN_INFO "%s: failed to update PI IRTE\n",
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__func__);
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goto out;
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}
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}
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ret = 0;
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out:
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srcu_read_unlock(&kvm->irq_srcu, idx);
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return ret;
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}
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static struct kvm_x86_ops vmx_x86_ops = {
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.cpu_has_kvm_support = cpu_has_kvm_support,
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.disabled_by_bios = vmx_disabled_by_bios,
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@ -10462,6 +10543,8 @@ static struct kvm_x86_ops vmx_x86_ops = {
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.enable_log_dirty_pt_masked = vmx_enable_log_dirty_pt_masked,
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.pmu_ops = &intel_pmu_ops,
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.update_pi_irte = vmx_update_pi_irte,
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};
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static int __init vmx_init(void)
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@ -64,6 +64,7 @@
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#include <asm/fpu/internal.h> /* Ugh! */
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#include <asm/pvclock.h>
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#include <asm/div64.h>
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#include <asm/irq_remapping.h>
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#define MAX_IO_MSRS 256
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#define KVM_MAX_MCE_BANKS 32
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@ -8094,3 +8095,4 @@ EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
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