davinci: enable easy top down traversal of clock tree

Achieve easy top down traversal of clock tree by keeping
track of each clock's list of children.

This is useful in supporting DVFS where clock rates of
all children need to be updated in an efficient manner.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Sekhar Nori 2009-08-31 15:48:01 +05:30 committed by Kevin Hilman
parent cd87444802
commit f02bf3b396
2 changed files with 9 additions and 3 deletions

View file

@ -123,8 +123,12 @@ int clk_register(struct clk *clk)
clk->name, clk->parent->name)) clk->name, clk->parent->name))
return -EINVAL; return -EINVAL;
INIT_LIST_HEAD(&clk->children);
mutex_lock(&clocks_mutex); mutex_lock(&clocks_mutex);
list_add_tail(&clk->node, &clocks); list_add_tail(&clk->node, &clocks);
if (clk->parent)
list_add_tail(&clk->childnode, &clk->parent->children);
mutex_unlock(&clocks_mutex); mutex_unlock(&clocks_mutex);
/* If rate is already set, use it */ /* If rate is already set, use it */
@ -146,6 +150,7 @@ void clk_unregister(struct clk *clk)
mutex_lock(&clocks_mutex); mutex_lock(&clocks_mutex);
list_del(&clk->node); list_del(&clk->node);
list_del(&clk->childnode);
mutex_unlock(&clocks_mutex); mutex_unlock(&clocks_mutex);
} }
EXPORT_SYMBOL(clk_unregister); EXPORT_SYMBOL(clk_unregister);
@ -352,9 +357,8 @@ dump_clock(struct seq_file *s, unsigned nest, struct clk *parent)
/* REVISIT show device associations too */ /* REVISIT show device associations too */
/* cost is now small, but not linear... */ /* cost is now small, but not linear... */
list_for_each_entry(clk, &clocks, node) { list_for_each_entry(clk, &parent->children, childnode) {
if (clk->parent == parent) dump_clock(s, nest + NEST_DELTA, clk);
dump_clock(s, nest + NEST_DELTA, clk);
} }
} }

View file

@ -69,6 +69,8 @@ struct clk {
u8 lpsc; u8 lpsc;
u8 psc_ctlr; u8 psc_ctlr;
struct clk *parent; struct clk *parent;
struct list_head children; /* list of children */
struct list_head childnode; /* parent's child list node */
struct pll_data *pll_data; struct pll_data *pll_data;
u32 div_reg; u32 div_reg;
}; };