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Revert "drm/amd/display: disable SubVP + DRR to prevent underflow" 

[ Upstream commit f38129bb08 ]

This reverts commit 80c6d6804f.
The orignal commit was intended as a workaround to prevent underflow and
flickering when using one normal monitor and the other high refresh rate
monitor (> 120Hz).

This patch is being reverted in favour of a software solution to enable
SubVP+DRR

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Aurabindo Pillai 2023-03-21 10:25:04 -04:00 committed by Greg Kroah-Hartman
parent 8d8c96efce
commit f15682b9d3
3 changed files with 0 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
View File

@ -1653,11 +1653,6 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
if (amdgpu_dc_feature_mask & DC_DISABLE_LTTPR_DP2_0)
init_data.flags.allow_lttpr_non_transparent_mode.bits.DP2_0 = true;
/* Disable SubVP + DRR config by default */
init_data.flags.disable_subvp_drr = true;
if (amdgpu_dc_feature_mask & DC_ENABLE_SUBVP_DRR)
init_data.flags.disable_subvp_drr = false;
init_data.flags.seamless_boot_edp_requested = false;
if (check_seamless_boot_capability(adev)) {

4
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
View File

@ -880,10 +880,6 @@ static bool subvp_drr_schedulable(struct dc *dc, struct dc_state *context, struc
int16_t stretched_drr_us = 0;
int16_t drr_stretched_vblank_us = 0;
int16_t max_vblank_mallregion = 0;
const struct dc_config *config = &dc->config;
if (config->disable_subvp_drr)
return false;
// Find SubVP pipe
for (i = 0; i < dc->res_pool->pipe_count; i++) {

1
drivers/gpu/drm/amd/include/amd_shared.h
View File

@ -240,7 +240,6 @@ enum DC_FEATURE_MASK {
DC_DISABLE_LTTPR_DP2_0 = (1 << 6), //0x40, disabled by default
DC_PSR_ALLOW_SMU_OPT = (1 << 7), //0x80, disabled by default
DC_PSR_ALLOW_MULTI_DISP_OPT = (1 << 8), //0x100, disabled by default
DC_ENABLE_SUBVP_DRR = (1 << 9), // 0x200, disabled by default
};
enum DC_DEBUG_MASK {