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synced 2024-09-06 10:57:46 +00:00
pinctrl/nomadik: make independent of prcmu driver
Currently there are some unnecessary criss-cross dependencies between the PRCMU driver in MFD and a lot of other drivers, mainly because other drivers need to poke around in the PRCM register range. In cases like this there are actually just a few select registers that the pinctrl driver need to read/modify/write, and it turns out that no other driver is actually using these registers, so there are no concurrency issues whatsoever. So: don't let the location of the register range complicate things, just poke into these registers directly and skip a layer of indirection. Take this opportunity to add kerneldoc to the pinctrl state container. Cc: Loic Pallardy <loic.pallardy@st.com> Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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parent
f48283367f
commit
f1671bf5f0
1 changed files with 39 additions and 20 deletions
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@ -30,20 +30,6 @@
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#include <linux/pinctrl/pinconf.h>
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/* Since we request GPIOs from ourself */
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#include <linux/pinctrl/consumer.h>
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/*
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* For the U8500 archs, use the PRCMU register interface, for the older
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* Nomadik, provide some stubs. The functions using these will only be
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* called on the U8500 series.
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*/
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#ifdef CONFIG_ARCH_U8500
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#include <linux/mfd/dbx500-prcmu.h>
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#else
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static inline u32 prcmu_read(unsigned int reg) {
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return 0;
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}
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static inline void prcmu_write(unsigned int reg, u32 value) {}
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static inline void prcmu_write_masked(unsigned int reg, u32 mask, u32 value) {}
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#endif
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#include <linux/platform_data/pinctrl-nomadik.h>
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#include <asm/mach/irq.h>
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@ -82,10 +68,18 @@ struct nmk_gpio_chip {
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u32 lowemi;
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};
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/**
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* struct nmk_pinctrl - state container for the Nomadik pin controller
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* @dev: containing device pointer
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* @pctl: corresponding pin controller device
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* @soc: SoC data for this specific chip
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* @prcm_base: PRCM register range virtual base
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*/
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struct nmk_pinctrl {
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struct device *dev;
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struct pinctrl_dev *pctl;
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const struct nmk_pinctrl_soc_data *soc;
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void __iomem *prcm_base;
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};
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static struct nmk_gpio_chip *
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@ -247,6 +241,15 @@ nmk_gpio_disable_lazy_irq(struct nmk_gpio_chip *nmk_chip, unsigned offset)
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dev_dbg(nmk_chip->chip.dev, "%d: clearing interrupt mask\n", gpio);
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}
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static void nmk_write_masked(void __iomem *reg, u32 mask, u32 value)
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{
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u32 val;
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val = readl(reg);
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val = ((val & ~mask) | (value & mask));
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writel(val, reg);
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}
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static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct,
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unsigned offset, unsigned alt_num)
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{
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@ -285,8 +288,8 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct,
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if (pin_desc->altcx[i].used == true) {
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reg = gpiocr_regs[pin_desc->altcx[i].reg_index];
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bit = pin_desc->altcx[i].control_bit;
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if (prcmu_read(reg) & BIT(bit)) {
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prcmu_write_masked(reg, BIT(bit), 0);
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if (readl(npct->prcm_base + reg) & BIT(bit)) {
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nmk_write_masked(npct->prcm_base + reg, BIT(bit), 0);
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dev_dbg(npct->dev,
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"PRCM GPIOCR: pin %i: alternate-C%i has been disabled\n",
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offset, i+1);
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@ -314,8 +317,8 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct,
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if (pin_desc->altcx[i].used == true) {
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reg = gpiocr_regs[pin_desc->altcx[i].reg_index];
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bit = pin_desc->altcx[i].control_bit;
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if (prcmu_read(reg) & BIT(bit)) {
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prcmu_write_masked(reg, BIT(bit), 0);
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if (readl(npct->prcm_base + reg) & BIT(bit)) {
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nmk_write_masked(npct->prcm_base + reg, BIT(bit), 0);
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dev_dbg(npct->dev,
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"PRCM GPIOCR: pin %i: alternate-C%i has been disabled\n",
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offset, i+1);
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@ -327,7 +330,7 @@ static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct,
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bit = pin_desc->altcx[alt_index].control_bit;
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dev_dbg(npct->dev, "PRCM GPIOCR: pin %i: alternate-C%i has been selected\n",
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offset, alt_index+1);
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prcmu_write_masked(reg, BIT(bit), BIT(bit));
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nmk_write_masked(npct->prcm_base + reg, BIT(bit), BIT(bit));
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}
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static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
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@ -693,7 +696,7 @@ static int nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpio)
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if (pin_desc->altcx[i].used == true) {
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reg = gpiocr_regs[pin_desc->altcx[i].reg_index];
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bit = pin_desc->altcx[i].control_bit;
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if (prcmu_read(reg) & BIT(bit))
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if (readl(npct->prcm_base + reg) & BIT(bit))
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return NMK_GPIO_ALT_C+i+1;
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}
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}
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@ -1851,6 +1854,7 @@ static int __devinit nmk_pinctrl_probe(struct platform_device *pdev)
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const struct platform_device_id *platid = platform_get_device_id(pdev);
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struct device_node *np = pdev->dev.of_node;
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struct nmk_pinctrl *npct;
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struct resource *res;
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unsigned int version = 0;
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int i;
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@ -1872,6 +1876,20 @@ static int __devinit nmk_pinctrl_probe(struct platform_device *pdev)
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if (version == PINCTRL_NMK_DB8540)
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nmk_pinctrl_db8540_init(&npct->soc);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res) {
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npct->prcm_base = devm_ioremap(&pdev->dev, res->start,
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resource_size(res));
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if (!npct->prcm_base) {
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dev_err(&pdev->dev,
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"failed to ioremap PRCM registers\n");
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return -ENOMEM;
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}
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} else {
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dev_info(&pdev->dev,
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"No PRCM base, assume no ALT-Cx control is available\n");
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}
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/*
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* We need all the GPIO drivers to probe FIRST, or we will not be able
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* to obtain references to the struct gpio_chip * for them, and we
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@ -1888,6 +1906,7 @@ static int __devinit nmk_pinctrl_probe(struct platform_device *pdev)
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nmk_pinctrl_desc.pins = npct->soc->pins;
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nmk_pinctrl_desc.npins = npct->soc->npins;
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npct->dev = &pdev->dev;
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npct->pctl = pinctrl_register(&nmk_pinctrl_desc, &pdev->dev, npct);
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if (!npct->pctl) {
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dev_err(&pdev->dev, "could not register Nomadik pinctrl driver\n");
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