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LoongArch, bpf: Use 4 instructions for function address in JIT
[ Upstream commit64f50f6575
] This patch fixes the following issue of function calls in JIT, like: [ 29.346981] multi-func JIT bug 105 != 103 The issus can be reproduced by running the "inline simple bpf_loop call" verifier test. This is because we are emiting 2-4 instructions for 64-bit immediate moves. During the first pass of JIT, the placeholder address is zero, emiting two instructions for it. In the extra pass, the function address is in XKVRANGE, emiting four instructions for it. This change the instruction index in JIT context. Let's always use 4 instructions for function address in JIT. So that the instruction sequences don't change between the first pass and the extra pass for function calls. Fixes:5dc615520c
("LoongArch: Add BPF JIT support") Signed-off-by: Hengqi Chen <hengqi.chen@gmail.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Tested-by: Tiezhu Yang <yangtiezhu@loongson.cn> Link: https://lore.kernel.org/bpf/20230214152633.2265699-1-hengqi.chen@gmail.com Signed-off-by: Sasha Levin <sashal@kernel.org>
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2 changed files with 22 additions and 1 deletions
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@ -841,7 +841,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
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if (ret < 0)
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return ret;
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move_imm(ctx, t1, func_addr, is32);
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move_addr(ctx, t1, func_addr);
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emit_insn(ctx, jirl, t1, LOONGARCH_GPR_RA, 0);
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move_reg(ctx, regmap[BPF_REG_0], LOONGARCH_GPR_A0);
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break;
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@ -82,6 +82,27 @@ static inline void emit_sext_32(struct jit_ctx *ctx, enum loongarch_gpr reg, boo
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emit_insn(ctx, addiw, reg, reg, 0);
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}
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static inline void move_addr(struct jit_ctx *ctx, enum loongarch_gpr rd, u64 addr)
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{
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u64 imm_11_0, imm_31_12, imm_51_32, imm_63_52;
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/* lu12iw rd, imm_31_12 */
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imm_31_12 = (addr >> 12) & 0xfffff;
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emit_insn(ctx, lu12iw, rd, imm_31_12);
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/* ori rd, rd, imm_11_0 */
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imm_11_0 = addr & 0xfff;
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emit_insn(ctx, ori, rd, rd, imm_11_0);
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/* lu32id rd, imm_51_32 */
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imm_51_32 = (addr >> 32) & 0xfffff;
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emit_insn(ctx, lu32id, rd, imm_51_32);
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/* lu52id rd, rd, imm_63_52 */
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imm_63_52 = (addr >> 52) & 0xfff;
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emit_insn(ctx, lu52id, rd, rd, imm_63_52);
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}
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static inline void move_imm(struct jit_ctx *ctx, enum loongarch_gpr rd, long imm, bool is32)
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{
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long imm_11_0, imm_31_12, imm_51_32, imm_63_52, imm_51_0, imm_51_31;
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