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MIPS: BCM63XX: add and use a clock for PCIe
Add a PCIe clock and use that instead of directly touching the clock control register. While at it, fail if there is no such clock. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Acked-by: Florian Fainelli <florian@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4452 Signed-off-by: John Crispin <blogic@openwrt.org>
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b8ebbaff03
commit
f2d1035e95
2 changed files with 25 additions and 5 deletions
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@ -252,6 +252,19 @@ static struct clk clk_ipsec = {
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.set = ipsec_set,
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.set = ipsec_set,
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};
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};
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/*
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* PCIe clock
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*/
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static void pcie_set(struct clk *clk, int enable)
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{
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bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
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}
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static struct clk clk_pcie = {
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.set = pcie_set,
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};
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/*
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/*
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* Internal peripheral clock
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* Internal peripheral clock
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*/
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*/
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@ -313,6 +326,8 @@ struct clk *clk_get(struct device *dev, const char *id)
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return &clk_pcm;
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return &clk_pcm;
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if (BCMCPU_IS_6368() && !strcmp(id, "ipsec"))
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if (BCMCPU_IS_6368() && !strcmp(id, "ipsec"))
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return &clk_ipsec;
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return &clk_ipsec;
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if (BCMCPU_IS_6328() && !strcmp(id, "pcie"))
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return &clk_pcie;
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return ERR_PTR(-ENOENT);
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return ERR_PTR(-ENOENT);
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}
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}
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@ -11,6 +11,7 @@
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <asm/bootinfo.h>
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#include <asm/bootinfo.h>
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#include "pci-bcm63xx.h"
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#include "pci-bcm63xx.h"
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@ -119,11 +120,6 @@ static void __init bcm63xx_reset_pcie(void)
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{
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{
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u32 val;
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u32 val;
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/* enable clock */
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val = bcm_perf_readl(PERF_CKCTL_REG);
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val |= CKCTL_6328_PCIE_EN;
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bcm_perf_writel(val, PERF_CKCTL_REG);
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/* enable SERDES */
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/* enable SERDES */
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val = bcm_misc_readl(MISC_SERDES_CTRL_REG);
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val = bcm_misc_readl(MISC_SERDES_CTRL_REG);
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val |= SERDES_PCIE_EN | SERDES_PCIE_EXD_EN;
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val |= SERDES_PCIE_EN | SERDES_PCIE_EXD_EN;
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@ -150,10 +146,19 @@ static void __init bcm63xx_reset_pcie(void)
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mdelay(200);
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mdelay(200);
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}
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}
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static struct clk *pcie_clk;
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static int __init bcm63xx_register_pcie(void)
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static int __init bcm63xx_register_pcie(void)
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{
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{
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u32 val;
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u32 val;
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/* enable clock */
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pcie_clk = clk_get(NULL, "pcie");
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if (IS_ERR_OR_NULL(pcie_clk))
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return -ENODEV;
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clk_prepare_enable(pcie_clk);
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bcm63xx_reset_pcie();
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bcm63xx_reset_pcie();
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/* configure the PCIe bridge */
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/* configure the PCIe bridge */
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