mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-06 19:07:52 +00:00
Merge remote-tracking branches 'asoc/fix/dwc', 'asoc/fix/intel', 'asoc/fix/rockchip' and 'asoc/fix/rt5677' into asoc-linus
This commit is contained in:
commit
f2ec1d3b25
8 changed files with 47 additions and 31 deletions
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@ -784,8 +784,8 @@ static unsigned int bst_tlv[] = {
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static int rt5677_dsp_vad_get(struct snd_kcontrol *kcontrol,
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static int rt5677_dsp_vad_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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struct snd_ctl_elem_value *ucontrol)
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{
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{
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struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
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struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
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struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
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struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component);
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ucontrol->value.integer.value[0] = rt5677->dsp_vad_en;
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ucontrol->value.integer.value[0] = rt5677->dsp_vad_en;
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@ -795,8 +795,9 @@ static int rt5677_dsp_vad_get(struct snd_kcontrol *kcontrol,
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static int rt5677_dsp_vad_put(struct snd_kcontrol *kcontrol,
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static int rt5677_dsp_vad_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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struct snd_ctl_elem_value *ucontrol)
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{
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{
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struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
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struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
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struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
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struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component);
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struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
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rt5677->dsp_vad_en = !!ucontrol->value.integer.value[0];
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rt5677->dsp_vad_en = !!ucontrol->value.integer.value[0];
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@ -209,16 +209,9 @@ static int dw_i2s_hw_params(struct snd_pcm_substream *substream,
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switch (config->chan_nr) {
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switch (config->chan_nr) {
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case EIGHT_CHANNEL_SUPPORT:
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case EIGHT_CHANNEL_SUPPORT:
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ch_reg = 3;
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break;
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case SIX_CHANNEL_SUPPORT:
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case SIX_CHANNEL_SUPPORT:
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ch_reg = 2;
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break;
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case FOUR_CHANNEL_SUPPORT:
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case FOUR_CHANNEL_SUPPORT:
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ch_reg = 1;
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break;
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case TWO_CHANNEL_SUPPORT:
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case TWO_CHANNEL_SUPPORT:
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ch_reg = 0;
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break;
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break;
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default:
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default:
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dev_err(dev->dev, "channel not supported\n");
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dev_err(dev->dev, "channel not supported\n");
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@ -227,19 +220,23 @@ static int dw_i2s_hw_params(struct snd_pcm_substream *substream,
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i2s_disable_channels(dev, substream->stream);
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i2s_disable_channels(dev, substream->stream);
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for (ch_reg = 0; ch_reg < (config->chan_nr / 2); ch_reg++) {
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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i2s_write_reg(dev->i2s_base, TCR(ch_reg), xfer_resolution);
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i2s_write_reg(dev->i2s_base, TCR(ch_reg),
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xfer_resolution);
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i2s_write_reg(dev->i2s_base, TFCR(ch_reg), 0x02);
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i2s_write_reg(dev->i2s_base, TFCR(ch_reg), 0x02);
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irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg));
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irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg));
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i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x30);
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i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x30);
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i2s_write_reg(dev->i2s_base, TER(ch_reg), 1);
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i2s_write_reg(dev->i2s_base, TER(ch_reg), 1);
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} else {
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} else {
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i2s_write_reg(dev->i2s_base, RCR(ch_reg), xfer_resolution);
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i2s_write_reg(dev->i2s_base, RCR(ch_reg),
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xfer_resolution);
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i2s_write_reg(dev->i2s_base, RFCR(ch_reg), 0x07);
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i2s_write_reg(dev->i2s_base, RFCR(ch_reg), 0x07);
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irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg));
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irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg));
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i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x03);
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i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x03);
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i2s_write_reg(dev->i2s_base, RER(ch_reg), 1);
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i2s_write_reg(dev->i2s_base, RER(ch_reg), 1);
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}
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}
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}
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i2s_write_reg(dev->i2s_base, CCR, ccr);
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i2s_write_reg(dev->i2s_base, CCR, ccr);
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@ -263,6 +260,19 @@ static void dw_i2s_shutdown(struct snd_pcm_substream *substream,
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snd_soc_dai_set_dma_data(dai, substream, NULL);
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snd_soc_dai_set_dma_data(dai, substream, NULL);
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}
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}
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static int dw_i2s_prepare(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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i2s_write_reg(dev->i2s_base, TXFFR, 1);
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else
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i2s_write_reg(dev->i2s_base, RXFFR, 1);
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return 0;
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}
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static int dw_i2s_trigger(struct snd_pcm_substream *substream,
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static int dw_i2s_trigger(struct snd_pcm_substream *substream,
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int cmd, struct snd_soc_dai *dai)
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int cmd, struct snd_soc_dai *dai)
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{
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{
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@ -294,6 +304,7 @@ static struct snd_soc_dai_ops dw_i2s_dai_ops = {
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.startup = dw_i2s_startup,
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.startup = dw_i2s_startup,
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.shutdown = dw_i2s_shutdown,
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.shutdown = dw_i2s_shutdown,
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.hw_params = dw_i2s_hw_params,
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.hw_params = dw_i2s_hw_params,
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.prepare = dw_i2s_prepare,
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.trigger = dw_i2s_trigger,
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.trigger = dw_i2s_trigger,
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};
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};
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@ -89,7 +89,7 @@ config SND_SOC_INTEL_BROADWELL_MACH
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config SND_SOC_INTEL_BYTCR_RT5640_MACH
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config SND_SOC_INTEL_BYTCR_RT5640_MACH
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tristate "ASoC Audio DSP Support for MID BYT Platform"
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tristate "ASoC Audio DSP Support for MID BYT Platform"
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depends on X86
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depends on X86 && I2C
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select SND_SOC_RT5640
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select SND_SOC_RT5640
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select SND_SST_MFLD_PLATFORM
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select SND_SST_MFLD_PLATFORM
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select SND_SST_IPC_ACPI
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select SND_SST_IPC_ACPI
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@ -101,7 +101,7 @@ config SND_SOC_INTEL_BYTCR_RT5640_MACH
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config SND_SOC_INTEL_CHT_BSW_RT5672_MACH
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config SND_SOC_INTEL_CHT_BSW_RT5672_MACH
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tristate "ASoC Audio driver for Intel Cherrytrail & Braswell with RT5672 codec"
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tristate "ASoC Audio driver for Intel Cherrytrail & Braswell with RT5672 codec"
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depends on X86_INTEL_LPSS
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depends on X86_INTEL_LPSS && I2C
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select SND_SOC_RT5670
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select SND_SOC_RT5670
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select SND_SST_MFLD_PLATFORM
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select SND_SST_MFLD_PLATFORM
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select SND_SST_IPC_ACPI
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select SND_SST_IPC_ACPI
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@ -227,4 +227,4 @@ module_platform_driver(snd_byt_mc_driver);
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MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
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MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
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MODULE_AUTHOR("Subhransu S. Prusty <subhransu.s.prusty@intel.com>");
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MODULE_AUTHOR("Subhransu S. Prusty <subhransu.s.prusty@intel.com>");
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MODULE_LICENSE("GPL v2");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:bytrt5640-audio");
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MODULE_ALIAS("platform:bytt100_rt5640");
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@ -763,8 +763,12 @@ static int block_alloc_fixed(struct sst_dsp *dsp, struct sst_block_allocator *ba
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/* does block span more than 1 section */
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/* does block span more than 1 section */
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if (ba->offset >= block->offset && ba->offset < block_end) {
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if (ba->offset >= block->offset && ba->offset < block_end) {
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/* add block */
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list_move(&block->list, &dsp->used_block_list);
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list_add(&block->module_list, block_list);
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/* align ba to block boundary */
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/* align ba to block boundary */
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ba->offset = block->offset;
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ba->size -= block_end - ba->offset;
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ba->offset = block_end;
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err = block_alloc_contiguous(dsp, ba, block_list);
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err = block_alloc_contiguous(dsp, ba, block_list);
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if (err < 0)
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if (err < 0)
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@ -343,7 +343,7 @@ int sst_acpi_remove(struct platform_device *pdev)
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}
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}
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static struct sst_machines sst_acpi_bytcr[] = {
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static struct sst_machines sst_acpi_bytcr[] = {
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{"10EC5640", "T100", "bytt100_rt5640", NULL, "fw_sst_0f28.bin",
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{"10EC5640", "T100", "bytt100_rt5640", NULL, "intel/fw_sst_0f28.bin",
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&byt_rvp_platform_data },
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&byt_rvp_platform_data },
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{},
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{},
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};
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};
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@ -454,11 +454,11 @@ static int rockchip_i2s_probe(struct platform_device *pdev)
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i2s->playback_dma_data.addr = res->start + I2S_TXDR;
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i2s->playback_dma_data.addr = res->start + I2S_TXDR;
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i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->playback_dma_data.maxburst = 16;
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i2s->playback_dma_data.maxburst = 4;
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i2s->capture_dma_data.addr = res->start + I2S_RXDR;
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i2s->capture_dma_data.addr = res->start + I2S_RXDR;
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i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->capture_dma_data.maxburst = 16;
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i2s->capture_dma_data.maxburst = 4;
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i2s->dev = &pdev->dev;
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i2s->dev = &pdev->dev;
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dev_set_drvdata(&pdev->dev, i2s);
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dev_set_drvdata(&pdev->dev, i2s);
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@ -127,7 +127,7 @@
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#define I2S_DMACR_TDE_DISABLE (0 << I2S_DMACR_TDE_SHIFT)
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#define I2S_DMACR_TDE_DISABLE (0 << I2S_DMACR_TDE_SHIFT)
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#define I2S_DMACR_TDE_ENABLE (1 << I2S_DMACR_TDE_SHIFT)
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#define I2S_DMACR_TDE_ENABLE (1 << I2S_DMACR_TDE_SHIFT)
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#define I2S_DMACR_TDL_SHIFT 0
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#define I2S_DMACR_TDL_SHIFT 0
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#define I2S_DMACR_TDL(x) ((x - 1) << I2S_DMACR_TDL_SHIFT)
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#define I2S_DMACR_TDL(x) ((x) << I2S_DMACR_TDL_SHIFT)
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#define I2S_DMACR_TDL_MASK (0x1f << I2S_DMACR_TDL_SHIFT)
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#define I2S_DMACR_TDL_MASK (0x1f << I2S_DMACR_TDL_SHIFT)
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/*
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/*
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