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KVM: arm64: PMU: Restore the host's PMUSERENR_EL0
[ Upstream commit8681f71759
] Restore the host's PMUSERENR_EL0 value instead of clearing it, before returning back to userspace, as the host's EL0 might have a direct access to PMU registers (some bits of PMUSERENR_EL0 for might not be zero for the host EL0). Fixes:83a7a4d643
("arm64: perf: Enable PMU counter userspace access for perf event") Signed-off-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230603025035.3781797-2-reijiw@google.com Signed-off-by: Sasha Levin <sashal@kernel.org>
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commit
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1 changed files with 11 additions and 2 deletions
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@ -81,7 +81,12 @@ static inline void __activate_traps_common(struct kvm_vcpu *vcpu)
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* EL1 instead of being trapped to EL2.
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*/
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if (kvm_arm_support_pmu_v3()) {
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struct kvm_cpu_context *hctxt;
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write_sysreg(0, pmselr_el0);
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hctxt = &this_cpu_ptr(&kvm_host_data)->host_ctxt;
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ctxt_sys_reg(hctxt, PMUSERENR_EL0) = read_sysreg(pmuserenr_el0);
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write_sysreg(ARMV8_PMU_USERENR_MASK, pmuserenr_el0);
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}
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@ -105,8 +110,12 @@ static inline void __deactivate_traps_common(struct kvm_vcpu *vcpu)
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write_sysreg(vcpu->arch.mdcr_el2_host, mdcr_el2);
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write_sysreg(0, hstr_el2);
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if (kvm_arm_support_pmu_v3())
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write_sysreg(0, pmuserenr_el0);
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if (kvm_arm_support_pmu_v3()) {
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struct kvm_cpu_context *hctxt;
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hctxt = &this_cpu_ptr(&kvm_host_data)->host_ctxt;
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write_sysreg(ctxt_sys_reg(hctxt, PMUSERENR_EL0), pmuserenr_el0);
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}
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if (cpus_have_final_cap(ARM64_SME)) {
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sysreg_clear_set_s(SYS_HFGRTR_EL2, 0,
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