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dt-bindings: spi: cadence-quadspi: document "intel,socfpga-qspi"

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The QSPI controller on Intel's SoCFPGA platform does not implement the
CQSPI_REG_WR_COMPLETION_CTRL register, thus a write to this register
results in a crash.

Introduce the dts compatible "intel,socfpga-qspi" to differentiate the
hardware.

Acked-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v3: revert to "intel,socfpga-qspi"
v2: change binding to "cdns,qspi-nor-0010" to be more generic for other
    platforms
This commit is contained in:
Dinh Nguyen 2021-11-22 09:54:00 -06:00
parent fc74e0a40e
commit f34e8875ae
1 changed files with 1 additions and 0 deletions
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Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
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@ -29,6 +29,7 @@ properties:
- ti,am654-ospi
- intel,lgm-qspi
- xlnx,versal-ospi-1.0
- intel,socfpga-qspi
- const: cdns,qspi-nor
- const: cdns,qspi-nor