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clk: renesas: r8a77980: Add RCLK for watchdog timer
On R-Car V3H, RCLK can be switched between EXTALR and the On-Chip Oscillator using mode pin MD19. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
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cd51e427e0
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1 changed files with 4 additions and 0 deletions
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@ -41,6 +41,7 @@ enum clk_ids {
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CLK_S2,
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CLK_S3,
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CLK_SDSRC,
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CLK_OCO,
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/* Module Clocks */
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MOD_CLK_BASE
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@ -64,6 +65,7 @@ static const struct cpg_core_clk r8a77980_core_clks[] __initconst = {
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DEF_FIXED(".s2", CLK_S2, CLK_PLL1_DIV2, 4, 1),
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DEF_FIXED(".s3", CLK_S3, CLK_PLL1_DIV2, 6, 1),
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DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
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DEF_RATE(".oco", CLK_OCO, 32768),
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/* Core Clock Outputs */
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DEF_FIXED("ztr", R8A77980_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
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@ -98,6 +100,7 @@ static const struct cpg_core_clk r8a77980_core_clks[] __initconst = {
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DEF_DIV6P1("mso", R8A77980_CLK_MSO, CLK_PLL1_DIV4, 0x014),
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DEF_GEN3_OSC("osc", R8A77980_CLK_OSC, CLK_EXTAL, 8),
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DEF_GEN3_MDSEL("r", R8A77980_CLK_R, 29, CLK_EXTALR, 1, CLK_OCO, 1),
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};
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static const struct mssr_mod_clk r8a77980_mod_clks[] __initconst = {
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@ -119,6 +122,7 @@ static const struct mssr_mod_clk r8a77980_mod_clks[] __initconst = {
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DEF_MOD("tpu0", 304, R8A77980_CLK_S3D4),
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DEF_MOD("sdif", 314, R8A77980_CLK_SD0),
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DEF_MOD("pciec0", 319, R8A77980_CLK_S2D2),
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DEF_MOD("rwdt", 402, R8A77980_CLK_R),
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DEF_MOD("intc-ex", 407, R8A77980_CLK_CP),
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DEF_MOD("intc-ap", 408, R8A77980_CLK_S0D3),
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DEF_MOD("hscif3", 517, R8A77980_CLK_S3D1),
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