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net: ipa: fix two inconsistent IPA register names
Rename two suspend IRQ registers so they follow the IPA_REG_IRQ_xxx naming convention used elsewhere. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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parent
6833a09673
commit
f3ae1616c5
2 changed files with 11 additions and 11 deletions
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@ -139,12 +139,12 @@ static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt,
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u32 val;
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/* assert(mask & ipa->available); */
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val = ioread32(ipa->reg_virt + IPA_REG_SUSPEND_IRQ_EN_OFFSET);
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val = ioread32(ipa->reg_virt + IPA_REG_IRQ_SUSPEND_EN_OFFSET);
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if (enable)
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val |= mask;
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else
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val &= ~mask;
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iowrite32(val, ipa->reg_virt + IPA_REG_SUSPEND_IRQ_EN_OFFSET);
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iowrite32(val, ipa->reg_virt + IPA_REG_IRQ_SUSPEND_EN_OFFSET);
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}
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/* Enable TX_SUSPEND for an endpoint */
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@ -168,7 +168,7 @@ void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt)
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u32 val;
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val = ioread32(ipa->reg_virt + IPA_REG_IRQ_SUSPEND_INFO_OFFSET);
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iowrite32(val, ipa->reg_virt + IPA_REG_SUSPEND_IRQ_CLR_OFFSET);
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iowrite32(val, ipa->reg_virt + IPA_REG_IRQ_SUSPEND_CLR_OFFSET);
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}
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/* Simulate arrival of an IPA TX_SUSPEND interrupt */
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@ -454,17 +454,17 @@ static inline u32 rsrc_grp_encoded(enum ipa_version version, u32 rsrc_grp)
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(0x00003030 + 0x1000 * (ee))
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/* ipa->available defines the valid bits in the SUSPEND_INFO register */
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#define IPA_REG_SUSPEND_IRQ_EN_OFFSET \
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IPA_REG_SUSPEND_IRQ_EN_EE_N_OFFSET(GSI_EE_AP)
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#define IPA_REG_SUSPEND_IRQ_EN_EE_N_OFFSET(ee) \
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#define IPA_REG_IRQ_SUSPEND_EN_OFFSET \
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IPA_REG_IRQ_SUSPEND_EN_EE_N_OFFSET(GSI_EE_AP)
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#define IPA_REG_IRQ_SUSPEND_EN_EE_N_OFFSET(ee) \
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(0x00003034 + 0x1000 * (ee))
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/* ipa->available defines the valid bits in the SUSPEND_IRQ_EN register */
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/* ipa->available defines the valid bits in the IRQ_SUSPEND_EN register */
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#define IPA_REG_SUSPEND_IRQ_CLR_OFFSET \
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IPA_REG_SUSPEND_IRQ_CLR_EE_N_OFFSET(GSI_EE_AP)
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#define IPA_REG_SUSPEND_IRQ_CLR_EE_N_OFFSET(ee) \
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#define IPA_REG_IRQ_SUSPEND_CLR_OFFSET \
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IPA_REG_IRQ_SUSPEND_CLR_EE_N_OFFSET(GSI_EE_AP)
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#define IPA_REG_IRQ_SUSPEND_CLR_EE_N_OFFSET(ee) \
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(0x00003038 + 0x1000 * (ee))
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/* ipa->available defines the valid bits in the SUSPEND_IRQ_CLR register */
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/* ipa->available defines the valid bits in the IRQ_SUSPEND_CLR register */
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/** enum ipa_cs_offload_en - checksum offload field in ENDP_INIT_CFG_N */
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enum ipa_cs_offload_en {
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