arm64: dts: allwinner: h616: Add thermal sensor and zones

There are four thermal sensors:
- CPU
- GPU
- VE
- DRAM

Add the thermal sensor configuration and the thermal zones.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20240219153639.179814-8-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
This commit is contained in:
Martin Botka 2024-02-19 15:36:39 +00:00 committed by Jernej Skrabec
parent 6d8d1124d7
commit f4318af405

View file

@ -9,6 +9,7 @@
#include <dt-bindings/clock/sun6i-rtc.h>
#include <dt-bindings/reset/sun50i-h616-ccu.h>
#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&gic>;
@ -151,6 +152,10 @@ sid: efuse@3006000 {
reg = <0x03006000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ths_calibration: thermal-sensor-calibration@14 {
reg = <0x14 0x8>;
};
};
watchdog: watchdog@30090a0 {
@ -576,6 +581,19 @@ spdif: spdif@5093000 {
status = "disabled";
};
ths: thermal-sensor@5070400 {
compatible = "allwinner,sun50i-h616-ths";
reg = <0x05070400 0x400>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_THS>;
clock-names = "bus";
resets = <&ccu RST_BUS_THS>;
nvmem-cells = <&ths_calibration>;
nvmem-cell-names = "calibration";
allwinner,sram = <&syscon>;
#thermal-sensor-cells = <1>;
};
usbotg: usb@5100000 {
compatible = "allwinner,sun50i-h616-musb",
"allwinner,sun8i-h3-musb";
@ -822,4 +840,74 @@ r_rsb: rsb@7083000 {
#size-cells = <0>;
};
};
thermal-zones {
cpu-thermal {
polling-delay-passive = <500>;
polling-delay = <1000>;
thermal-sensors = <&ths 2>;
sustainable-power = <1000>;
trips {
cpu_threshold: cpu-trip-0 {
temperature = <60000>;
type = "passive";
hysteresis = <0>;
};
cpu_target: cpu-trip-1 {
temperature = <70000>;
type = "passive";
hysteresis = <0>;
};
cpu_critical: cpu-trip-2 {
temperature = <110000>;
type = "critical";
hysteresis = <0>;
};
};
};
gpu-thermal {
polling-delay-passive = <500>;
polling-delay = <1000>;
thermal-sensors = <&ths 0>;
sustainable-power = <1100>;
trips {
gpu_temp_critical: gpu-trip-0 {
temperature = <110000>;
type = "critical";
hysteresis = <0>;
};
};
};
ve-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 1>;
trips {
ve_temp_critical: ve-trip-0 {
temperature = <110000>;
type = "critical";
hysteresis = <0>;
};
};
};
ddr-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 3>;
trips {
ddr_temp_critical: ddr-trip-0 {
temperature = <110000>;
type = "critical";
hysteresis = <0>;
};
};
};
};
};