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i2c: piix4: Add EFCH MMIO support to region request and release
commit 7c148722d0
upstream.
EFCH cd6h/cd7h port I/O may no longer be available on later AMD
processors and it is recommended to use MMIO instead. Update the
request and release functions to support MMIO.
MMIO request/release and mmapping require details during cleanup.
Add a MMIO configuration structure containing resource and vaddress
details for mapping the region, accessing the region, and releasing
the region.
Signed-off-by: Terry Bowman <terry.bowman@amd.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
[wsa: rebased after fixup in previous patch]
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Cc: Mario Limonciello <Mario.Limonciello@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
bf5d8b502f
commit
f48190bca4
1 changed files with 58 additions and 8 deletions
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@ -98,6 +98,9 @@
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#define SB800_PIIX4_PORT_IDX_MASK_KERNCZ 0x18
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#define SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ 3
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#define SB800_PIIX4_FCH_PM_ADDR 0xFED80300
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#define SB800_PIIX4_FCH_PM_SIZE 8
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/* insmod parameters */
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/* If force is set to anything different from 0, we forcibly enable the
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@ -156,6 +159,12 @@ static const char *piix4_main_port_names_sb800[PIIX4_MAX_ADAPTERS] = {
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};
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static const char *piix4_aux_port_name_sb800 = " port 1";
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struct sb800_mmio_cfg {
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void __iomem *addr;
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struct resource *res;
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bool use_mmio;
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};
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struct i2c_piix4_adapdata {
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unsigned short smba;
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@ -163,10 +172,40 @@ struct i2c_piix4_adapdata {
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bool sb800_main;
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bool notify_imc;
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u8 port; /* Port number, shifted */
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struct sb800_mmio_cfg mmio_cfg;
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};
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static int piix4_sb800_region_request(struct device *dev)
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static int piix4_sb800_region_request(struct device *dev,
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struct sb800_mmio_cfg *mmio_cfg)
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{
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if (mmio_cfg->use_mmio) {
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struct resource *res;
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void __iomem *addr;
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res = request_mem_region_muxed(SB800_PIIX4_FCH_PM_ADDR,
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SB800_PIIX4_FCH_PM_SIZE,
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"sb800_piix4_smb");
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if (!res) {
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dev_err(dev,
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"SMBus base address memory region 0x%x already in use.\n",
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SB800_PIIX4_FCH_PM_ADDR);
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return -EBUSY;
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}
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addr = ioremap(SB800_PIIX4_FCH_PM_ADDR,
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SB800_PIIX4_FCH_PM_SIZE);
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if (!addr) {
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release_resource(res);
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dev_err(dev, "SMBus base address mapping failed.\n");
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return -ENOMEM;
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}
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mmio_cfg->res = res;
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mmio_cfg->addr = addr;
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return 0;
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}
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if (!request_muxed_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE,
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"sb800_piix4_smb")) {
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dev_err(dev,
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@ -178,8 +217,15 @@ static int piix4_sb800_region_request(struct device *dev)
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return 0;
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}
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static void piix4_sb800_region_release(struct device *dev)
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static void piix4_sb800_region_release(struct device *dev,
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struct sb800_mmio_cfg *mmio_cfg)
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{
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if (mmio_cfg->use_mmio) {
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iounmap(mmio_cfg->addr);
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release_resource(mmio_cfg->res);
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return;
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}
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release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE);
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}
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@ -288,11 +334,13 @@ static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev,
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u8 *smb_en_status,
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unsigned short *piix4_smba)
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{
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struct sb800_mmio_cfg mmio_cfg;
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u8 smba_en_lo;
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u8 smba_en_hi;
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int retval;
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retval = piix4_sb800_region_request(&PIIX4_dev->dev);
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mmio_cfg.use_mmio = 0;
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retval = piix4_sb800_region_request(&PIIX4_dev->dev, &mmio_cfg);
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if (retval)
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return retval;
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@ -301,7 +349,7 @@ static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev,
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outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX);
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smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1);
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piix4_sb800_region_release(&PIIX4_dev->dev);
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piix4_sb800_region_release(&PIIX4_dev->dev, &mmio_cfg);
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if (!smb_en) {
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*smb_en_status = smba_en_lo & 0x10;
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@ -328,6 +376,7 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev,
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unsigned short piix4_smba;
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u8 smb_en, smb_en_status, port_sel;
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u8 i2ccfg, i2ccfg_offset = 0x10;
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struct sb800_mmio_cfg mmio_cfg;
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int retval;
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/* SB800 and later SMBus does not support forcing address */
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@ -407,7 +456,8 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev,
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piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT;
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}
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} else {
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retval = piix4_sb800_region_request(&PIIX4_dev->dev);
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mmio_cfg.use_mmio = 0;
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retval = piix4_sb800_region_request(&PIIX4_dev->dev, &mmio_cfg);
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if (retval) {
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release_region(piix4_smba, SMBIOSIZE);
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return retval;
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@ -420,7 +470,7 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev,
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SB800_PIIX4_PORT_IDX;
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piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK;
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piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT;
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piix4_sb800_region_release(&PIIX4_dev->dev);
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piix4_sb800_region_release(&PIIX4_dev->dev, &mmio_cfg);
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}
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dev_info(&PIIX4_dev->dev,
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@ -731,7 +781,7 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr,
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u8 prev_port;
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int retval;
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retval = piix4_sb800_region_request(&adap->dev);
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retval = piix4_sb800_region_request(&adap->dev, &adapdata->mmio_cfg);
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if (retval)
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return retval;
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@ -802,7 +852,7 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr,
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piix4_imc_wakeup();
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release:
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piix4_sb800_region_release(&adap->dev);
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piix4_sb800_region_release(&adap->dev, &adapdata->mmio_cfg);
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return retval;
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}
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