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regulator: mc13783: consider Power Gates as digital regulators.
GPO regulators are digital outputs that can be enabled or disabled by a dedicated bit in mc13783 POWERMISC register. In this family can be count in also Power Gates (PWGT1 and 2): enabled by a dedicated pin a Power Gate is an hardware driven supply where the output (PWGTnDRV) follow this law: Bit PWGTxSPIEN | Pin PWGTxEN | PWGTxDRV | Read Back 0 = default | | | PWGTxSPIEN ---------------+-------------+----------+------------ 1 | x | Low | 0 0 | 0 | High | 1 0 | 1 | Low | 0 As read back value of control bit reflects the PWGTxDRV state (not the control value previously written) and mc13783 POWERMISC register contain only regulator related bits, a dedicated function to manage these bits is created here with the aim of tracing the real value of PWGTxSPIEN bits and reproduce it on next writes. All POWERMISC users _must_ use the new function to not accidentally disable Power Gates supplies. v2 changes: -Better utilization of abstraction layers. -Voltage query support. GPO's and PWGTxDRV are fixed voltage regulator with voltage value of 3.1V and 5.5V respectively. Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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eda79a3041
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2 changed files with 128 additions and 6 deletions
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@ -82,6 +82,11 @@
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#define MC13783_REG_POWERMISC_GPO2EN (1 << 8)
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#define MC13783_REG_POWERMISC_GPO2EN (1 << 8)
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#define MC13783_REG_POWERMISC_GPO3EN (1 << 10)
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#define MC13783_REG_POWERMISC_GPO3EN (1 << 10)
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#define MC13783_REG_POWERMISC_GPO4EN (1 << 12)
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#define MC13783_REG_POWERMISC_GPO4EN (1 << 12)
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#define MC13783_REG_POWERMISC_PWGT1SPIEN (1 << 15)
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#define MC13783_REG_POWERMISC_PWGT2SPIEN (1 << 16)
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#define MC13783_REG_POWERMISC_PWGTSPI_M (3 << 15)
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struct mc13783_regulator {
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struct mc13783_regulator {
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struct regulator_desc desc;
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struct regulator_desc desc;
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@ -161,8 +166,17 @@ static const int const mc13783_vrf_val[] = {
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1500000, 1875000, 2700000, 2775000,
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1500000, 1875000, 2700000, 2775000,
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};
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};
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static const int const mc13783_gpo_val[] = {
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3100000,
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};
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static const int const mc13783_pwgtdrv_val[] = {
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5500000,
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};
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static struct regulator_ops mc13783_regulator_ops;
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static struct regulator_ops mc13783_regulator_ops;
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static struct regulator_ops mc13783_fixed_regulator_ops;
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static struct regulator_ops mc13783_fixed_regulator_ops;
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static struct regulator_ops mc13783_gpo_regulator_ops;
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#define MC13783_DEFINE(prefix, _name, _reg, _vsel_reg, _voltages) \
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#define MC13783_DEFINE(prefix, _name, _reg, _vsel_reg, _voltages) \
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[MC13783_ ## prefix ## _ ## _name] = { \
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[MC13783_ ## prefix ## _ ## _name] = { \
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@ -197,17 +211,19 @@ static struct regulator_ops mc13783_fixed_regulator_ops;
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.voltages = _voltages, \
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.voltages = _voltages, \
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}
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}
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#define MC13783_GPO_DEFINE(prefix, _name, _reg) \
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#define MC13783_GPO_DEFINE(prefix, _name, _reg, _voltages) \
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[MC13783_ ## prefix ## _ ## _name] = { \
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[MC13783_ ## prefix ## _ ## _name] = { \
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.desc = { \
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.desc = { \
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.name = #prefix "_" #_name, \
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.name = #prefix "_" #_name, \
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.ops = &mc13783_regulator_ops, \
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.n_voltages = ARRAY_SIZE(_voltages), \
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.ops = &mc13783_gpo_regulator_ops, \
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.type = REGULATOR_VOLTAGE, \
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.type = REGULATOR_VOLTAGE, \
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.id = MC13783_ ## prefix ## _ ## _name, \
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.id = MC13783_ ## prefix ## _ ## _name, \
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.owner = THIS_MODULE, \
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.owner = THIS_MODULE, \
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}, \
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}, \
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.reg = MC13783_REG_ ## _reg, \
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.reg = MC13783_REG_ ## _reg, \
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.enable_bit = MC13783_REG_ ## _reg ## _ ## _name ## EN, \
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.enable_bit = MC13783_REG_ ## _reg ## _ ## _name ## EN, \
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.voltages = _voltages, \
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}
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}
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#define MC13783_DEFINE_SW(_name, _reg, _vsel_reg, _voltages) \
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#define MC13783_DEFINE_SW(_name, _reg, _vsel_reg, _voltages) \
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@ -249,14 +265,17 @@ static struct mc13783_regulator mc13783_regulators[] = {
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mc13783_vmmc_val),
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mc13783_vmmc_val),
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MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1, REGULATORSETTING1, \
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MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1, REGULATORSETTING1, \
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mc13783_vmmc_val),
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mc13783_vmmc_val),
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MC13783_GPO_DEFINE(REGU, GPO1, POWERMISC),
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MC13783_GPO_DEFINE(REGU, GPO1, POWERMISC, mc13783_gpo_val),
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MC13783_GPO_DEFINE(REGU, GPO2, POWERMISC),
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MC13783_GPO_DEFINE(REGU, GPO2, POWERMISC, mc13783_gpo_val),
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MC13783_GPO_DEFINE(REGU, GPO3, POWERMISC),
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MC13783_GPO_DEFINE(REGU, GPO3, POWERMISC, mc13783_gpo_val),
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MC13783_GPO_DEFINE(REGU, GPO4, POWERMISC),
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MC13783_GPO_DEFINE(REGU, GPO4, POWERMISC, mc13783_gpo_val),
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MC13783_GPO_DEFINE(REGU, PWGT1SPI, POWERMISC, mc13783_pwgtdrv_val),
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MC13783_GPO_DEFINE(REGU, PWGT2SPI, POWERMISC, mc13783_pwgtdrv_val),
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};
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};
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struct mc13783_regulator_priv {
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struct mc13783_regulator_priv {
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struct mc13783 *mc13783;
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struct mc13783 *mc13783;
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u32 powermisc_pwgt_state;
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struct regulator_dev *regulators[];
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struct regulator_dev *regulators[];
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};
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};
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@ -445,6 +464,107 @@ static struct regulator_ops mc13783_fixed_regulator_ops = {
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.get_voltage = mc13783_fixed_regulator_get_voltage,
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.get_voltage = mc13783_fixed_regulator_get_voltage,
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};
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};
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int mc13783_powermisc_rmw(struct mc13783_regulator_priv *priv, u32 mask,
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u32 val)
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{
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struct mc13783 *mc13783 = priv->mc13783;
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int ret;
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u32 valread;
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BUG_ON(val & ~mask);
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ret = mc13783_reg_read(mc13783, MC13783_REG_POWERMISC, &valread);
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if (ret)
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return ret;
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/* Update the stored state for Power Gates. */
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priv->powermisc_pwgt_state =
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(priv->powermisc_pwgt_state & ~mask) | val;
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priv->powermisc_pwgt_state &= MC13783_REG_POWERMISC_PWGTSPI_M;
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/* Construct the new register value */
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valread = (valread & ~mask) | val;
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/* Overwrite the PWGTxEN with the stored version */
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valread = (valread & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
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priv->powermisc_pwgt_state;
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return mc13783_reg_write(mc13783, MC13783_REG_POWERMISC, valread);
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}
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static int mc13783_gpo_regulator_enable(struct regulator_dev *rdev)
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{
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struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
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int id = rdev_get_id(rdev);
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int ret;
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u32 en_val = mc13783_regulators[id].enable_bit;
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dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
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/* Power Gate enable value is 0 */
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if (id == MC13783_REGU_PWGT1SPI ||
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id == MC13783_REGU_PWGT2SPI)
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en_val = 0;
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mc13783_lock(priv->mc13783);
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ret = mc13783_powermisc_rmw(priv, mc13783_regulators[id].enable_bit,
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en_val);
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mc13783_unlock(priv->mc13783);
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return ret;
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}
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static int mc13783_gpo_regulator_disable(struct regulator_dev *rdev)
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{
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struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
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int id = rdev_get_id(rdev);
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int ret;
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u32 dis_val = 0;
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dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
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/* Power Gate disable value is 1 */
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if (id == MC13783_REGU_PWGT1SPI ||
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id == MC13783_REGU_PWGT2SPI)
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dis_val = mc13783_regulators[id].enable_bit;
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mc13783_lock(priv->mc13783);
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ret = mc13783_powermisc_rmw(priv, mc13783_regulators[id].enable_bit,
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dis_val);
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mc13783_unlock(priv->mc13783);
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return ret;
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}
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static int mc13783_gpo_regulator_is_enabled(struct regulator_dev *rdev)
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{
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struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
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int ret, id = rdev_get_id(rdev);
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unsigned int val;
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mc13783_lock(priv->mc13783);
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ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].reg, &val);
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mc13783_unlock(priv->mc13783);
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if (ret)
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return ret;
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/* Power Gates state is stored in powermisc_pwgt_state
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* where the meaning of bits is negated */
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val = (val & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
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(priv->powermisc_pwgt_state ^ MC13783_REG_POWERMISC_PWGTSPI_M);
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return (val & mc13783_regulators[id].enable_bit) != 0;
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}
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static struct regulator_ops mc13783_gpo_regulator_ops = {
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.enable = mc13783_gpo_regulator_enable,
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.disable = mc13783_gpo_regulator_disable,
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.is_enabled = mc13783_gpo_regulator_is_enabled,
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.list_voltage = mc13783_regulator_list_voltage,
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.set_voltage = mc13783_fixed_regulator_set_voltage,
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.get_voltage = mc13783_fixed_regulator_get_voltage,
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};
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static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
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static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
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{
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{
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struct mc13783_regulator_priv *priv;
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struct mc13783_regulator_priv *priv;
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@ -108,6 +108,8 @@ int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode,
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#define MC13783_REGU_V2 28
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#define MC13783_REGU_V2 28
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#define MC13783_REGU_V3 29
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#define MC13783_REGU_V3 29
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#define MC13783_REGU_V4 30
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#define MC13783_REGU_V4 30
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#define MC13783_REGU_PWGT1SPI 31
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#define MC13783_REGU_PWGT2SPI 32
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#define MC13783_IRQ_ADCDONE 0
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#define MC13783_IRQ_ADCDONE 0
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#define MC13783_IRQ_ADCBISDONE 1
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#define MC13783_IRQ_ADCBISDONE 1
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