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i.MX ARM device tree for 6.5:

Browse source 
- New board support: Marantec Maveo Box.
 - Add HDMI support for TQMa6x/MBa6 board.
 - A series from Andrew Lunn to add phy-mode and fixed links for Ethernet
   devices on imx51, imx6qdl and vf610.
 - A bunch of changes from Fabio Estevam to clean up deprecated and
   invalid properies, fix up node names to remove dt-schema warnings.
 - A series of maintenance updates for Protonic Holland boards, mostly
   on the USB subsystem configuration, thermal zones, and the naming of
   GPIO keys.
 - Update dma-apbh device node name to remove dtbs_check warnings.
 - Remove invalid nodes from fan-controller for a couple of Gateworks
   boards.
 - Small random updates and clean-ups on various boards.
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Merge tag 'imx-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt

i.MX ARM device tree for 6.5:

- New board support: Marantec Maveo Box.
- Add HDMI support for TQMa6x/MBa6 board.
- A series from Andrew Lunn to add phy-mode and fixed links for Ethernet
  devices on imx51, imx6qdl and vf610.
- A bunch of changes from Fabio Estevam to clean up deprecated and
  invalid properies, fix up node names to remove dt-schema warnings.
- A series of maintenance updates for Protonic Holland boards, mostly
  on the USB subsystem configuration, thermal zones, and the naming of
  GPIO keys.
- Update dma-apbh device node name to remove dtbs_check warnings.
- Remove invalid nodes from fan-controller for a couple of Gateworks
  boards.
- Small random updates and clean-ups on various boards.

* tag 'imx-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (53 commits)
  ARM: dts: imx6qdl: vicut1: rename power to power-button
  ARM: dts: imx6dl: prtrvt, prtvt7, prti6q, prtwd2: fix USB related warnings
  ARM: dts: imx6dl: plybas: fix USB over-current detection on USB OTG port
  ARM: dts: imx6ul: prti6g: fix USB over-current detection on USB OTG port
  ARM: dts: imx6qp: prtwd3: Enable USB over current detection on USB OTG port
  ARM: dts: imx6dl: prtmvt: fix different USB related warnings
  ARM: dts: imx6dl: alti6p: fix different USB related warnings
  ARM: dts: imx6dl: vicut1: Address USB related warnings
  ARM: dts: imx6dl: Add trip points to thermal zones on several devices
  ARM: dts: imx6dl: lanmcu: Configure over-current polarity for USB OTG node
  ARM: dts: imx6dl: lanmcu: Disable unused USB PHY nodes
  ARM: dts: imx6q: prtwd2: Correct iomux configuration for ENET MDIO and MDC
  ARM: dts: imx6dl: prtvt7: Remove touchscreen inversion
  ARM: dts: imx6dl: prtvt7: Adjust default backlight brightness to 65
  ARM: dts: imx6qdl: vicut1: The sgtl5000 uses i2s not ac97
  ARM: dts: imx: Use 'eeprom' as node name
  ARM: dts: imx6ul-ccimx6ulsom: Fix the "coin" regulator name
  ARM: dts: imx: Use 'pmic' as node name
  ARM: dts: imx6: Use the mux- prefix
  ARM: dts: imx7d-sdb: Allow UHS modes
  ...

Link: https://lore.kernel.org/r/20230610072530.418847-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-06-20 22:38:10 +02:00
commit f50a4e594d
87 changed files with 899 additions and 143 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
arch/arm/boot/dts/Makefile
View file

@ -751,6 +751,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ull-dhcom-drc02.dtb \
imx6ull-dhcom-pdk2.dtb \
imx6ull-dhcom-picoitx.dtb \
imx6ull-dhcor-maveo-box.dtb \
imx6ull-jozacp.dtb \
imx6ull-kontron-bl.dtb \
imx6ull-myir-mys-6ulx-eval.dtb \

2
arch/arm/boot/dts/imx23.dtsi
View file

@ -59,7 +59,7 @@ icoll: interrupt-controller@80000000 {
reg = <0x80000000 0x2000>;
};
dma_apbh: dma-apbh@80004000 {
dma_apbh: dma-controller@80004000 {
compatible = "fsl,imx23-dma-apbh";
reg = <0x80004000 0x2000>;
interrupts = <0 14 20 0

10
arch/arm/boot/dts/imx28-cfa10049.dts
View file

@ -100,9 +100,9 @@ spi-2 {
pinctrl-names = "default";
pinctrl-0 = <&spi2_pins_cfa10049>;
status = "okay";
gpio-sck = <&gpio2 16 0>;
gpio-mosi = <&gpio2 17 0>;
gpio-miso = <&gpio2 18 0>;
sck-gpios = <&gpio2 16 0>;
mosi-gpios = <&gpio2 17 0>;
miso-gpios = <&gpio2 18 0>;
cs-gpios = <&gpio3 5 0>;
num-chipselects = <1>;
#address-cells = <1>;
@ -124,8 +124,8 @@ spi-3 {
pinctrl-names = "default";
pinctrl-0 = <&spi3_pins_cfa10049>;
status = "okay";
gpio-sck = <&gpio0 24 0>;
gpio-mosi = <&gpio0 28 0>;
sck-gpios = <&gpio0 24 0>;
mosi-gpios = <&gpio0 28 0>;
cs-gpios = <&gpio0 17 0 &gpio0 26 0 &gpio0 27 0>;
num-chipselects = <3>;
#address-cells = <1>;

6
arch/arm/boot/dts/imx28-cfa10055.dts
View file

@ -19,9 +19,9 @@ spi-2 {
pinctrl-names = "default";
pinctrl-0 = <&spi2_pins_cfa10055>;
status = "okay";
gpio-sck = <&gpio2 16 0>;
gpio-mosi = <&gpio2 17 0>;
gpio-miso = <&gpio2 18 0>;
sck-gpios = <&gpio2 16 0>;
mosi-gpios = <&gpio2 17 0>;
miso-gpios = <&gpio2 18 0>;
cs-gpios = <&gpio3 5 0>;
num-chipselects = <1>;
#address-cells = <1>;

6
arch/arm/boot/dts/imx28-cfa10056.dts
View file

@ -18,9 +18,9 @@ spi-2 {
pinctrl-names = "default";
pinctrl-0 = <&spi2_pins_cfa10056>;
status = "okay";
gpio-sck = <&gpio2 16 0>;
gpio-mosi = <&gpio2 17 0>;
gpio-miso = <&gpio2 18 0>;
sck-gpios = <&gpio2 16 0>;
mosi-gpios = <&gpio2 17 0>;
miso-gpios = <&gpio2 18 0>;
cs-gpios = <&gpio3 5 0>;
num-chipselects = <1>;
#address-cells = <1>;

6
arch/arm/boot/dts/imx28-tx28.dts
View file

@ -192,9 +192,9 @@ spi_gpio: spi {
pinctrl-names = "default";
pinctrl-0 = <&tx28_spi_gpio_pins>;
gpio-sck = <&gpio2 24 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio2 25 GPIO_ACTIVE_HIGH>;
gpio-miso = <&gpio2 26 GPIO_ACTIVE_HIGH>;
sck-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
miso-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
num-chipselects = <3>;
cs-gpios = <
&gpio2 27 GPIO_ACTIVE_LOW

2
arch/arm/boot/dts/imx28.dtsi
View file

@ -78,7 +78,7 @@ hsadc: hsadc@80002000 {
status = "disabled";
};
dma_apbh: dma-apbh@80004000 {
dma_apbh: dma-controller@80004000 {
compatible = "fsl,imx28-dma-apbh";
reg = <0x80004000 0x2000>;
interrupts = <82 83 84 85

1
arch/arm/boot/dts/imx35.dtsi
View file

@ -298,7 +298,6 @@ wdog: watchdog@53fdc000 {
compatible = "fsl,imx35-wdt", "fsl,imx21-wdt";
reg = <0x53fdc000 0x4000>;
clocks = <&clks 74>;
clock-names = "";
interrupts = <55>;
};

8
arch/arm/boot/dts/imx51-zii-rdu1.dts
View file

@ -145,9 +145,9 @@ spi_gpio: spi {
pinctrl-0 = <&pinctrl_gpiospi0>;
status = "okay";
gpio-sck = <&gpio4 15 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio4 12 GPIO_ACTIVE_HIGH>;
gpio-miso = <&gpio4 11 GPIO_ACTIVE_HIGH>;
sck-gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
miso-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
num-chipselects = <1>;
cs-gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
@ -181,7 +181,7 @@ ports {
port@0 {
reg = <0>;
label = "cpu";
phy-mode = "rev-mii";
ethernet = <&fec>;
fixed-link {

2
arch/arm/boot/dts/imx51-zii-scu2-mezz.dts
View file

@ -82,7 +82,7 @@ port@3 {
port@4 {
reg = <4>;
label = "cpu";
phy-mode = "rev-mii";
ethernet = <&fec>;
fixed-link {

1
arch/arm/boot/dts/imx51-zii-scu3-esb.dts
View file

@ -267,7 +267,6 @@ fixed-link {
port@6 {
reg = <6>;
label = "cpu";
phy-mode = "mii";
ethernet = <&fec>;

2
arch/arm/boot/dts/imx53-tqma53.dtsi
View file

@ -274,7 +274,7 @@ sensor1: lm75@48 {
reg = <0x48>;
};
eeprom: 24c64@50 {
eeprom: eeprom@50 {
compatible = "atmel,24c64";
pagesize = <32>;
reg = <0x50>;

10
arch/arm/boot/dts/imx6dl-alti6p.dts
View file

@ -361,6 +361,7 @@ &usbh1 {
pinctrl-0 = <&pinctrl_usbh1>;
phy_type = "utmi";
dr_mode = "host";
over-current-active-low;
status = "okay";
};
@ -370,9 +371,18 @@ &usbotg {
pinctrl-0 = <&pinctrl_usbotg>;
phy_type = "utmi";
dr_mode = "host";
over-current-active-low;
status = "okay";
};
&usbphynop1 {
status = "disabled";
};
&usbphynop2 {
status = "disabled";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;

9
arch/arm/boot/dts/imx6dl-lanmcu.dts
View file

@ -257,9 +257,18 @@ &usbotg {
pinctrl-0 = <&pinctrl_usbotg>;
phy_type = "utmi";
dr_mode = "host";
over-current-active-low;
status = "okay";
};
&usbphynop1 {
status = "disabled";
};
&usbphynop2 {
status = "disabled";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;

2
arch/arm/boot/dts/imx6dl-plybas.dts
View file

@ -235,7 +235,7 @@ &usbotg {
pinctrl-0 = <&pinctrl_usbotg>;
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
over-current-active-low;
status = "okay";
};

24
arch/arm/boot/dts/imx6dl-plym2m.dts
View file

@ -113,18 +113,42 @@ chassis-thermal {
polling-delay = <20000>;
polling-delay-passive = <0>;
thermal-sensors = <&tsens0>;
trips {
alert {
temperature = <85000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
};
};
touch-thermal0 {
polling-delay = <20000>;
polling-delay-passive = <0>;
thermal-sensors = <&touch_temp0>;
trips {
alert {
temperature = <85000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
};
};
touch-thermal1 {
polling-delay = <20000>;
polling-delay-passive = <0>;
thermal-sensors = <&touch_temp1>;
trips {
alert {
temperature = <85000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
};
};
};

11
arch/arm/boot/dts/imx6dl-prtmvt.dts
View file

@ -560,6 +560,7 @@ &usbh1 {
pinctrl-names = "default";
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
status = "okay";
};
@ -569,10 +570,18 @@ &usbotg {
pinctrl-0 = <&pinctrl_usbotg>;
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
over-current-active-low;
status = "okay";
};
&usbphynop1 {
status = "disabled";
};
&usbphynop2 {
status = "disabled";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;

4
arch/arm/boot/dts/imx6dl-prtrvt.dts
View file

@ -124,6 +124,10 @@ &usbh1 {
status = "disabled";
};
&usbotg {
disable-over-current;
};
&vpu {
status = "disabled";
};

28
arch/arm/boot/dts/imx6dl-prtvt7.dts
View file

@ -24,7 +24,7 @@ backlight_lcd: backlight-lcd {
compatible = "pwm-backlight";
pwms = <&pwm1 0 500000 0>;
brightness-levels = <0 20 81 248 1000>;
default-brightness-level = <20>;
default-brightness-level = <65>;
num-interpolated-steps = <21>;
power-supply = <&reg_bl_12v0>;
};
@ -246,18 +246,42 @@ chassis-thermal {
polling-delay = <20000>;
polling-delay-passive = <0>;
thermal-sensors = <&tsens0>;
trips {
alert {
temperature = <105000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
};
};
touch-thermal0 {
polling-delay = <20000>;
polling-delay-passive = <0>;
thermal-sensors = <&touch_temp0>;
trips {
alert {
temperature = <105000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
};
};
touch-thermal1 {
polling-delay = <20000>;
polling-delay-passive = <0>;
thermal-sensors = <&touch_temp1>;
trips {
alert {
temperature = <105000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
};
};
};
@ -267,8 +291,6 @@ touchscreen {
<&adc_ts 5>;
io-channel-names = "y", "z1", "z2", "x";
touchscreen-min-pressure = <64687>;
touchscreen-inverted-x;
touchscreen-inverted-y;
touchscreen-x-plate-ohms = <300>;
touchscreen-y-plate-ohms = <800>;
};

4
arch/arm/boot/dts/imx6dl-qmx6.dtsi
View file

@ -48,7 +48,7 @@ &audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
audmux_ssi1 {
mux-ssi1 {
fsl,audmux-port = <MX51_AUDMUX_PORT1_SSI0>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_TFSDIR |
@ -60,7 +60,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT6)
>;
};
audmux_aud6 {
mux-aud6 {
fsl,audmux-port = <MX51_AUDMUX_PORT6>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN

2
arch/arm/boot/dts/imx6dl-riotboard.dts
View file

@ -177,7 +177,7 @@ codec: sgtl5000@a {
VDDIO-supply = <&reg_3p3v>;
};
pmic: pf0100@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;
interrupt-parent = <&gpio5>;

24
arch/arm/boot/dts/imx6dl-victgo.dts
View file

@ -74,18 +74,42 @@ chassis-thermal {
polling-delay = <20000>;
polling-delay-passive = <0>;
thermal-sensors = <&tsens0>;
trips {
alert {
temperature = <105000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
};
};
touch-thermal0 {
polling-delay = <20000>;
polling-delay-passive = <0>;
thermal-sensors = <&touch_temp0>;
trips {
alert {
temperature = <105000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
};
};
touch-thermal1 {
polling-delay = <20000>;
polling-delay-passive = <0>;
thermal-sensors = <&touch_temp1>;
trips {
alert {
temperature = <105000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
};
};
};

4
arch/arm/boot/dts/imx6q-cm-fx6.dts
View file

@ -141,7 +141,7 @@ &audmux {
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
ssi2 {
mux-ssi2 {
fsl,audmux-port = <1>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_RCLKDIR |
@ -152,7 +152,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(3)
>;
};
audmux4 {
mux-audmux4 {
fsl,audmux-port = <3>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_TFSDIR |

6
arch/arm/boot/dts/imx6q-display5.dtsi
View file

@ -147,7 +147,7 @@ &audmux {
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
ssi2 {
mux-ssi2 {
fsl,audmux-port = <1>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
@ -159,7 +159,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(5)
>;
};
aud6 {
mux-aud6 {
fsl,audmux-port = <5>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_RFSEL(8) |
@ -276,7 +276,7 @@ &i2c3 {
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
at24@50 {
eeprom@50 {
compatible = "atmel,24c256";
pagesize = <64>;
reg = <0x50>;

2
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
View file

@ -134,7 +134,7 @@ &pinctrl_stmpe2
&pinctrl_pfuze>;
status = "okay";
pmic: pfuze100@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;
interrupt-parent = <&gpio3>;

2
arch/arm/boot/dts/imx6q-gw5400-a.dts
View file

@ -206,7 +206,7 @@ &i2c2 {
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
pmic: pfuze100@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;

2
arch/arm/boot/dts/imx6q-h100.dts
View file

@ -166,7 +166,7 @@ &i2c1 {
pinctrl-0 = <&pinctrl_h100_i2c1>;
status = "okay";
eeprom: 24c02@51 {
eeprom: eeprom@51 {
compatible = "microchip,24c02", "atmel,24c02";
reg = <0x51>;
};

4
arch/arm/boot/dts/imx6q-kp.dtsi
View file

@ -135,7 +135,7 @@ &audmux {
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
ssi1 {
mux-ssi1 {
fsl,audmux-port = <0>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
@ -147,7 +147,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(2)
>;
};
aud3 {
mux-aud3 {
fsl,audmux-port = <2>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN

2
arch/arm/boot/dts/imx6q-novena.dts
View file

@ -308,7 +308,7 @@ &i2c2 {
pinctrl-0 = <&pinctrl_i2c2_novena>;
status = "okay";
pmic: pfuze100@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;

2
arch/arm/boot/dts/imx6q-pistachio.dts
View file

@ -208,7 +208,7 @@ &i2c2 {
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
pmic: pfuze100@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;

3
arch/arm/boot/dts/imx6q-prtwd2.dts
View file

@ -156,9 +156,6 @@ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0
/* nINTRP */
MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x10030
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x10030
>;
};

8
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
View file

@ -187,7 +187,7 @@ &audmux {
pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
status = "okay";
ssi2 {
mux-ssi2 {
fsl,audmux-port = <1>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_TFSDIR |
@ -199,7 +199,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(4)
>;
};
aud5 {
mux-aud5 {
fsl,audmux-port = <4>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN
@ -349,8 +349,6 @@ channel@26 {
fan-controller@2c {
compatible = "gw,gsc-fan";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2c>;
};
};
@ -400,7 +398,7 @@ &i2c2 {
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
pmic: pfuze100@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;

4
arch/arm/boot/dts/imx6qdl-gw551x.dtsi
View file

@ -171,7 +171,7 @@ &audmux {
pinctrl-0 = <&pinctrl_audmux>; /* AUD5<->tda1997x */
status = "okay";
ssi1 {
mux-ssi1 {
fsl,audmux-port = <0>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_TFSDIR |
@ -183,7 +183,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(4)
>;
};
aud5 {
mux-aud5 {
fsl,audmux-port = <4>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN

7
arch/arm/boot/dts/imx6qdl-gw5904.dtsi
View file

@ -238,8 +238,13 @@ port@3 {
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&fec>;
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};

2
arch/arm/boot/dts/imx6qdl-gw5912.dtsi
View file

@ -243,8 +243,6 @@ channel@23 {
fan-controller@a {
compatible = "gw,gsc-fan";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0a>;
};
};

4
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
View file

@ -147,7 +147,7 @@ sound-spdif {
&audmux {
status = "okay";
ssi1 {
mux-ssi1 {
fsl,audmux-port = <0>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
@ -159,7 +159,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(4)
>;
};
pins5 {
mux-pins5 {
fsl,audmux-port = <4>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN

4
arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
View file

@ -179,7 +179,7 @@ sound_codec: simple-audio-card,codec {
&audmux {
status = "okay";
ssi1 {
mux-ssi1 {
fsl,audmux-port = <0>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
@ -191,7 +191,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(4)
>;
};
pins5 {
mux-pins5 {
fsl,audmux-port = <4>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN

8
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
View file

@ -118,7 +118,7 @@ &audmux {
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
audmux_ssi1 {
mux-ssi1 {
fsl,audmux-port = <MX51_AUDMUX_PORT1_SSI0>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_TFSDIR |
@ -130,7 +130,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT4)
>;
};
audmux_aud4 {
mux-aud4 {
fsl,audmux-port = <MX51_AUDMUX_PORT4>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN
@ -262,7 +262,7 @@ &usdhc3 {
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
vmcc-supply = <&reg_sd3_vmmc>;
vmmc-supply = <&reg_sd3_vmmc>;
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
bus-width = <4>;
no-1-8-v;
@ -274,7 +274,7 @@ &usdhc4 {
pinctrl-0 = <&pinctrl_usdhc4>;
pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
pinctrl-2 = <&pinctrl_usdhc4_200mhz>;
vmcc-supply = <&reg_sd4_vmmc>;
vmmc-supply = <&reg_sd4_vmmc>;
bus-width = <8>;
no-1-8-v;
non-removable;

4
arch/arm/boot/dts/imx6qdl-icore.dtsi
View file

@ -109,7 +109,7 @@ &audmux {
status = "okay";
audmux_ssi1 {
mux-ssi1 {
fsl,audmux-port = <MX51_AUDMUX_PORT1_SSI0>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_TFSDIR |
@ -121,7 +121,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(MX51_AUDMUX_PORT4)
>;
};
audmux_aud4 {
mux-aud4 {
fsl,audmux-port = <MX51_AUDMUX_PORT4>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN

61
arch/arm/boot/dts/imx6qdl-mba6.dtsi
View file

@ -129,7 +129,7 @@ sound {
&audmux {
status = "okay";
ssi0 {
mux-ssi0 {
fsl,audmux-port = <MX31_AUDMUX_PORT1_SSI0>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
@ -141,7 +141,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT3_SSI_PINS_3)
>;
};
aud3 {
mux-aud3 {
fsl,audmux-port = <MX31_AUDMUX_PORT3_SSI_PINS_3>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN
@ -192,6 +192,13 @@ ethphy: ethernet-phy@3 {
};
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi>;
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&i2c1 {
tlv320aic32x4: audio-codec@18 {
compatible = "ti,tlv320aic32x4";
@ -205,6 +212,17 @@ tlv320aic32x4: audio-codec@18 {
};
};
/* DDC */
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2>;
pinctrl-1 = <&pinctrl_i2c2_recovery>;
scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
@ -271,6 +289,22 @@ &uart5 {
&usbh1 {
disable-over-current;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
hub@1 {
compatible = "usb424,2517";
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
ethernet@1 {
compatible = "usb424,9e00";
reg = <1>;
nvmem-cells = <&mba_mac_address>;
nvmem-cell-names = "mac-address";
};
};
};
&usbotg {
@ -395,6 +429,15 @@ MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0xb099 /* LED V16 */
>;
};
pinctrl_hdmi: hdmigrp {
/* NOTE: DDC is done via I2C2, so DON'T
* configure DDC pins for HDMI!
*/
fsl,pins = <
MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
>;
};
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0001b099
@ -431,6 +474,20 @@ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x0001b099
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b899
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b899
>;
};
pinctrl_i2c2_recovery: i2c2recoverygrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b899
MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b899
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <
/* HYS = 1, DSE = 110, 100k up, SPEED = HIGH (11)*/

6
arch/arm/boot/dts/imx6qdl-mba6a.dtsi
View file

@ -21,6 +21,12 @@ m24c64_57: eeprom@57 {
compatible = "atmel,24c64";
reg = <0x57>;
pagesize = <32>;
#address-cells = <1>;
#size-cells = <1>;
mba_mac_address: mac-address@20 {
reg = <0x20 0x6>;
};
};
rtc0: rtc@68 {

6
arch/arm/boot/dts/imx6qdl-mba6b.dtsi
View file

@ -31,6 +31,12 @@ m24c64_57: eeprom@57 {
compatible = "atmel,24c64";
reg = <0x57>;
pagesize = <32>;
#address-cells = <1>;
#size-cells = <1>;
mba_mac_address: mac-address@20 {
reg = <0x20 0x6>;
};
};
rtc0: rtc@68 {

4
arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
View file

@ -75,7 +75,7 @@ dailink_master: simple-audio-card,codec {
&audmux {
status = "okay";
ssi2 {
mux-ssi2 {
fsl,audmux-port = <1>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
@ -87,7 +87,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(4)
>;
};
pins5 {
mux-pins5 {
fsl,audmux-port = <4>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN

11
arch/arm/boot/dts/imx6qdl-prti6q.dtsi
View file

@ -69,6 +69,7 @@ &usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
status = "okay";
};
@ -78,10 +79,18 @@ &usbotg {
pinctrl-0 = <&pinctrl_usbotg>;
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
over-current-active-low;
status = "okay";
};
&usbphynop1 {
status = "disabled";
};
&usbphynop2 {
status = "disabled";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;

2
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
View file

@ -336,7 +336,7 @@ &i2c2 {
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
pmic: pfuze100@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;

2
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
View file

@ -338,7 +338,7 @@ ov5640_to_mipi_csi2: endpoint {
};
};
pmic: pfuze100@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;

4
arch/arm/boot/dts/imx6qdl-tx6.dtsi
View file

@ -216,7 +216,7 @@ codec_dai: simple-audio-card,codec {
&audmux {
status = "okay";
ssi1 {
mux-ssi1 {
fsl,audmux-port = <0>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
@ -228,7 +228,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(4)
>;
};
pins5 {
mux-pins5 {
fsl,audmux-port = <4>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN

4
arch/arm/boot/dts/imx6qdl-var-dart.dtsi
View file

@ -39,7 +39,7 @@ &audmux {
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
ssi2 {
mux-ssi2 {
fsl,audmux-port = <1>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
@ -51,7 +51,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(2)
>;
};
aud3 {
mux-aud3 {
fsl,audmux-port = <2>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN

2
arch/arm/boot/dts/imx6qdl-vicut1-12inch.dtsi
View file

@ -10,7 +10,7 @@ gpio-keys {
pinctrl-0 = <&pinctrl_gpiokeys>;
autorepeat;
power {
power-button {
label = "Power Button";
gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;

19
arch/arm/boot/dts/imx6qdl-vicut1.dtsi
View file

@ -169,6 +169,14 @@ chassis-thermal {
polling-delay = <20000>;
polling-delay-passive = <0>;
thermal-sensors = <&tsens0>;
trips {
alert {
temperature = <105000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
};
};
};
};
@ -393,8 +401,6 @@ &pwm3 {
};
&ssi1 {
#sound-dai-cells = <0>;
fsl,mode = "ac97-slave";
status = "okay";
};
@ -426,6 +432,7 @@ &usbh1 {
pinctrl-names = "default";
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
status = "okay";
};
@ -439,6 +446,14 @@ &usbotg {
status = "okay";
};
&usbphynop1 {
status = "disabled";
};
&usbphynop2 {
status = "disabled";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;

2
arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi
View file

@ -27,7 +27,7 @@ &i2c3 {
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
pmic: pfuze100@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;

10
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi
View file

@ -757,7 +757,7 @@ port@1 {
port@2 {
reg = <2>;
label = "cpu";
phy-mode = "rev-rmii";
ethernet = <&fec>;
fixed-link {
@ -848,7 +848,7 @@ &audmux {
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
ssi1 {
mux-ssi1 {
fsl,audmux-port = <0>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
@ -860,7 +860,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(2)
>;
};
aud3 {
mux-aud3 {
fsl,audmux-port = <2>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN
@ -868,7 +868,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(0)
>;
};
ssi2 {
mux-ssi2 {
fsl,audmux-port = <1>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
@ -880,7 +880,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(4)
>;
};
aud5 {
mux-aud5 {
fsl,audmux-port = <4>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN

2
arch/arm/boot/dts/imx6qdl.dtsi
View file

@ -150,7 +150,7 @@ soc: soc {
interrupt-parent = <&gpc>;
ranges;
dma_apbh: dma-apbh@110000 {
dma_apbh: dma-controller@110000 {
compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
reg = <0x00110000 0x2000>;
interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,

2
arch/arm/boot/dts/imx6qp-prtwd3.dts
View file

@ -350,7 +350,7 @@ &usbotg {
pinctrl-0 = <&pinctrl_usbotg>;
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
over-current-active-low;
status = "okay";
};

2
arch/arm/boot/dts/imx6sl-evk.dts
View file

@ -160,7 +160,7 @@ &i2c1 {
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pmic: pfuze100@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;

75
arch/arm/boot/dts/imx6sll-evk.dts
View file

@ -109,6 +109,14 @@ reg_sd1_vmmc: regulator-sd1-vmmc {
enable-active-high;
};
reg_sd2_vmmc: regulator-sd2-vmmc {
compatible = "regulator-fixed";
regulator-name = "eMMC-VCCQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
};
reg_sd3_vmmc: regulator-sd3-vmmc {
compatible = "regulator-fixed";
pinctrl-names = "default";
@ -343,6 +351,17 @@ &usdhc1 {
status = "okay";
};
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
bus-width = <8>;
non-removable;
vqmmc-supply = <&reg_sd2_vmmc>;
status = "okay";
};
&usbotg1 {
vbus-supply = <&reg_usb_otg1_vbus>;
pinctrl-names = "default";
@ -444,7 +463,7 @@ MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x17059
>;
};
pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
pinctrl_usdhc1_100mhz: usdhc1grp-100mhz {
fsl,pins = <
MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170b9
MX6SLL_PAD_SD1_CLK__SD1_CLK 0x130b9
@ -455,7 +474,7 @@ MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170b9
>;
};
pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
pinctrl_usdhc1_200mhz: usdhc1grp-200mhz {
fsl,pins = <
MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170f9
MX6SLL_PAD_SD1_CLK__SD1_CLK 0x130f9
@ -466,6 +485,54 @@ MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170f9
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6SLL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6SLL_PAD_SD2_CLK__SD2_CLK 0x13059
MX6SLL_PAD_SD2_DATA0__SD2_DATA0 0x17059
MX6SLL_PAD_SD2_DATA1__SD2_DATA1 0x17059
MX6SLL_PAD_SD2_DATA2__SD2_DATA2 0x17059
MX6SLL_PAD_SD2_DATA3__SD2_DATA3 0x17059
MX6SLL_PAD_SD2_DATA4__SD2_DATA4 0x17059
MX6SLL_PAD_SD2_DATA5__SD2_DATA5 0x17059
MX6SLL_PAD_SD2_DATA6__SD2_DATA6 0x17059
MX6SLL_PAD_SD2_DATA7__SD2_DATA7 0x17059
MX6SLL_PAD_GPIO4_IO21__SD2_STROBE 0x13059
>;
};
pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
fsl,pins = <
MX6SLL_PAD_SD2_CMD__SD2_CMD 0x170b9
MX6SLL_PAD_SD2_CLK__SD2_CLK 0x130b9
MX6SLL_PAD_SD2_DATA0__SD2_DATA0 0x170b9
MX6SLL_PAD_SD2_DATA1__SD2_DATA1 0x170b9
MX6SLL_PAD_SD2_DATA2__SD2_DATA2 0x170b9
MX6SLL_PAD_SD2_DATA3__SD2_DATA3 0x170b9
MX6SLL_PAD_SD2_DATA4__SD2_DATA4 0x170b9
MX6SLL_PAD_SD2_DATA5__SD2_DATA5 0x170b9
MX6SLL_PAD_SD2_DATA6__SD2_DATA6 0x170b9
MX6SLL_PAD_SD2_DATA7__SD2_DATA7 0x170b9
MX6SLL_PAD_GPIO4_IO21__SD2_STROBE 0x130b9
>;
};
pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
fsl,pins = <
MX6SLL_PAD_SD2_CMD__SD2_CMD 0x170f9
MX6SLL_PAD_SD2_CLK__SD2_CLK 0x130f9
MX6SLL_PAD_SD2_DATA0__SD2_DATA0 0x170f9
MX6SLL_PAD_SD2_DATA1__SD2_DATA1 0x170f9
MX6SLL_PAD_SD2_DATA2__SD2_DATA2 0x170f9
MX6SLL_PAD_SD2_DATA3__SD2_DATA3 0x170f9
MX6SLL_PAD_SD2_DATA4__SD2_DATA4 0x170f9
MX6SLL_PAD_SD2_DATA5__SD2_DATA5 0x170f9
MX6SLL_PAD_SD2_DATA6__SD2_DATA6 0x170f9
MX6SLL_PAD_SD2_DATA7__SD2_DATA7 0x170f9
MX6SLL_PAD_GPIO4_IO21__SD2_STROBE 0x130f9
>;
};
pinctrl_usbotg1: usbotg1grp {
fsl,pins = <
MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059
@ -484,7 +551,7 @@ MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
>;
};
pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
fsl,pins = <
MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170a1
MX6SLL_PAD_SD3_CLK__SD3_CLK 0x130a1
@ -496,7 +563,7 @@ MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
>;
};
pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
fsl,pins = <
MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170e9
MX6SLL_PAD_SD3_CLK__SD3_CLK 0x130f9

2
arch/arm/boot/dts/imx6sx-sdb-reva.dts
View file

@ -15,7 +15,7 @@ &i2c1 {
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pmic: pfuze100@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;

2
arch/arm/boot/dts/imx6sx-sdb.dts
View file

@ -14,7 +14,7 @@ &i2c1 {
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pmic: pfuze100@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze200";
reg = <0x08>;

2
arch/arm/boot/dts/imx6sx-softing-vining-2000.dts
View file

@ -171,7 +171,7 @@ proximity: sx9500@28 {
reset-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
};
pmic: pfuze100@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze200";
reg = <0x08>;

44
arch/arm/boot/dts/imx6sx.dtsi
View file

@ -209,7 +209,7 @@ gpu: gpu@1800000 {
power-domains = <&pd_pu>;
};
dma_apbh: dma-apbh@1804000 {
dma_apbh: dma-controller@1804000 {
compatible = "fsl,imx6sx-dma-apbh", "fsl,imx28-dma-apbh";
reg = <0x01804000 0x2000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
@ -841,10 +841,40 @@ iomuxc: pinctrl@20e0000 {
reg = <0x020e0000 0x4000>;
};
gpr: iomuxc-gpr@20e4000 {
gpr: syscon@20e4000 {
compatible = "fsl,imx6sx-iomuxc-gpr",
"fsl,imx6q-iomuxc-gpr", "syscon";
"fsl,imx6q-iomuxc-gpr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x020e4000 0x4000>;
lvds_bridge: bridge@18 {
compatible = "fsl,imx6sx-ldb";
reg = <0x18 0x4>;
clocks = <&clks IMX6SX_CLK_LDB_DI0>;
clock-names = "ldb";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ldb_from_lcdif1: endpoint {
remote-endpoint = <&lcdif1_to_ldb>;
};
};
port@1 {
reg = <1>;
ldb_lvds_ch0: endpoint {
};
};
};
};
};
sdma: dma-controller@20ec000 {
@ -1278,6 +1308,14 @@ lcdif1: lcdif@2220000 {
clock-names = "pix", "axi", "disp_axi";
power-domains = <&pd_disp>;
status = "disabled";
ports {
port {
lcdif1_to_ldb: endpoint {
remote-endpoint = <&ldb_from_lcdif1>;
};
};
};
};
lcdif2: lcdif@2224000 {

4
arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
View file

@ -89,8 +89,8 @@ spi-4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi4>;
status = "okay";
gpio-sck = <&gpio5 11 0>;
gpio-mosi = <&gpio5 10 0>;
sck-gpios = <&gpio5 11 0>;
mosi-gpios = <&gpio5 10 0>;
cs-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
#address-cells = <1>;

2
arch/arm/boot/dts/imx6ul-ccimx6ulsom.dtsi
View file

@ -158,7 +158,7 @@ ldo4_ext: vldo4 {
regulator-max-microvolt = <3300000>;
};
vcoin_chg: vcoin {
vcoin_chg: coin {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <3300000>;
};

2
arch/arm/boot/dts/imx6ul-pico.dtsi
View file

@ -131,7 +131,7 @@ &i2c1 {
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pmic: pfuze3000@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze3000";
reg = <0x08>;

1
arch/arm/boot/dts/imx6ul-prti6g.dts
View file

@ -177,6 +177,7 @@ &uart1 {
&usbotg1 {
dr_mode = "host";
over-current-active-low;
status = "okay";
};

6
arch/arm/boot/dts/imx6ul-tx6ul.dtsi
View file

@ -218,9 +218,9 @@ spi_gpio: spi {
compatible = "spi-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi_gpio>;
gpio-mosi = <&gpio1 30 GPIO_ACTIVE_HIGH>;
gpio-miso = <&gpio1 31 GPIO_ACTIVE_HIGH>;
gpio-sck = <&gpio1 28 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
miso-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
sck-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
num-chipselects = <2>;
cs-gpios = <
&gpio1 29 GPIO_ACTIVE_HIGH

14
arch/arm/boot/dts/imx6ul.dtsi
View file

@ -164,7 +164,7 @@ intc: interrupt-controller@a01000 {
<0x00a06000 0x2000>;
};
dma_apbh: dma-apbh@1804000 {
dma_apbh: dma-controller@1804000 {
compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
reg = <0x01804000 0x2000>;
interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
@ -719,6 +719,18 @@ gpc: gpc@20dc000 {
#interrupt-cells = <3>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&intc>;
clocks = <&clks IMX6UL_CLK_IPG>;
clock-names = "ipg";
pgc {
#address-cells = <1>;
#size-cells = <0>;
power-domain@0 {
reg = <0>;
#power-domain-cells = <0>;
};
};
};
iomuxc: pinctrl@20e0000 {

2
arch/arm/boot/dts/imx6ull-dhcom-som.dtsi
View file

@ -7,8 +7,6 @@
/ {
aliases {
/delete-property/ mmc0; /* Avoid double definitions */
/delete-property/ mmc1;
/delete-property/ spi2;
/delete-property/ spi3;
i2c0 = &i2c2;

359
arch/arm/boot/dts/imx6ull-dhcor-maveo-box.dts Normal file
View file

@ -0,0 +1,359 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2023 DH electronics GmbH
* Copyright (C) 2023 Marantec electronics GmbH
*
* DHCOM iMX6ULL variant:
* DHCR-iMX6ULL-C080-R051-SPI-WBT-I-01LG
* DHCOR PCB number: 578-200 or newer
* maveo box PCB number: 525-200 or newer
*/
/dts-v1/;
#include "imx6ull-dhcor-som.dtsi"
/ {
model = "DH electronics i.MX6ULL DHCOR on maveo box";
compatible = "marantec,imx6ull-dhcor-maveo-box", "dh,imx6ull-dhcor-som",
"fsl,imx6ull";
aliases {
mmc2 = &usdhc2;
spi0 = &ecspi4;
spi3 = &ecspi1;
};
chosen {
stdout-path = "serial0:115200n8";
};
reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
compatible = "regulator-fixed";
regulator-max-microvolt = <5000000>;
regulator-min-microvolt = <5000000>;
regulator-name = "usb-otg1-vbus";
};
reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
compatible = "regulator-fixed";
regulator-max-microvolt = <5000000>;
regulator-min-microvolt = <5000000>;
regulator-name = "usb-otg2-vbus";
};
/* WiFi pin WL_REG_ON is connected to GPIO 5.9 */
usdhc1_pwrseq: usdhc1-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
};
};
/* BT pin BT_REG_ON is connected to GPIO 1.18 */
&bluetooth {
shutdown-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
};
/* X10 connector */
&ecspi4 {
cs-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pinctrl_ecspi4>;
pinctrl-names = "default";
status = "okay";
spidev@0 {
compatible = "dh,dhcom-board";
reg = <0>;
spi-cpha;
spi-cpol;
spi-max-frequency = <54000000>;
};
};
&gpio1 {
gpio-line-names =
"", "", "", "",
"", "BUTTON-USER", "", "",
"BUTTON-RESET", "", "", "",
"", "", "", "",
"", "", "BT-REG-ON", "",
"", "", "", "",
"", "", "", "",
"", "", "", "";
};
&gpio2 {
gpio-line-names =
"PSOC-GPIO-1", "", "", "X10-12",
"X10-10", "PSOC-GPIO-2", "PSOC-GPIO-3", "",
"X10-11", "X10-9", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "";
};
&gpio3 {
gpio-line-names =
"DHCOR-HW0", "DHCOR-HW1", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "";
};
&gpio4 {
gpio-line-names =
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "MAVEO-BOX-HW0", "LED-G", "MAVEO-BOX-VAR1",
"MAVEO-BOX-VAR0", "MAVEO-BOX-HW1", "MAVEO-BOX-HW2", "LED-B",
"LED-R", "", "", "",
"", "", "", "";
};
&gpio5 {
gpio-line-names =
"PSOC-SWD-IO", "PSOC-SWD-CLK", "PSOC-RESET", "ZIGBEE-PROG",
"ZIGBEE-RESET", "", "PSOC-PWR-FAIL-OUT", "NFC-ENABLE",
"NFC-IRQ", "WL-REG-ON", "DHCOR-BOOT-M0", "DHCOR-BOOT-M1",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "",
"", "", "", "";
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-0 = <&pinctrl_i2c2>;
pinctrl-1 = <&pinctrl_i2c2_gpio>;
pinctrl-names = "default", "gpio";
scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
};
/* Console UART */
&uart1 {
pinctrl-0 = <&pinctrl_uart1>;
pinctrl-names = "default";
status = "okay";
};
/* BT on LGA */
&uart2 {
pinctrl-0 = <&pinctrl_uart2 &pinctrl_bt_gpio>;
};
/* Zigbee UART */
&uart3 {
pinctrl-0 = <&pinctrl_uart3 &pinctrl_snvs_zigbee_gpio>;
pinctrl-names = "default";
status = "okay";
};
&usbotg1 {
adp-disable;
disable-over-current; /* Overcurrent pin isn't connected */
dr_mode = "otg";
hnp-disable;
pinctrl-0 = <&pinctrl_usbotg1>;
pinctrl-names = "default";
srp-disable;
vbus-supply = <&reg_usb_otg1_vbus>;
status = "okay";
};
&usbotg2 {
disable-over-current; /* Overcurrent pin isn't connected */
dr_mode = "host";
pinctrl-0 = <&pinctrl_usbotg2>;
pinctrl-names = "default";
tpl-support;
vbus-supply = <&reg_usb_otg2_vbus>;
status = "okay";
};
&usbphy1 {
fsl,tx-d-cal = <106>;
};
&usbphy2 {
fsl,tx-d-cal = <106>;
};
/* WiFi on LGA */
&usdhc1 {
mmc-pwrseq = <&usdhc1_pwrseq>;
pinctrl-0 = <&pinctrl_usdhc1_wifi &pinctrl_snvs_wifi_gpio>;
};
/* eMMC */
&usdhc2 {
bus-width = <8>;
no-1-8-v;
non-removable;
pinctrl-0 = <&pinctrl_usdhc2>;
pinctrl-names = "default";
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vcc_3v3>;
status = "okay";
};
&iomuxc {
pinctrl-0 = <&pinctrl_hog_maveo_box>;
pinctrl-names = "default";
pinctrl_hog_maveo_box: hog-maveo-box-grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x120b0 /* BUTTON_USER */
MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x120b0 /* BUTTON_RESET */
MX6UL_PAD_CSI_PIXCLK__GPIO4_IO18 0x400120b0 /* LED_G */
MX6UL_PAD_CSI_DATA02__GPIO4_IO23 0x400120b0 /* LED_B */
MX6UL_PAD_CSI_DATA03__GPIO4_IO24 0x400120b0 /* LED_R */
MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x400120b0 /* X10_9 */
MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x400120b0 /* X10_10 */
MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x400120b0 /* X10_11 */
MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x400120b0 /* X10_12 */
MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00 0x400120b0 /* PSOC_GPIO_1 */
MX6UL_PAD_ENET1_TX_EN__GPIO2_IO05 0x400120b0 /* PSOC_GPIO_2 */
MX6UL_PAD_ENET1_TX_CLK__GPIO2_IO06 0x400120b0 /* PSOC_GPIO_3 */
MX6UL_PAD_CSI_MCLK__GPIO4_IO17 0x120b0 /* MAVEO_BOX_HW0 */
MX6UL_PAD_CSI_DATA00__GPIO4_IO21 0x120b0 /* MAVEO_BOX_HW1 */
MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x120b0 /* MAVEO_BOX_HW2 */
MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x120b0 /* MAVEO_BOX_VAR0 */
MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x120b0 /* MAVEO_BOX_VAR1 */
MX6UL_PAD_LCD_CLK__GPIO3_IO00 0x120b0 /* DHCOR_HW0 */
MX6UL_PAD_LCD_ENABLE__GPIO3_IO01 0x120b0 /* DHCOR_HW1 */
MX6UL_PAD_LCD_DATA00__GPIO3_IO05 0x120b0
MX6UL_PAD_LCD_DATA01__GPIO3_IO06 0x120b0
MX6UL_PAD_LCD_DATA02__GPIO3_IO07 0x120b0
MX6UL_PAD_LCD_DATA03__GPIO3_IO08 0x120b0
MX6UL_PAD_LCD_DATA04__GPIO3_IO09 0x120b0
MX6UL_PAD_LCD_DATA05__GPIO3_IO10 0x120b0
MX6UL_PAD_LCD_DATA06__GPIO3_IO11 0x120b0
MX6UL_PAD_LCD_DATA07__GPIO3_IO12 0x120b0
MX6UL_PAD_LCD_DATA08__GPIO3_IO13 0x120b0
MX6UL_PAD_LCD_DATA09__GPIO3_IO14 0x120b0
MX6UL_PAD_LCD_DATA10__GPIO3_IO15 0x120b0
MX6UL_PAD_LCD_DATA11__GPIO3_IO16 0x120b0
MX6UL_PAD_LCD_DATA12__GPIO3_IO17 0x120b0
MX6UL_PAD_LCD_DATA13__GPIO3_IO18 0x120b0
MX6UL_PAD_LCD_DATA14__GPIO3_IO19 0x120b0
MX6UL_PAD_LCD_DATA15__GPIO3_IO20 0x120b0
MX6UL_PAD_LCD_DATA16__GPIO3_IO21 0x120b0
MX6UL_PAD_LCD_DATA17__GPIO3_IO22 0x120b0
MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x120b0
>;
};
pinctrl_bt_gpio: bt-gpio-grp {
fsl,pins = <
MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x400120b0 /* BT_REG_ON */
>;
};
pinctrl_ecspi4: ecspi4-grp {
fsl,pins = <
MX6UL_PAD_ENET2_TX_CLK__ECSPI4_MISO 0x100b1
MX6UL_PAD_ENET2_TX_EN__ECSPI4_MOSI 0x100b1
MX6UL_PAD_ENET2_TX_DATA1__ECSPI4_SCLK 0x100b1
MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x1b0b0 /* SS0 */
>;
};
pinctrl_i2c2: i2c2-grp {
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
>;
};
pinctrl_i2c2_gpio: i2c2-gpio-grp {
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x4001b8b0
MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x4001b8b0
>;
};
pinctrl_uart1: uart1-grp {
fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
>;
};
pinctrl_uart3: uart3-grp {
fsl,pins = <
MX6UL_PAD_NAND_READY_B__UART3_DCE_TX 0x1b0b1
MX6UL_PAD_NAND_CE0_B__UART3_DCE_RX 0x1b0b1
>;
};
pinctrl_usbotg1: usbotg1-grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059
MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x120b0 /* USB_OTG1_PWR */
>;
};
pinctrl_usbotg2: usbotg2-grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x120b0 /* USB_OTG2_PWR */
>;
};
pinctrl_usdhc2: usdhc2-grp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x17059 /* SD2 Reset */
>;
};
};
&iomuxc_snvs {
pinctrl-0 = <&pinctrl_snvs_hog_maveo_box>;
pinctrl-names = "default";
pinctrl_snvs_hog_maveo_box: snvs-hog-maveo-box-grp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x400120b0 /* PSOC_SWD_IO */
MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x400120b0 /* PSOC_SWD_CLK */
MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x400120b0 /* PSOC_RESET */
MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x400120b0 /* PSOC_PWR_FAIL_OUT */
MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x400120b0 /* NFC_ENABLE */
MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x400120b0 /* NFC_IRQ */
MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x120b0 /* DHCOR_BOOT_M0 */
MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x120b0 /* DHCOR_BOOT_M1 */
>;
};
pinctrl_snvs_wifi_gpio: snvs-wifi-gpio-grp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x400120b0 /* WL_REG_ON */
>;
};
pinctrl_snvs_zigbee_gpio: snvs-zigbee-gpio-grp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x400120b0 /* ZIGBEE_PROG */
MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x400120b0 /* ZIGBEE_RESET */
>;
};
};

5
arch/arm/boot/dts/imx6ull-dhcor-som.dtsi
View file

@ -11,6 +11,11 @@
#include "imx6ull.dtsi"
/ {
aliases {
/delete-property/ mmc0;
/delete-property/ mmc1;
};
memory@80000000 {
/* Appropriate memory size will be filled by U-Boot */
reg = <0x80000000 0>;

1
arch/arm/boot/dts/imx6ull-phytec-tauri.dtsi
View file

@ -260,7 +260,6 @@ &uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
rts-gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>;
rs485-rts-active-high;
linux,rs485-enabled-at-boot-time;
status = "okay";
};

2
arch/arm/boot/dts/imx7d-flex-concentrator.dts
View file

@ -107,7 +107,6 @@ &adc1 {
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
num-chipselects = <1>;
cs-gpios = <&gpio4 23 GPIO_ACTIVE_LOW>;
status = "okay";
@ -122,7 +121,6 @@ pcf2127: rtc@0 {
&ecspi4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi4>;
num-chipselects = <1>;
cs-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
status = "okay";

2
arch/arm/boot/dts/imx7d-nitrogen7.dts
View file

@ -159,7 +159,7 @@ &i2c1 {
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pmic: pfuze3000@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze3000";
reg = <0x08>;

2
arch/arm/boot/dts/imx7d-pico.dtsi
View file

@ -170,7 +170,7 @@ &i2c4 {
pinctrl-0 = <&pinctrl_i2c4>;
status = "okay";
pmic: pfuze3000@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze3000";
reg = <0x08>;

58
arch/arm/boot/dts/imx7d-sdb.dts
View file

@ -43,8 +43,8 @@ spi-4 {
compatible = "spi-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi4>;
gpio-sck = <&gpio1 13 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio1 9 GPIO_ACTIVE_HIGH>;
sck-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
#address-cells = <1>;
@ -60,6 +60,17 @@ extended_io: gpio-expander@0 {
};
};
reg_sd1_vmmc: regulator-sd1-vmmc {
compatible = "regulator-fixed";
regulator-name = "VDD_SD1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
startup-delay-us = <200000>;
off-on-delay-us = <20000>;
};
reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg1_vbus";
@ -264,7 +275,7 @@ &i2c1 {
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pmic: pfuze3000@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze3000";
reg = <0x08>;
@ -473,10 +484,13 @@ &usbotg2 {
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
vmmc-supply = <&reg_sd1_vmmc>;
wakeup-source;
keep-power-in-suspend;
status = "okay";
@ -731,6 +745,15 @@ MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS 0x79
>;
};
pinctrl_usdhc1_gpio: usdhc1_gpiogrp {
fsl,pins = <
MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */
MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */
MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x59 /* VSELECT */
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX7D_PAD_SD1_CMD__SD1_CMD 0x59
@ -739,9 +762,28 @@ MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */
MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */
>;
};
pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
fsl,pins = <
MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
MX7D_PAD_SD1_CLK__SD1_CLK 0x1a
MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
>;
};
pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
fsl,pins = <
MX7D_PAD_SD1_CMD__SD1_CMD 0x5b
MX7D_PAD_SD1_CLK__SD1_CLK 0x1b
MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b
>;
};

14
arch/arm/boot/dts/imx7d-smegw01.dts
View file

@ -13,6 +13,8 @@ / {
compatible = "storopack,imx7d-smegw01", "fsl,imx7d";
aliases {
ethernet0 = &fec1;
ethernet1 = &fec2;
mmc0 = &usdhc1;
mmc1 = &usdhc3;
mmc2 = &usdhc2;
@ -67,7 +69,7 @@ reg_wifi: regulator-wifi {
reg_wlan_rfkill: regulator-wlan-rfkill {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-2 = <&pinctrl_rfkill>;
pinctrl-0 = <&pinctrl_rfkill>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "wlan_rfkill";
@ -97,8 +99,6 @@ &ecspi1 {
sram@0 {
compatible = "microchip,48l640";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <16000000>;
};
};
@ -329,7 +329,7 @@ MX7D_PAD_SAI2_RX_DATA__GPIO6_IO21 0x17059
>;
};
pinctrl_rfkill: rfkillrp {
pinctrl_rfkill: rfkillgrp {
fsl,pins = <
MX7D_PAD_EPDC_DATA11__GPIO2_IO11 0x17059
>;
@ -355,19 +355,19 @@ MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x74
>;
};
pinctrl_usbotg1_lpsr: usbotg1 {
pinctrl_usbotg1_lpsr: usbotg1grp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC 0x04
>;
};
pinctrl_usbotg1_pwr: usbotg1-pwr {
pinctrl_usbotg1_pwr: usbotg1-pwrgrp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO05__USB_OTG1_PWR 0x04
>;
};
pinctrl_usbotg1_pwr_gpio: usbotg1-pwr-gpio {
pinctrl_usbotg1_pwr_gpio: usbotg1-pwr-gpiogrp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x04
>;

2
arch/arm/boot/dts/imx7s-warp.dts
View file

@ -94,7 +94,7 @@ &i2c1 {
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pmic: pfuze3000@8 {
pmic: pmic@8 {
compatible = "fsl,pfuze3000";
reg = <0x08>;

2
arch/arm/boot/dts/imx7s.dtsi
View file

@ -1257,7 +1257,7 @@ fec1: ethernet@30be0000 {
};
};
dma_apbh: dma-apbh@33000000 {
dma_apbh: dma-controller@33000000 {
compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh";
reg = <0x33000000 0x2000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,

2
arch/arm/boot/dts/imx7ulp.dtsi
View file

@ -459,6 +459,8 @@ ocotp: efuse@410a6000 {
compatible = "fsl,imx7ulp-ocotp", "syscon";
reg = <0x410a6000 0x4000>;
clocks = <&scg1 IMX7ULP_CLK_DUMMY>;
#address-cells = <1>;
#size-cells = <1>;
};
};
};

4
arch/arm/boot/dts/mba6ulx.dtsi
View file

@ -235,6 +235,7 @@ expander_out0: gpio-expander@20 {
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
vcc-supply = <&reg_mba6ul_3v3>;
};
expander_in0: gpio-expander@21 {
@ -248,6 +249,7 @@ expander_in0: gpio-expander@21 {
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
vcc-supply = <&reg_mba6ul_3v3>;
enet1_int-hog {
gpio-hog;
@ -267,6 +269,7 @@ expander_out1: gpio-expander@22 {
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
vcc-supply = <&reg_mba6ul_3v3>;
};
analog_touch: touchscreen@41 {
@ -300,6 +303,7 @@ se97b: eeprom@51 {
compatible = "nxp,se97b", "atmel,24c02";
reg = <0x51>;
pagesize = <16>;
vcc-supply = <&reg_mba6ul_3v3>;
};
};

2
arch/arm/boot/dts/vf610-zii-cfu1.dts
View file

@ -202,7 +202,7 @@ port@5 {
port@6 {
reg = <6>;
label = "cpu";
phy-mode = "rmii";
ethernet = <&fec1>;
fixed-link {

8
arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
View file

@ -75,7 +75,7 @@ fixed-link {
port@6 {
reg = <6>;
label = "cpu";
phy-mode = "rmii";
ethernet = <&fec1>;
fixed-link {
@ -294,9 +294,9 @@ spi-0 {
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
gpio-sck = <&gpio1 12 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio1 11 GPIO_ACTIVE_HIGH>;
gpio-miso = <&gpio1 10 GPIO_ACTIVE_HIGH>;
sck-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
miso-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio1 9 GPIO_ACTIVE_LOW
&gpio1 8 GPIO_ACTIVE_HIGH>;
num-chipselects = <2>;

12
arch/arm/boot/dts/vf610-zii-dev-rev-c.dts
View file

@ -44,7 +44,7 @@ ports {
port@0 {
reg = <0>;
label = "cpu";
phy-mode = "rmii";
ethernet = <&fec1>;
fixed-link {
@ -82,6 +82,11 @@ switch0port10: port@10 {
label = "dsa";
phy-mode = "xaui";
link = <&switch1port10>;
fixed-link {
speed = <10000>;
full-duplex;
};
};
};
@ -174,6 +179,11 @@ switch1port10: port@10 {
label = "dsa";
phy-mode = "xaui";
link = <&switch0port10>;
fixed-link {
speed = <10000>;
full-duplex;
};
};
};
mdio {

32
arch/arm/boot/dts/vf610-zii-scu4-aib.dts
View file

@ -59,7 +59,7 @@ ports {
port@0 {
reg = <0>;
label = "cpu";
phy-mode = "rmii";
ethernet = <&fec1>;
fixed-link {
@ -115,6 +115,11 @@ switch0port10: port@10 {
link = <&switch1port10
&switch3port10
&switch2port10>;
fixed-link {
speed = <10000>;
full-duplex;
};
};
};
};
@ -156,6 +161,11 @@ switch1port9: port@9 {
phy-mode = "xgmii";
link = <&switch3port10
&switch2port10>;
fixed-link {
speed = <10000>;
full-duplex;
};
};
switch1port10: port@10 {
@ -163,6 +173,11 @@ switch1port10: port@10 {
label = "dsa";
phy-mode = "xgmii";
link = <&switch0port10>;
fixed-link {
speed = <10000>;
full-duplex;
};
};
};
};
@ -246,6 +261,11 @@ switch2port10: port@10 {
link = <&switch3port9
&switch1port9
&switch0port10>;
fixed-link {
speed = <2500>;
full-duplex;
};
};
};
};
@ -295,6 +315,11 @@ switch3port9: port@9 {
label = "dsa";
phy-mode = "2500base-x";
link = <&switch2port10>;
fixed-link {
speed = <2500>;
full-duplex;
};
};
switch3port10: port@10 {
@ -303,6 +328,11 @@ switch3port10: port@10 {
phy-mode = "xgmii";
link = <&switch1port9
&switch0port10>;
fixed-link {
speed = <10000>;
full-duplex;
};
};
};
};

2
arch/arm/boot/dts/vf610-zii-spb4.dts
View file

@ -140,7 +140,7 @@ ports {
port@0 {
reg = <0>;
label = "cpu";
phy-mode = "rmii";
ethernet = <&fec1>;
fixed-link {

2
arch/arm/boot/dts/vf610-zii-ssmb-dtu.dts
View file

@ -129,7 +129,7 @@ ports {
port@0 {
reg = <0>;
label = "cpu";
phy-mode = "rmii";
ethernet = <&fec1>;
fixed-link {

2
arch/arm/boot/dts/vf610-zii-ssmb-spu3.dts
View file

@ -154,7 +154,7 @@ ports {
port@0 {
reg = <0>;
label = "cpu";
phy-mode = "rmii";
ethernet = <&fec1>;
fixed-link {

1
arch/arm/boot/dts/vfxxx.dtsi
View file

@ -294,7 +294,6 @@ wdoga5: watchdog@4003e000 {
reg = <0x4003e000 0x1000>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_WDT>;
clock-names = "wdog";
status = "disabled";
};