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clk: meson: g12a: fix VPU clock muxes mask

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There are 8 parents, use 0x7

Fixes: 085a4ea93d ("clk: meson: g12a: add peripheral clock controller")
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190319082611.6215-1-mjourdan@baylibre.com
This commit is contained in:
Maxime Jourdan 2019-03-19 09:26:11 +01:00 committed by Neil Armstrong
parent 9b70c697e8
commit f53b9f146f
1 changed files with 2 additions and 2 deletions
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4
drivers/clk/meson/g12a.c
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@ -967,7 +967,7 @@ static const char * const g12a_vpu_parent_names[] = {
static struct clk_regmap g12a_vpu_0_sel = {
.data = &(struct clk_regmap_mux_data){
.offset = HHI_VPU_CLK_CNTL,
.mask = 0x3,
.mask = 0x7,
.shift = 9,
},
.hw.init = &(struct clk_init_data){
@ -1011,7 +1011,7 @@ static struct clk_regmap g12a_vpu_0 = {
static struct clk_regmap g12a_vpu_1_sel = {
.data = &(struct clk_regmap_mux_data){
.offset = HHI_VPU_CLK_CNTL,
.mask = 0x3,
.mask = 0x7,
.shift = 25,
},
.hw.init = &(struct clk_init_data){