Gemini DTS updates for v4.19:
- Add Vitesse switch chips - Add a new DT for a reference design -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJbSoLtAAoJEEEQszewGV1zjT4P/1FmTC1IwCg0omGmBqhdeUyP NNgqdPU3vKxNwA4AiaNXedUUgIm/zP1AO/LwsZp+2/e7i0yi54XRJY4eKcLRUq9O oP0AEG1fIDulKfCJhnh35vSJUpSAKoR2yiWmZCsHfRIiTs73L00cTJebJHtgF7TX gC4og0DAWZ4iL6A4nVqoV7pQf52io1fZntAdu7+y2qxtVZ8lytJAgZM6m+z3R42S cW5PAD9a0VAc1/tQambpHqblgw6lMcDbnrd141L1vG7v037gjr15sFnoYQ+vXWle gQS1b6dbOpFuF/S6+tuitH1YM5yqhQPxR6myoJdmi2J3bY9jtD3uEOuVWHMPt1d7 Dqd+9hjtCK8MQy6BXq8UbFcAPltvp1Qqr59FT9UOqcgkBKpNleBigViRbjt4btzd VBmEOkHBHia/BiyxnSf6QMpVIMziWaGRcL2AUO8hxprZqZT6ls9LIWeCDV+cKUuT SY9tm+NrZ4j1p81CVDVr+jl/mNyfMuFM7gth/4uWDuEhs4Lz1TcxumQHfZ6byYz4 XhpydQKGholUxMJAMihIBdJYWz8s6lm/XiXvYE7Wpexe654xY1uhhEsFXDjrf1Fq avBAizDRb9tZVRtColmZKuxilKq8CgJw3EaLPG7c53bNbmeAq6txl6jFG0aUdCZV 5LqtekLlzAceF9MlaXEY =3RrW -----END PGP SIGNATURE----- Merge tag 'gemini-dts-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt Gemini DTS updates for v4.19: - Add Vitesse switch chips - Add a new DT for a reference design * tag 'gemini-dts-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: Add devicetree for Storlink/Storm SL93512R ARM: dts: Add Vitesse G5e switch to the Gemini SQ201 ARM: dts: Add WAN ethernet port to the SQ201 Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
f54440e41b
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@ -201,6 +201,7 @@ dtb-$(CONFIG_ARCH_GEMINI) += \
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gemini-dlink-dns-313.dtb \
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gemini-nas4220b.dtb \
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gemini-rut1xx.dtb \
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gemini-sl93512r.dtb \
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gemini-sq201.dtb \
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gemini-wbd111.dtb \
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gemini-wbd222.dtb
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@ -0,0 +1,328 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree file for the Storm Semiconductor SL93512R_BRD
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* Gemini reference design, also initially called
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* "Gemini324 EV-Board" before Storm acquired Storlink Semiconductor.
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* The series were later acquired by Cortina Systems.
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*/
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/dts-v1/;
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#include "gemini.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "Storlink Semiconductor Gemini324 EV-Board / Storm Semiconductor SL93512R_BRD";
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compatible = "storlink,gemini324", "storm,sl93512r", "cortina,gemini";
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#address-cells = <1>;
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#size-cells = <1>;
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memory@0 {
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/* 64 MB Samsung K4H511638B */
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device_type = "memory";
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reg = <0x00000000 0x4000000>;
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};
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chosen {
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bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait";
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stdout-path = &uart0;
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};
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gpio_keys {
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compatible = "gpio-keys";
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button-wps {
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debounce-interval = <50>;
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wakeup-source;
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linux,code = <KEY_WPS_BUTTON>;
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label = "WPS";
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/* Conflict with NAND flash */
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gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
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};
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button-setup {
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debounce-interval = <50>;
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wakeup-source;
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linux,code = <KEY_SETUP>;
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label = "factory reset";
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/* Conflict with NAND flash */
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gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led-green-harddisk {
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label = "sq201:green:harddisk";
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/* Conflict with LCD (no problem) */
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gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
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default-state = "off";
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linux,default-trigger = "disk-activity";
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};
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led-green-wireless {
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label = "sq201:green:wireless";
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/* Conflict with NAND flash CE0 (no problem) */
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gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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};
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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/* Uses MDC and MDIO */
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gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
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#address-cells = <1>;
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#size-cells = <0>;
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/* This is a Marvell 88E1111 ethernet transciever */
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phy0: ethernet-phy@1 {
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reg = <1>;
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};
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};
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spi {
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compatible = "spi-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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/* Check pin collisions */
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gpio-sck = <&gpio1 28 GPIO_ACTIVE_HIGH>;
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gpio-miso = <&gpio1 30 GPIO_ACTIVE_HIGH>;
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gpio-mosi = <&gpio1 29 GPIO_ACTIVE_HIGH>;
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cs-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
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num-chipselects = <1>;
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switch@0 {
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compatible = "vitesse,vsc7385";
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reg = <0>;
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/* Specified for 2.5 MHz or below */
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spi-max-frequency = <2500000>;
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gpio-controller;
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#gpio-cells = <2>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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};
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vsc: port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac1>;
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phy-mode = "rgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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soc {
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flash@30000000 {
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status = "okay";
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/* 16MB of flash */
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reg = <0x30000000 0x01000000>;
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partition@0 {
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label = "BOOT";
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reg = <0x00000000 0x00020000>;
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read-only;
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};
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partition@120000 {
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label = "Kern";
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reg = <0x00020000 0x00300000>;
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};
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partition@320000 {
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label = "Ramdisk";
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reg = <0x00320000 0x00600000>;
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};
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partition@920000 {
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label = "Application";
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reg = <0x00920000 0x00600000>;
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};
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partition@f20000 {
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label = "VCTL";
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reg = <0x00f20000 0x00020000>;
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read-only;
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};
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partition@f40000 {
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label = "CurConf";
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reg = <0x00f40000 0x000a0000>;
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read-only;
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};
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partition@fe0000 {
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label = "FIS directory";
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reg = <0x00fe0000 0x00020000>;
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read-only;
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};
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};
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syscon: syscon@40000000 {
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pinctrl {
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/*
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* gpio0egrp cover line 16 used by HD LED
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* gpio0fgrp cover line 17, 18 used by wireless LED and reset button
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* gpio0hgrp cover line 21, 22 used by MDIO for Marvell PHY
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* gpio0kgrp cover line 31 used by USB LED
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*/
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gpio0_default_pins: pinctrl-gpio0 {
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mux {
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function = "gpio0";
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groups = "gpio0egrp",
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"gpio0fgrp",
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"gpio0hgrp";
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};
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};
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/*
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* gpio1dgrp cover lines used by SPI for
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* the Vitesse chip (28-31)
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*/
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gpio1_default_pins: pinctrl-gpio1 {
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mux {
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function = "gpio1";
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groups = "gpio1dgrp";
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};
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};
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pinctrl-gmii {
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mux {
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function = "gmii";
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groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
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};
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/* Control pad skew comes from sl_switch.c in the vendor code */
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conf0 {
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pins = "P10 GMAC1 TXC";
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skew-delay = <5>;
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};
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conf1 {
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pins = "V11 GMAC1 TXEN";
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skew-delay = <7>;
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};
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conf2 {
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pins = "T11 GMAC1 RXC";
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skew-delay = <8>;
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};
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conf3 {
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pins = "U11 GMAC1 RXDV";
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skew-delay = <7>;
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};
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conf4 {
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pins = "V7 GMAC0 TXC";
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skew-delay = <10>;
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};
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conf5 {
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pins = "P8 GMAC0 TXEN";
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skew-delay = <7>; /* 5 at another place? */
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};
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conf6 {
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pins = "T8 GMAC0 RXC";
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skew-delay = <15>;
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};
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conf7 {
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pins = "R8 GMAC0 RXDV";
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skew-delay = <0>;
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};
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conf8 {
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/* The data lines all have default skew */
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pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
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"P9 GMAC0 RXD2", "R9 GMAC0 RXD3",
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"R11 GMAC1 RXD0", "P11 GMAC1 RXD1",
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"V12 GMAC1 RXD2", "U12 GMAC1 RXD3",
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"R10 GMAC1 TXD0", "T10 GMAC1 TXD1",
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"U10 GMAC1 TXD2", "V10 GMAC1 TXD3";
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skew-delay = <7>;
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};
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/* Appears in sl351x_gmac.c in the vendor code */
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conf9 {
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pins = "U7 GMAC0 TXD0", "T7 GMAC0 TXD1",
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"R7 GMAC0 TXD2", "P7 GMAC0 TXD3";
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skew-delay = <5>;
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};
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};
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};
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};
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/* Both interfaces brought out on SATA connectors */
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sata: sata@46000000 {
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cortina,gemini-ata-muxmode = <0>;
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cortina,gemini-enable-sata-bridge;
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status = "okay";
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};
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gpio0: gpio@4d000000 {
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pinctrl-names = "default";
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pinctrl-0 = <&gpio0_default_pins>;
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};
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gpio1: gpio@4e000000 {
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pinctrl-names = "default";
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pinctrl-0 = <&gpio1_default_pins>;
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};
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pci@50000000 {
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status = "okay";
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map =
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<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
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<0x4800 0 0 2 &pci_intc 1>,
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<0x4800 0 0 3 &pci_intc 2>,
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<0x4800 0 0 4 &pci_intc 3>,
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<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
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<0x5000 0 0 2 &pci_intc 2>,
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<0x5000 0 0 3 &pci_intc 3>,
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<0x5000 0 0 4 &pci_intc 0>,
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<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
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<0x5800 0 0 2 &pci_intc 3>,
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<0x5800 0 0 3 &pci_intc 0>,
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<0x5800 0 0 4 &pci_intc 1>,
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<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
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<0x6000 0 0 2 &pci_intc 0>,
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<0x6000 0 0 3 &pci_intc 1>,
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<0x6000 0 0 4 &pci_intc 2>;
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};
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ethernet@60000000 {
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status = "okay";
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ethernet-port@0 {
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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};
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ethernet-port@1 {
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phy-mode = "rgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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};
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};
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};
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ata@63000000 {
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status = "okay";
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};
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ata@63400000 {
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status = "okay";
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};
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};
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};
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@ -55,6 +55,75 @@
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};
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};
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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/* Uses MDC and MDIO */
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gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
|
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<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
|
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#address-cells = <1>;
|
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#size-cells = <0>;
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||||
|
||||
/* This is a Marvell 88E1111 ethernet transciever */
|
||||
phy0: ethernet-phy@1 {
|
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reg = <1>;
|
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};
|
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};
|
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|
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spi {
|
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compatible = "spi-gpio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
/* Check pin collisions */
|
||||
gpio-sck = <&gpio1 28 GPIO_ACTIVE_HIGH>;
|
||||
gpio-miso = <&gpio1 30 GPIO_ACTIVE_HIGH>;
|
||||
gpio-mosi = <&gpio1 29 GPIO_ACTIVE_HIGH>;
|
||||
cs-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
|
||||
num-chipselects = <1>;
|
||||
|
||||
switch@0 {
|
||||
compatible = "vitesse,vsc7395";
|
||||
reg = <0>;
|
||||
/* Specified for 2.5 MHz or below */
|
||||
spi-max-frequency = <2500000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
};
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
};
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
};
|
||||
vsc: port@6 {
|
||||
reg = <6>;
|
||||
label = "cpu";
|
||||
ethernet = <&gmac1>;
|
||||
phy-mode = "rgmii";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
soc {
|
||||
flash@30000000 {
|
||||
/*
|
||||
|
|
@ -108,6 +177,7 @@
|
|||
/*
|
||||
* gpio0fgrp cover line 18 used by reset button
|
||||
* gpio0ggrp cover line 20 used by info LED
|
||||
* gpio0hgrp cover line 21, 22 used by MDIO for Marvell PHY
|
||||
* gpio0kgrp cover line 31 used by USB LED
|
||||
*/
|
||||
gpio0_default_pins: pinctrl-gpio0 {
|
||||
|
|
@ -115,9 +185,76 @@
|
|||
function = "gpio0";
|
||||
groups = "gpio0fgrp",
|
||||
"gpio0ggrp",
|
||||
"gpio0hgrp",
|
||||
"gpio0kgrp";
|
||||
};
|
||||
};
|
||||
/*
|
||||
* gpio0dgrp cover lines used by the SPI
|
||||
* to the Vitesse G5x chip.
|
||||
*/
|
||||
gpio1_default_pins: pinctrl-gpio1 {
|
||||
mux {
|
||||
function = "gpio1";
|
||||
groups = "gpio1dgrp";
|
||||
};
|
||||
};
|
||||
pinctrl-gmii {
|
||||
mux {
|
||||
function = "gmii";
|
||||
groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
|
||||
};
|
||||
/* Settings come from memory dump in PLATO */
|
||||
conf0 {
|
||||
pins = "V8 GMAC0 RXDV";
|
||||
skew-delay = <0>;
|
||||
};
|
||||
conf1 {
|
||||
pins = "Y7 GMAC0 RXC";
|
||||
skew-delay = <15>;
|
||||
};
|
||||
conf2 {
|
||||
pins = "T8 GMAC0 TXEN";
|
||||
skew-delay = <7>;
|
||||
};
|
||||
conf3 {
|
||||
pins = "U8 GMAC0 TXC";
|
||||
skew-delay = <10>;
|
||||
};
|
||||
conf4 {
|
||||
pins = "T10 GMAC1 RXDV";
|
||||
skew-delay = <7>;
|
||||
};
|
||||
conf5 {
|
||||
pins = "Y11 GMAC1 RXC";
|
||||
skew-delay = <8>;
|
||||
};
|
||||
conf6 {
|
||||
pins = "W11 GMAC1 TXEN";
|
||||
skew-delay = <7>;
|
||||
};
|
||||
conf7 {
|
||||
pins = "V11 GMAC1 TXC";
|
||||
skew-delay = <5>;
|
||||
};
|
||||
conf8 {
|
||||
/* The data lines all have default skew */
|
||||
pins = "W8 GMAC0 RXD0", "V9 GMAC0 RXD1",
|
||||
"Y8 GMAC0 RXD2", "U9 GMAC0 RXD3",
|
||||
"T7 GMAC0 TXD0", "U6 GMAC0 TXD1",
|
||||
"V7 GMAC0 TXD2", "U7 GMAC0 TXD3",
|
||||
"Y12 GMAC1 RXD0", "V12 GMAC1 RXD1",
|
||||
"T11 GMAC1 RXD2", "W12 GMAC1 RXD3",
|
||||
"U10 GMAC1 TXD0", "Y10 GMAC1 TXD1",
|
||||
"W10 GMAC1 TXD2", "T9 GMAC1 TXD3";
|
||||
skew-delay = <7>;
|
||||
};
|
||||
/* Set up drive strength on GMAC0 and GMAC1 to 16 mA */
|
||||
conf9 {
|
||||
groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
|
||||
drive-strength = <16>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -132,6 +269,11 @@
|
|||
pinctrl-0 = <&gpio0_default_pins>;
|
||||
};
|
||||
|
||||
gpio1: gpio@4e000000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio1_default_pins>;
|
||||
};
|
||||
|
||||
pci@50000000 {
|
||||
status = "okay";
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
|
|
@ -154,6 +296,23 @@
|
|||
<0x6000 0 0 4 &pci_intc 2>;
|
||||
};
|
||||
|
||||
ethernet@60000000 {
|
||||
status = "okay";
|
||||
|
||||
ethernet-port@0 {
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <&phy0>;
|
||||
};
|
||||
ethernet-port@1 {
|
||||
phy-mode = "rgmii";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
pause;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ata@63000000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue