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MIPS: BCM63XX: Change irq code to prepare for per-cpu peculiarity.
No functionnal change is introduced by this patch. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2894/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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2 changed files with 85 additions and 11 deletions
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@ -19,19 +19,86 @@
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#include <bcm63xx_io.h>
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#include <bcm63xx_io.h>
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#include <bcm63xx_irq.h>
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#include <bcm63xx_irq.h>
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static void __dispatch_internal(void) __maybe_unused;
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#ifndef BCMCPU_RUNTIME_DETECT
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#ifdef CONFIG_BCM63XX_CPU_6338
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#define irq_stat_reg PERF_IRQSTAT_6338_REG
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#define irq_mask_reg PERF_IRQMASK_6338_REG
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#endif
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#ifdef CONFIG_BCM63XX_CPU_6345
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#define irq_stat_reg PERF_IRQSTAT_6345_REG
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#define irq_mask_reg PERF_IRQMASK_6345_REG
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#endif
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#ifdef CONFIG_BCM63XX_CPU_6348
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#define irq_stat_reg PERF_IRQSTAT_6348_REG
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#define irq_mask_reg PERF_IRQMASK_6348_REG
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#endif
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#ifdef CONFIG_BCM63XX_CPU_6358
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#define irq_stat_reg PERF_IRQSTAT_6358_REG
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#define irq_mask_reg PERF_IRQMASK_6358_REG
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#endif
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#define dispatch_internal __dispatch_internal
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#define irq_stat_addr (bcm63xx_regset_address(RSET_PERF) + irq_stat_reg)
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#define irq_mask_addr (bcm63xx_regset_address(RSET_PERF) + irq_mask_reg)
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static inline void bcm63xx_init_irq(void)
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{
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}
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#else /* ! BCMCPU_RUNTIME_DETECT */
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static u32 irq_stat_addr, irq_mask_addr;
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static void (*dispatch_internal)(void);
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static void bcm63xx_init_irq(void)
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{
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irq_stat_addr = bcm63xx_regset_address(RSET_PERF);
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irq_mask_addr = bcm63xx_regset_address(RSET_PERF);
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switch (bcm63xx_get_cpu_id()) {
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case BCM6338_CPU_ID:
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irq_stat_addr += PERF_IRQSTAT_6338_REG;
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irq_mask_addr += PERF_IRQMASK_6338_REG;
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break;
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case BCM6345_CPU_ID:
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irq_stat_addr += PERF_IRQSTAT_6345_REG;
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irq_mask_addr += PERF_IRQMASK_6345_REG;
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break;
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case BCM6348_CPU_ID:
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irq_stat_addr += PERF_IRQSTAT_6348_REG;
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irq_mask_addr += PERF_IRQMASK_6348_REG;
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break;
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case BCM6358_CPU_ID:
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irq_stat_addr += PERF_IRQSTAT_6358_REG;
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irq_mask_addr += PERF_IRQMASK_6358_REG;
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break;
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default:
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BUG();
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}
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dispatch_internal = __dispatch_internal;
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}
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#endif /* ! BCMCPU_RUNTIME_DETECT */
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static inline void handle_internal(int intbit)
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{
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do_IRQ(intbit + IRQ_INTERNAL_BASE);
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}
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/*
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/*
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* dispatch internal devices IRQ (uart, enet, watchdog, ...). do not
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* dispatch internal devices IRQ (uart, enet, watchdog, ...). do not
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* prioritize any interrupt relatively to another. the static counter
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* prioritize any interrupt relatively to another. the static counter
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* will resume the loop where it ended the last time we left this
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* will resume the loop where it ended the last time we left this
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* function.
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* function.
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*/
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*/
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static void bcm63xx_irq_dispatch_internal(void)
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static void __dispatch_internal(void)
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{
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{
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u32 pending;
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u32 pending;
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static int i;
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static int i;
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pending = bcm_perf_readl(PERF_IRQMASK_REG) &
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pending = bcm_readl(irq_stat_addr) & bcm_readl(irq_mask_addr);
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bcm_perf_readl(PERF_IRQSTAT_REG);
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if (!pending)
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if (!pending)
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return ;
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return ;
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@ -41,7 +108,7 @@ static void bcm63xx_irq_dispatch_internal(void)
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i = (i + 1) & 0x1f;
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i = (i + 1) & 0x1f;
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if (pending & (1 << to_call)) {
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if (pending & (1 << to_call)) {
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do_IRQ(to_call + IRQ_INTERNAL_BASE);
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handle_internal(to_call);
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break;
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break;
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}
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}
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}
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}
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@ -60,7 +127,7 @@ asmlinkage void plat_irq_dispatch(void)
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if (cause & CAUSEF_IP7)
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if (cause & CAUSEF_IP7)
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do_IRQ(7);
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do_IRQ(7);
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if (cause & CAUSEF_IP2)
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if (cause & CAUSEF_IP2)
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bcm63xx_irq_dispatch_internal();
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dispatch_internal();
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if (cause & CAUSEF_IP3)
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if (cause & CAUSEF_IP3)
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do_IRQ(IRQ_EXT_0);
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do_IRQ(IRQ_EXT_0);
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if (cause & CAUSEF_IP4)
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if (cause & CAUSEF_IP4)
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@ -81,9 +148,9 @@ static inline void bcm63xx_internal_irq_mask(struct irq_data *d)
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unsigned int irq = d->irq - IRQ_INTERNAL_BASE;
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unsigned int irq = d->irq - IRQ_INTERNAL_BASE;
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u32 mask;
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u32 mask;
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mask = bcm_perf_readl(PERF_IRQMASK_REG);
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mask = bcm_readl(irq_mask_addr);
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mask &= ~(1 << irq);
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mask &= ~(1 << irq);
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bcm_perf_writel(mask, PERF_IRQMASK_REG);
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bcm_writel(mask, irq_mask_addr);
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}
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}
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static void bcm63xx_internal_irq_unmask(struct irq_data *d)
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static void bcm63xx_internal_irq_unmask(struct irq_data *d)
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@ -91,9 +158,9 @@ static void bcm63xx_internal_irq_unmask(struct irq_data *d)
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unsigned int irq = d->irq - IRQ_INTERNAL_BASE;
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unsigned int irq = d->irq - IRQ_INTERNAL_BASE;
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u32 mask;
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u32 mask;
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mask = bcm_perf_readl(PERF_IRQMASK_REG);
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mask = bcm_readl(irq_mask_addr);
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mask |= (1 << irq);
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mask |= (1 << irq);
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bcm_perf_writel(mask, PERF_IRQMASK_REG);
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bcm_writel(mask, irq_mask_addr);
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}
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}
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/*
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/*
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@ -229,6 +296,7 @@ void __init arch_init_irq(void)
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{
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{
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int i;
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int i;
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bcm63xx_init_irq();
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mips_cpu_irq_init();
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mips_cpu_irq_init();
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for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i)
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for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i)
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irq_set_chip_and_handler(i, &bcm63xx_internal_irq_chip,
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irq_set_chip_and_handler(i, &bcm63xx_internal_irq_chip,
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@ -88,10 +88,16 @@
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#define SYS_PLL_SOFT_RESET 0x1
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#define SYS_PLL_SOFT_RESET 0x1
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/* Interrupt Mask register */
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/* Interrupt Mask register */
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#define PERF_IRQMASK_REG 0xc
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#define PERF_IRQMASK_6338_REG 0xc
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#define PERF_IRQMASK_6345_REG 0xc
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#define PERF_IRQMASK_6348_REG 0xc
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#define PERF_IRQMASK_6358_REG 0xc
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/* Interrupt Status register */
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/* Interrupt Status register */
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#define PERF_IRQSTAT_REG 0x10
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#define PERF_IRQSTAT_6338_REG 0x10
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#define PERF_IRQSTAT_6345_REG 0x10
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#define PERF_IRQSTAT_6348_REG 0x10
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#define PERF_IRQSTAT_6358_REG 0x10
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/* External Interrupt Configuration register */
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/* External Interrupt Configuration register */
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#define PERF_EXTIRQ_CFG_REG 0x14
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#define PERF_EXTIRQ_CFG_REG 0x14
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