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drm/i915/tgl+: Enable display DC power states on all eDP ports
Starting with TGL eDP is supported on ports B+ (besides port A), so make sure DC states are not blocked on any such ports. For this add an AUX_IO_<port> power domain for each port with eDP support. These domains similarly to AUX_IO_A enable only the AUX_IO_<port> power well for an enabled port, whereas the existing AUX_<port> domains enable both the AUX_IO_<port> and the DC_OFF power wells as required by DP AUX transfers. v2: (Ville) - Split the change using AUX vs. AUX_IO on port A to a separate patch. - Select AUX_IO vs. AUX based on crtc_state->has_psr instead of is_edp(). v3: - Rebased on checking intel_encoder_can_psr() instead of crtc->has_psr. v4: - Fix warn in intel_display_power_aux_io_domain(). (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221114122251.21327-6-imre.deak@intel.com
This commit is contained in:
parent
b2e00dd378
commit
f645cbda12
4 changed files with 89 additions and 7 deletions
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@ -850,6 +850,8 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
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static enum intel_display_power_domain
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intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port)
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{
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struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
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/* ICL+ HW requires corresponding AUX IOs to be powered up for PSR with
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* DC states enabled at the same time, while for driver initiated AUX
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* transfers we need the same AUX IOs to be powered but with DC states
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@ -862,8 +864,8 @@ intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port)
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* Note that PSR is enabled only on Port A even though this function
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* returns the correct domain for other ports too.
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*/
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if (dig_port->aux_ch == AUX_CH_A && intel_encoder_can_psr(&dig_port->base))
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return POWER_DOMAIN_AUX_IO_A;
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if (intel_encoder_can_psr(&dig_port->base))
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return intel_display_power_aux_io_domain(i915, dig_port->aux_ch);
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else
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return intel_aux_power_domain(dig_port);
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}
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@ -131,6 +131,16 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
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return "AUDIO_PLAYBACK";
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case POWER_DOMAIN_AUX_IO_A:
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return "AUX_IO_A";
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case POWER_DOMAIN_AUX_IO_B:
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return "AUX_IO_B";
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case POWER_DOMAIN_AUX_IO_C:
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return "AUX_IO_C";
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case POWER_DOMAIN_AUX_IO_D:
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return "AUX_IO_D";
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case POWER_DOMAIN_AUX_IO_E:
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return "AUX_IO_E";
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case POWER_DOMAIN_AUX_IO_F:
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return "AUX_IO_F";
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case POWER_DOMAIN_AUX_A:
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return "AUX_A";
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case POWER_DOMAIN_AUX_B:
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@ -2289,6 +2299,7 @@ struct intel_ddi_port_domains {
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enum intel_display_power_domain ddi_lanes;
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enum intel_display_power_domain ddi_io;
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enum intel_display_power_domain aux_io;
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enum intel_display_power_domain aux_legacy_usbc;
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enum intel_display_power_domain aux_tbt;
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};
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@ -2303,6 +2314,7 @@ i9xx_port_domains[] = {
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.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_A,
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.ddi_io = POWER_DOMAIN_PORT_DDI_IO_A,
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.aux_io = POWER_DOMAIN_AUX_IO_A,
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.aux_legacy_usbc = POWER_DOMAIN_AUX_A,
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.aux_tbt = POWER_DOMAIN_INVALID,
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},
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@ -2318,6 +2330,7 @@ d11_port_domains[] = {
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.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_A,
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.ddi_io = POWER_DOMAIN_PORT_DDI_IO_A,
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.aux_io = POWER_DOMAIN_AUX_IO_A,
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.aux_legacy_usbc = POWER_DOMAIN_AUX_A,
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.aux_tbt = POWER_DOMAIN_INVALID,
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}, {
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@ -2328,6 +2341,7 @@ d11_port_domains[] = {
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.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_C,
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.ddi_io = POWER_DOMAIN_PORT_DDI_IO_C,
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.aux_io = POWER_DOMAIN_AUX_IO_C,
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.aux_legacy_usbc = POWER_DOMAIN_AUX_C,
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.aux_tbt = POWER_DOMAIN_AUX_TBT1,
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},
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@ -2343,6 +2357,7 @@ d12_port_domains[] = {
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.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_A,
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.ddi_io = POWER_DOMAIN_PORT_DDI_IO_A,
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.aux_io = POWER_DOMAIN_AUX_IO_A,
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.aux_legacy_usbc = POWER_DOMAIN_AUX_A,
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.aux_tbt = POWER_DOMAIN_INVALID,
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}, {
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@ -2353,6 +2368,7 @@ d12_port_domains[] = {
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.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_TC1,
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.ddi_io = POWER_DOMAIN_PORT_DDI_IO_TC1,
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.aux_io = POWER_DOMAIN_INVALID,
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.aux_legacy_usbc = POWER_DOMAIN_AUX_USBC1,
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.aux_tbt = POWER_DOMAIN_AUX_TBT1,
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},
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@ -2368,6 +2384,7 @@ d13_port_domains[] = {
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.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_A,
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.ddi_io = POWER_DOMAIN_PORT_DDI_IO_A,
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.aux_io = POWER_DOMAIN_AUX_IO_A,
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.aux_legacy_usbc = POWER_DOMAIN_AUX_A,
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.aux_tbt = POWER_DOMAIN_INVALID,
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}, {
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@ -2378,6 +2395,7 @@ d13_port_domains[] = {
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.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_TC1,
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.ddi_io = POWER_DOMAIN_PORT_DDI_IO_TC1,
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.aux_io = POWER_DOMAIN_INVALID,
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.aux_legacy_usbc = POWER_DOMAIN_AUX_USBC1,
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.aux_tbt = POWER_DOMAIN_AUX_TBT1,
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}, {
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@ -2388,6 +2406,7 @@ d13_port_domains[] = {
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.ddi_lanes = POWER_DOMAIN_PORT_DDI_LANES_D,
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.ddi_io = POWER_DOMAIN_PORT_DDI_IO_D,
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.aux_io = POWER_DOMAIN_AUX_IO_D,
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.aux_legacy_usbc = POWER_DOMAIN_AUX_D,
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.aux_tbt = POWER_DOMAIN_INVALID,
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},
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@ -2465,6 +2484,17 @@ intel_port_domains_for_aux_ch(struct drm_i915_private *i915, enum aux_ch aux_ch)
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return NULL;
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}
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enum intel_display_power_domain
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intel_display_power_aux_io_domain(struct drm_i915_private *i915, enum aux_ch aux_ch)
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{
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const struct intel_ddi_port_domains *domains = intel_port_domains_for_aux_ch(i915, aux_ch);
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if (drm_WARN_ON(&i915->drm, !domains || domains->aux_io == POWER_DOMAIN_INVALID))
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return POWER_DOMAIN_AUX_IO_A;
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return domains->aux_io + (int)(aux_ch - domains->aux_ch_start);
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}
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enum intel_display_power_domain
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intel_display_power_legacy_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch)
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{
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@ -79,6 +79,11 @@ enum intel_display_power_domain {
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POWER_DOMAIN_AUDIO_PLAYBACK,
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POWER_DOMAIN_AUX_IO_A,
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POWER_DOMAIN_AUX_IO_B,
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POWER_DOMAIN_AUX_IO_C,
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POWER_DOMAIN_AUX_IO_D,
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POWER_DOMAIN_AUX_IO_E,
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POWER_DOMAIN_AUX_IO_F,
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POWER_DOMAIN_AUX_A,
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POWER_DOMAIN_AUX_B,
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@ -251,6 +256,8 @@ intel_display_power_ddi_lanes_domain(struct drm_i915_private *i915, enum port po
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enum intel_display_power_domain
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intel_display_power_ddi_io_domain(struct drm_i915_private *i915, enum port port);
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enum intel_display_power_domain
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intel_display_power_aux_io_domain(struct drm_i915_private *i915, enum aux_ch aux_ch);
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enum intel_display_power_domain
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intel_display_power_legacy_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch);
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enum intel_display_power_domain
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intel_display_power_tbt_aux_domain(struct drm_i915_private *i915, enum aux_ch aux_ch);
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@ -170,6 +170,8 @@ I915_DECL_PW_DOMAINS(vlv_pwdoms_display,
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POWER_DOMAIN_VGA,
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POWER_DOMAIN_AUDIO_MMIO,
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POWER_DOMAIN_AUDIO_PLAYBACK,
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POWER_DOMAIN_AUX_IO_B,
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POWER_DOMAIN_AUX_IO_C,
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POWER_DOMAIN_AUX_B,
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POWER_DOMAIN_AUX_C,
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POWER_DOMAIN_GMBUS,
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@ -179,6 +181,8 @@ I915_DECL_PW_DOMAINS(vlv_pwdoms_dpio_cmn_bc,
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POWER_DOMAIN_PORT_DDI_LANES_B,
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POWER_DOMAIN_PORT_DDI_LANES_C,
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POWER_DOMAIN_PORT_CRT,
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POWER_DOMAIN_AUX_IO_B,
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POWER_DOMAIN_AUX_IO_C,
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POWER_DOMAIN_AUX_B,
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POWER_DOMAIN_AUX_C,
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POWER_DOMAIN_INIT);
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@ -186,6 +190,8 @@ I915_DECL_PW_DOMAINS(vlv_pwdoms_dpio_cmn_bc,
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I915_DECL_PW_DOMAINS(vlv_pwdoms_dpio_tx_bc_lanes,
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POWER_DOMAIN_PORT_DDI_LANES_B,
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POWER_DOMAIN_PORT_DDI_LANES_C,
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POWER_DOMAIN_AUX_IO_B,
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POWER_DOMAIN_AUX_IO_C,
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POWER_DOMAIN_AUX_B,
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POWER_DOMAIN_AUX_C,
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POWER_DOMAIN_INIT);
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@ -243,6 +249,9 @@ I915_DECL_PW_DOMAINS(chv_pwdoms_display,
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POWER_DOMAIN_VGA,
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POWER_DOMAIN_AUDIO_MMIO,
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POWER_DOMAIN_AUDIO_PLAYBACK,
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POWER_DOMAIN_AUX_IO_B,
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POWER_DOMAIN_AUX_IO_C,
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POWER_DOMAIN_AUX_IO_D,
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POWER_DOMAIN_AUX_B,
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POWER_DOMAIN_AUX_C,
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POWER_DOMAIN_AUX_D,
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@ -252,12 +261,15 @@ I915_DECL_PW_DOMAINS(chv_pwdoms_display,
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I915_DECL_PW_DOMAINS(chv_pwdoms_dpio_cmn_bc,
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POWER_DOMAIN_PORT_DDI_LANES_B,
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POWER_DOMAIN_PORT_DDI_LANES_C,
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POWER_DOMAIN_AUX_IO_B,
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POWER_DOMAIN_AUX_IO_C,
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POWER_DOMAIN_AUX_B,
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POWER_DOMAIN_AUX_C,
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POWER_DOMAIN_INIT);
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I915_DECL_PW_DOMAINS(chv_pwdoms_dpio_cmn_d,
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POWER_DOMAIN_PORT_DDI_LANES_D,
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POWER_DOMAIN_AUX_IO_D,
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POWER_DOMAIN_AUX_D,
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POWER_DOMAIN_INIT);
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@ -305,6 +317,9 @@ static const struct i915_power_well_desc_list chv_power_wells[] = {
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POWER_DOMAIN_VGA, \
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POWER_DOMAIN_AUDIO_MMIO, \
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POWER_DOMAIN_AUDIO_PLAYBACK, \
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POWER_DOMAIN_AUX_IO_B, \
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POWER_DOMAIN_AUX_IO_C, \
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POWER_DOMAIN_AUX_IO_D, \
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POWER_DOMAIN_AUX_B, \
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POWER_DOMAIN_AUX_C, \
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POWER_DOMAIN_AUX_D
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@ -407,6 +422,8 @@ static const struct i915_power_well_desc_list skl_power_wells[] = {
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POWER_DOMAIN_VGA, \
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POWER_DOMAIN_AUDIO_MMIO, \
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POWER_DOMAIN_AUDIO_PLAYBACK, \
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POWER_DOMAIN_AUX_IO_B, \
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POWER_DOMAIN_AUX_IO_C, \
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POWER_DOMAIN_AUX_B, \
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POWER_DOMAIN_AUX_C
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@ -430,6 +447,8 @@ I915_DECL_PW_DOMAINS(bxt_pwdoms_dpio_cmn_a,
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I915_DECL_PW_DOMAINS(bxt_pwdoms_dpio_cmn_bc,
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POWER_DOMAIN_PORT_DDI_LANES_B,
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POWER_DOMAIN_PORT_DDI_LANES_C,
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POWER_DOMAIN_AUX_IO_B,
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POWER_DOMAIN_AUX_IO_C,
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POWER_DOMAIN_AUX_B,
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POWER_DOMAIN_AUX_C,
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POWER_DOMAIN_INIT);
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@ -483,6 +502,8 @@ static const struct i915_power_well_desc_list bxt_power_wells[] = {
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POWER_DOMAIN_VGA, \
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POWER_DOMAIN_AUDIO_MMIO, \
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POWER_DOMAIN_AUDIO_PLAYBACK, \
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POWER_DOMAIN_AUX_IO_B, \
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POWER_DOMAIN_AUX_IO_C, \
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POWER_DOMAIN_AUX_B, \
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POWER_DOMAIN_AUX_C
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@ -509,11 +530,13 @@ I915_DECL_PW_DOMAINS(glk_pwdoms_dpio_cmn_a,
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I915_DECL_PW_DOMAINS(glk_pwdoms_dpio_cmn_b,
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POWER_DOMAIN_PORT_DDI_LANES_B,
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POWER_DOMAIN_AUX_IO_B,
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POWER_DOMAIN_AUX_B,
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POWER_DOMAIN_INIT);
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I915_DECL_PW_DOMAINS(glk_pwdoms_dpio_cmn_c,
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POWER_DOMAIN_PORT_DDI_LANES_C,
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POWER_DOMAIN_AUX_IO_C,
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POWER_DOMAIN_AUX_C,
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POWER_DOMAIN_INIT);
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POWER_DOMAIN_INIT);
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I915_DECL_PW_DOMAINS(glk_pwdoms_aux_b,
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POWER_DOMAIN_AUX_IO_B,
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POWER_DOMAIN_AUX_B,
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POWER_DOMAIN_INIT);
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I915_DECL_PW_DOMAINS(glk_pwdoms_aux_c,
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POWER_DOMAIN_AUX_IO_C,
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POWER_DOMAIN_AUX_C,
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POWER_DOMAIN_INIT);
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@ -617,6 +642,11 @@ I915_DECL_PW_DOMAINS(icl_pwdoms_pw_4,
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POWER_DOMAIN_VGA, \
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POWER_DOMAIN_AUDIO_MMIO, \
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POWER_DOMAIN_AUDIO_PLAYBACK, \
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POWER_DOMAIN_AUX_IO_B, \
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POWER_DOMAIN_AUX_IO_C, \
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POWER_DOMAIN_AUX_IO_D, \
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POWER_DOMAIN_AUX_IO_E, \
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POWER_DOMAIN_AUX_IO_F, \
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POWER_DOMAIN_AUX_B, \
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POWER_DOMAIN_AUX_C, \
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POWER_DOMAIN_AUX_D, \
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@ -660,11 +690,21 @@ I915_DECL_PW_DOMAINS(icl_pwdoms_ddi_io_f, POWER_DOMAIN_PORT_DDI_IO_F);
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I915_DECL_PW_DOMAINS(icl_pwdoms_aux_a,
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POWER_DOMAIN_AUX_IO_A,
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POWER_DOMAIN_AUX_A);
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I915_DECL_PW_DOMAINS(icl_pwdoms_aux_b, POWER_DOMAIN_AUX_B);
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I915_DECL_PW_DOMAINS(icl_pwdoms_aux_c, POWER_DOMAIN_AUX_C);
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I915_DECL_PW_DOMAINS(icl_pwdoms_aux_d, POWER_DOMAIN_AUX_D);
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I915_DECL_PW_DOMAINS(icl_pwdoms_aux_e, POWER_DOMAIN_AUX_E);
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I915_DECL_PW_DOMAINS(icl_pwdoms_aux_f, POWER_DOMAIN_AUX_F);
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I915_DECL_PW_DOMAINS(icl_pwdoms_aux_b,
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POWER_DOMAIN_AUX_IO_B,
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POWER_DOMAIN_AUX_B);
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I915_DECL_PW_DOMAINS(icl_pwdoms_aux_c,
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POWER_DOMAIN_AUX_IO_C,
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POWER_DOMAIN_AUX_C);
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I915_DECL_PW_DOMAINS(icl_pwdoms_aux_d,
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POWER_DOMAIN_AUX_IO_D,
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POWER_DOMAIN_AUX_D);
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I915_DECL_PW_DOMAINS(icl_pwdoms_aux_e,
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POWER_DOMAIN_AUX_IO_E,
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POWER_DOMAIN_AUX_E);
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I915_DECL_PW_DOMAINS(icl_pwdoms_aux_f,
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POWER_DOMAIN_AUX_IO_F,
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POWER_DOMAIN_AUX_F);
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I915_DECL_PW_DOMAINS(icl_pwdoms_aux_tbt1, POWER_DOMAIN_AUX_TBT1);
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I915_DECL_PW_DOMAINS(icl_pwdoms_aux_tbt2, POWER_DOMAIN_AUX_TBT2);
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I915_DECL_PW_DOMAINS(icl_pwdoms_aux_tbt3, POWER_DOMAIN_AUX_TBT3);
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@ -1215,6 +1255,9 @@ I915_DECL_PW_DOMAINS(xelpd_pwdoms_pw_a,
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POWER_DOMAIN_PORT_DDI_LANES_TC4, \
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POWER_DOMAIN_VGA, \
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POWER_DOMAIN_AUDIO_PLAYBACK, \
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POWER_DOMAIN_AUX_IO_C, \
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POWER_DOMAIN_AUX_IO_D, \
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POWER_DOMAIN_AUX_IO_E, \
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POWER_DOMAIN_AUX_C, \
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POWER_DOMAIN_AUX_D, \
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POWER_DOMAIN_AUX_E, \
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