mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-06 19:07:52 +00:00
i40iw: Fix parsing of query/commit FPM buffers
Parsing of commit/query Host Memory Cache Function Private Memory is not skipping over reserved fields and incorrectly assigning those values into object's base/cnt/max_cnt fields. Skip over reserved fields and set correct values. Also correct memory alignment requirement for commit/query FPM buffers. Signed-off-by: Chien Tin Tung <chien.tin.tung@intel.com> Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com> Signed-off-by: Christopher N Bednarz <christopher.n.bednarz@intel.com> Signed-off-by: Henry Orosco <henry.orosco@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
parent
a7d2e03928
commit
f67ace2d88
2 changed files with 83 additions and 42 deletions
|
@ -130,20 +130,32 @@ static enum i40iw_status_code i40iw_sc_parse_fpm_commit_buf(
|
||||||
u64 base = 0;
|
u64 base = 0;
|
||||||
u32 i, j;
|
u32 i, j;
|
||||||
u32 k = 0;
|
u32 k = 0;
|
||||||
u32 low;
|
|
||||||
|
|
||||||
/* copy base values in obj_info */
|
/* copy base values in obj_info */
|
||||||
for (i = I40IW_HMC_IW_QP, j = 0;
|
for (i = I40IW_HMC_IW_QP, j = 0; i <= I40IW_HMC_IW_PBLE; i++, j += 8) {
|
||||||
i <= I40IW_HMC_IW_PBLE; i++, j += 8) {
|
if ((i == I40IW_HMC_IW_SRQ) ||
|
||||||
|
(i == I40IW_HMC_IW_FSIMC) ||
|
||||||
|
(i == I40IW_HMC_IW_FSIAV)) {
|
||||||
|
info[i].base = 0;
|
||||||
|
info[i].cnt = 0;
|
||||||
|
continue;
|
||||||
|
}
|
||||||
get_64bit_val(buf, j, &temp);
|
get_64bit_val(buf, j, &temp);
|
||||||
info[i].base = RS_64_1(temp, 32) * 512;
|
info[i].base = RS_64_1(temp, 32) * 512;
|
||||||
if (info[i].base > base) {
|
if (info[i].base > base) {
|
||||||
base = info[i].base;
|
base = info[i].base;
|
||||||
k = i;
|
k = i;
|
||||||
}
|
}
|
||||||
low = (u32)(temp);
|
if (i == I40IW_HMC_IW_APBVT_ENTRY) {
|
||||||
if (low)
|
info[i].cnt = 1;
|
||||||
info[i].cnt = low;
|
continue;
|
||||||
|
}
|
||||||
|
if (i == I40IW_HMC_IW_QP)
|
||||||
|
info[i].cnt = (u32)RS_64(temp, I40IW_QUERY_FPM_MAX_QPS);
|
||||||
|
else if (i == I40IW_HMC_IW_CQ)
|
||||||
|
info[i].cnt = (u32)RS_64(temp, I40IW_QUERY_FPM_MAX_CQS);
|
||||||
|
else
|
||||||
|
info[i].cnt = (u32)(temp);
|
||||||
}
|
}
|
||||||
size = info[k].cnt * info[k].size + info[k].base;
|
size = info[k].cnt * info[k].size + info[k].base;
|
||||||
if (size & 0x1FFFFF)
|
if (size & 0x1FFFFF)
|
||||||
|
@ -154,6 +166,31 @@ static enum i40iw_status_code i40iw_sc_parse_fpm_commit_buf(
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* i40iw_sc_decode_fpm_query() - Decode a 64 bit value into max count and size
|
||||||
|
* @buf: ptr to fpm query buffer
|
||||||
|
* @buf_idx: index into buf
|
||||||
|
* @info: ptr to i40iw_hmc_obj_info struct
|
||||||
|
* @rsrc_idx: resource index into info
|
||||||
|
*
|
||||||
|
* Decode a 64 bit value from fpm query buffer into max count and size
|
||||||
|
*/
|
||||||
|
static u64 i40iw_sc_decode_fpm_query(u64 *buf,
|
||||||
|
u32 buf_idx,
|
||||||
|
struct i40iw_hmc_obj_info *obj_info,
|
||||||
|
u32 rsrc_idx)
|
||||||
|
{
|
||||||
|
u64 temp;
|
||||||
|
u32 size;
|
||||||
|
|
||||||
|
get_64bit_val(buf, buf_idx, &temp);
|
||||||
|
obj_info[rsrc_idx].max_cnt = (u32)temp;
|
||||||
|
size = (u32)RS_64_1(temp, 32);
|
||||||
|
obj_info[rsrc_idx].size = LS_64_1(1, size);
|
||||||
|
|
||||||
|
return temp;
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* i40iw_sc_parse_fpm_query_buf() - parses fpm query buffer
|
* i40iw_sc_parse_fpm_query_buf() - parses fpm query buffer
|
||||||
* @buf: ptr to fpm query buffer
|
* @buf: ptr to fpm query buffer
|
||||||
|
@ -168,9 +205,9 @@ static enum i40iw_status_code i40iw_sc_parse_fpm_query_buf(
|
||||||
struct i40iw_hmc_info *hmc_info,
|
struct i40iw_hmc_info *hmc_info,
|
||||||
struct i40iw_hmc_fpm_misc *hmc_fpm_misc)
|
struct i40iw_hmc_fpm_misc *hmc_fpm_misc)
|
||||||
{
|
{
|
||||||
u64 temp;
|
|
||||||
struct i40iw_hmc_obj_info *obj_info;
|
struct i40iw_hmc_obj_info *obj_info;
|
||||||
u32 i, j, size;
|
u64 temp;
|
||||||
|
u32 size;
|
||||||
u16 max_pe_sds;
|
u16 max_pe_sds;
|
||||||
|
|
||||||
obj_info = hmc_info->hmc_obj;
|
obj_info = hmc_info->hmc_obj;
|
||||||
|
@ -185,41 +222,52 @@ static enum i40iw_status_code i40iw_sc_parse_fpm_query_buf(
|
||||||
hmc_fpm_misc->max_sds = max_pe_sds;
|
hmc_fpm_misc->max_sds = max_pe_sds;
|
||||||
hmc_info->sd_table.sd_cnt = max_pe_sds + hmc_info->first_sd_index;
|
hmc_info->sd_table.sd_cnt = max_pe_sds + hmc_info->first_sd_index;
|
||||||
|
|
||||||
for (i = I40IW_HMC_IW_QP, j = 8;
|
get_64bit_val(buf, 8, &temp);
|
||||||
i <= I40IW_HMC_IW_ARP; i++, j += 8) {
|
obj_info[I40IW_HMC_IW_QP].max_cnt = (u32)RS_64(temp, I40IW_QUERY_FPM_MAX_QPS);
|
||||||
get_64bit_val(buf, j, &temp);
|
|
||||||
if (i == I40IW_HMC_IW_QP)
|
|
||||||
obj_info[i].max_cnt = (u32)RS_64(temp, I40IW_QUERY_FPM_MAX_QPS);
|
|
||||||
else if (i == I40IW_HMC_IW_CQ)
|
|
||||||
obj_info[i].max_cnt = (u32)RS_64(temp, I40IW_QUERY_FPM_MAX_CQS);
|
|
||||||
else
|
|
||||||
obj_info[i].max_cnt = (u32)temp;
|
|
||||||
|
|
||||||
size = (u32)RS_64_1(temp, 32);
|
size = (u32)RS_64_1(temp, 32);
|
||||||
obj_info[i].size = ((u64)1 << size);
|
obj_info[I40IW_HMC_IW_QP].size = LS_64_1(1, size);
|
||||||
}
|
|
||||||
for (i = I40IW_HMC_IW_MR, j = 48;
|
get_64bit_val(buf, 16, &temp);
|
||||||
i <= I40IW_HMC_IW_PBLE; i++, j += 8) {
|
obj_info[I40IW_HMC_IW_CQ].max_cnt = (u32)RS_64(temp, I40IW_QUERY_FPM_MAX_CQS);
|
||||||
get_64bit_val(buf, j, &temp);
|
size = (u32)RS_64_1(temp, 32);
|
||||||
obj_info[i].max_cnt = (u32)temp;
|
obj_info[I40IW_HMC_IW_CQ].size = LS_64_1(1, size);
|
||||||
size = (u32)RS_64_1(temp, 32);
|
|
||||||
obj_info[i].size = LS_64_1(1, size);
|
i40iw_sc_decode_fpm_query(buf, 32, obj_info, I40IW_HMC_IW_HTE);
|
||||||
}
|
i40iw_sc_decode_fpm_query(buf, 40, obj_info, I40IW_HMC_IW_ARP);
|
||||||
|
|
||||||
|
obj_info[I40IW_HMC_IW_APBVT_ENTRY].size = 8192;
|
||||||
|
obj_info[I40IW_HMC_IW_APBVT_ENTRY].max_cnt = 1;
|
||||||
|
|
||||||
|
i40iw_sc_decode_fpm_query(buf, 48, obj_info, I40IW_HMC_IW_MR);
|
||||||
|
i40iw_sc_decode_fpm_query(buf, 56, obj_info, I40IW_HMC_IW_XF);
|
||||||
|
|
||||||
get_64bit_val(buf, 120, &temp);
|
|
||||||
hmc_fpm_misc->max_ceqs = (u8)RS_64(temp, I40IW_QUERY_FPM_MAX_CEQS);
|
|
||||||
get_64bit_val(buf, 120, &temp);
|
|
||||||
hmc_fpm_misc->ht_multiplier = RS_64(temp, I40IW_QUERY_FPM_HTMULTIPLIER);
|
|
||||||
get_64bit_val(buf, 120, &temp);
|
|
||||||
hmc_fpm_misc->timer_bucket = RS_64(temp, I40IW_QUERY_FPM_TIMERBUCKET);
|
|
||||||
get_64bit_val(buf, 64, &temp);
|
get_64bit_val(buf, 64, &temp);
|
||||||
|
obj_info[I40IW_HMC_IW_XFFL].max_cnt = (u32)temp;
|
||||||
|
obj_info[I40IW_HMC_IW_XFFL].size = 4;
|
||||||
hmc_fpm_misc->xf_block_size = RS_64(temp, I40IW_QUERY_FPM_XFBLOCKSIZE);
|
hmc_fpm_misc->xf_block_size = RS_64(temp, I40IW_QUERY_FPM_XFBLOCKSIZE);
|
||||||
if (!hmc_fpm_misc->xf_block_size)
|
if (!hmc_fpm_misc->xf_block_size)
|
||||||
return I40IW_ERR_INVALID_SIZE;
|
return I40IW_ERR_INVALID_SIZE;
|
||||||
|
|
||||||
|
i40iw_sc_decode_fpm_query(buf, 72, obj_info, I40IW_HMC_IW_Q1);
|
||||||
|
|
||||||
get_64bit_val(buf, 80, &temp);
|
get_64bit_val(buf, 80, &temp);
|
||||||
|
obj_info[I40IW_HMC_IW_Q1FL].max_cnt = (u32)temp;
|
||||||
|
obj_info[I40IW_HMC_IW_Q1FL].size = 4;
|
||||||
hmc_fpm_misc->q1_block_size = RS_64(temp, I40IW_QUERY_FPM_Q1BLOCKSIZE);
|
hmc_fpm_misc->q1_block_size = RS_64(temp, I40IW_QUERY_FPM_Q1BLOCKSIZE);
|
||||||
if (!hmc_fpm_misc->q1_block_size)
|
if (!hmc_fpm_misc->q1_block_size)
|
||||||
return I40IW_ERR_INVALID_SIZE;
|
return I40IW_ERR_INVALID_SIZE;
|
||||||
|
|
||||||
|
i40iw_sc_decode_fpm_query(buf, 88, obj_info, I40IW_HMC_IW_TIMER);
|
||||||
|
|
||||||
|
get_64bit_val(buf, 112, &temp);
|
||||||
|
obj_info[I40IW_HMC_IW_PBLE].max_cnt = (u32)temp;
|
||||||
|
obj_info[I40IW_HMC_IW_PBLE].size = 8;
|
||||||
|
|
||||||
|
get_64bit_val(buf, 120, &temp);
|
||||||
|
hmc_fpm_misc->max_ceqs = (u8)RS_64(temp, I40IW_QUERY_FPM_MAX_CEQS);
|
||||||
|
hmc_fpm_misc->ht_multiplier = RS_64(temp, I40IW_QUERY_FPM_HTMULTIPLIER);
|
||||||
|
hmc_fpm_misc->timer_bucket = RS_64(temp, I40IW_QUERY_FPM_TIMERBUCKET);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -3392,13 +3440,6 @@ enum i40iw_status_code i40iw_sc_init_iw_hmc(struct i40iw_sc_dev *dev, u8 hmc_fn_
|
||||||
hmc_info->sd_table.sd_entry = virt_mem.va;
|
hmc_info->sd_table.sd_entry = virt_mem.va;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* fill size of objects which are fixed */
|
|
||||||
hmc_info->hmc_obj[I40IW_HMC_IW_XFFL].size = 4;
|
|
||||||
hmc_info->hmc_obj[I40IW_HMC_IW_Q1FL].size = 4;
|
|
||||||
hmc_info->hmc_obj[I40IW_HMC_IW_PBLE].size = 8;
|
|
||||||
hmc_info->hmc_obj[I40IW_HMC_IW_APBVT_ENTRY].size = 8192;
|
|
||||||
hmc_info->hmc_obj[I40IW_HMC_IW_APBVT_ENTRY].max_cnt = 1;
|
|
||||||
|
|
||||||
return ret_code;
|
return ret_code;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1507,8 +1507,8 @@ enum {
|
||||||
I40IW_CQ0_ALIGNMENT_MASK = (256 - 1),
|
I40IW_CQ0_ALIGNMENT_MASK = (256 - 1),
|
||||||
I40IW_HOST_CTX_ALIGNMENT_MASK = (4 - 1),
|
I40IW_HOST_CTX_ALIGNMENT_MASK = (4 - 1),
|
||||||
I40IW_SHADOWAREA_MASK = (128 - 1),
|
I40IW_SHADOWAREA_MASK = (128 - 1),
|
||||||
I40IW_FPM_QUERY_BUF_ALIGNMENT_MASK = 0,
|
I40IW_FPM_QUERY_BUF_ALIGNMENT_MASK = (4 - 1),
|
||||||
I40IW_FPM_COMMIT_BUF_ALIGNMENT_MASK = 0
|
I40IW_FPM_COMMIT_BUF_ALIGNMENT_MASK = (4 - 1)
|
||||||
};
|
};
|
||||||
|
|
||||||
enum i40iw_alignment {
|
enum i40iw_alignment {
|
||||||
|
|
Loading…
Reference in a new issue