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Merge branch 'for-linus/i2c/2636-rc8' of git://git.fluff.org/bjdooks/linux
* 'for-linus/i2c/2636-rc8' of git://git.fluff.org/bjdooks/linux: i2c-imx: do not allow interruptions when waiting for I2C to complete i2c-davinci: Fix TX setup for more SoCs
This commit is contained in:
commit
f68c834b04
2 changed files with 18 additions and 18 deletions
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@ -331,21 +331,16 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
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INIT_COMPLETION(dev->cmd_complete);
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dev->cmd_err = 0;
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/* Take I2C out of reset, configure it as master and set the
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* start bit */
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flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST | DAVINCI_I2C_MDR_STT;
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/* Take I2C out of reset and configure it as master */
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flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST;
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/* if the slave address is ten bit address, enable XA bit */
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if (msg->flags & I2C_M_TEN)
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flag |= DAVINCI_I2C_MDR_XA;
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if (!(msg->flags & I2C_M_RD))
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flag |= DAVINCI_I2C_MDR_TRX;
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if (stop)
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flag |= DAVINCI_I2C_MDR_STP;
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if (msg->len == 0) {
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if (msg->len == 0)
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flag |= DAVINCI_I2C_MDR_RM;
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flag &= ~DAVINCI_I2C_MDR_STP;
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}
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/* Enable receive or transmit interrupts */
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w = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG);
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@ -357,18 +352,29 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
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dev->terminate = 0;
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/*
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* Write mode register first as needed for correct behaviour
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* on OMAP-L138, but don't set STT yet to avoid a race with XRDY
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* occuring before we have loaded DXR
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*/
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davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
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/*
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* First byte should be set here, not after interrupt,
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* because transmit-data-ready interrupt can come before
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* NACK-interrupt during sending of previous message and
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* ICDXR may have wrong data
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* It also saves us one interrupt, slightly faster
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*/
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if ((!(msg->flags & I2C_M_RD)) && dev->buf_len) {
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davinci_i2c_write_reg(dev, DAVINCI_I2C_DXR_REG, *dev->buf++);
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dev->buf_len--;
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}
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/* write the data into mode register; start transmitting */
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/* Set STT to begin transmit now DXR is loaded */
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flag |= DAVINCI_I2C_MDR_STT;
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if (stop && msg->len != 0)
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flag |= DAVINCI_I2C_MDR_STP;
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davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
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r = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
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@ -159,15 +159,9 @@ static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy)
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static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx)
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{
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int result;
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wait_event_timeout(i2c_imx->queue, i2c_imx->i2csr & I2SR_IIF, HZ / 10);
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result = wait_event_interruptible_timeout(i2c_imx->queue,
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i2c_imx->i2csr & I2SR_IIF, HZ / 10);
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if (unlikely(result < 0)) {
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dev_dbg(&i2c_imx->adapter.dev, "<%s> result < 0\n", __func__);
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return result;
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} else if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) {
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if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) {
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dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__);
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return -ETIMEDOUT;
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}
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@ -295,7 +289,7 @@ static irqreturn_t i2c_imx_isr(int irq, void *dev_id)
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i2c_imx->i2csr = temp;
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temp &= ~I2SR_IIF;
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writeb(temp, i2c_imx->base + IMX_I2C_I2SR);
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wake_up_interruptible(&i2c_imx->queue);
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wake_up(&i2c_imx->queue);
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return IRQ_HANDLED;
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}
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