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V4L/DVB (5253): Qt1010: whitespace / 80 column cleanups
Signed-off-by: Michael Krufky <mkrufky@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
This commit is contained in:
parent
47e76c5c79
commit
f6982d5948
1 changed files with 44 additions and 25 deletions
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@ -25,14 +25,19 @@ static int debug;
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module_param(debug, int, 0644);
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MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
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#define dprintk(args...) do { if (debug) {printk(KERN_DEBUG "QT1010: " args); printk("\n"); }} while (0)
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#define dprintk(args...) \
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do { \
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if (debug) printk(KERN_DEBUG "QT1010: " args); \
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} while (0)
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/* read single register */
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static int qt1010_readreg(struct qt1010_priv *priv, u8 reg, u8 *val)
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{
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struct i2c_msg msg[2] = {
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{ .addr = priv->cfg->i2c_address, .flags = 0, .buf = ®, .len = 1 },
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{ .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, .buf = val, .len = 1 },
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{ .addr = priv->cfg->i2c_address,
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.flags = 0, .buf = ®, .len = 1 },
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{ .addr = priv->cfg->i2c_address,
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.flags = I2C_M_RD, .buf = val, .len = 1 },
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};
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if (i2c_transfer(priv->i2c, msg, 2) != 2) {
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@ -46,9 +51,8 @@ static int qt1010_readreg(struct qt1010_priv *priv, u8 reg, u8 *val)
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static int qt1010_writereg(struct qt1010_priv *priv, u8 reg, u8 val)
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{
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u8 buf[2] = { reg, val };
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struct i2c_msg msg = {
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.addr = priv->cfg->i2c_address, .flags = 0, .buf = buf, .len = 2
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};
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struct i2c_msg msg = { .addr = priv->cfg->i2c_address,
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.flags = 0, .buf = buf, .len = 2 };
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if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
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printk(KERN_WARNING "qt1010 I2C write failed\n");
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@ -80,7 +84,8 @@ static void qt1010_dump_regs(struct qt1010_priv *priv)
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printk("%s\n", buf);
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}
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static int qt1010_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
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static int qt1010_set_params(struct dvb_frontend *fe,
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struct dvb_frontend_parameters *params)
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{
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struct qt1010_priv *priv;
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int err;
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@ -146,7 +151,8 @@ static int qt1010_set_params(struct dvb_frontend *fe, struct dvb_frontend_parame
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freq = (div * QT1010_STEP) - QT1010_OFFSET;
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mod1 = (freq + QT1010_OFFSET) % FREQ1;
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mod2 = (freq + QT1010_OFFSET) % FREQ2;
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priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
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priv->bandwidth =
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(fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
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priv->frequency = freq;
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if (fe->ops.i2c_gate_ctrl)
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@ -227,8 +233,9 @@ static int qt1010_set_params(struct dvb_frontend *fe, struct dvb_frontend_parame
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/* 00 */
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rd[45].val = 0x92; /* TODO: correct value calculation */
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dprintk("freq:%u 05:%02x 07:%02x 09:%02x 0a:%02x 0b:%02x 1a:%02x 11:%02x " \
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"12:%02x 22:%02x 05:%02x 1f:%02x 20:%02x 25:%02x 00:%02x", \
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dprintk("freq:%u 05:%02x 07:%02x 09:%02x 0a:%02x 0b:%02x " \
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"1a:%02x 11:%02x 12:%02x 22:%02x 05:%02x 1f:%02x " \
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"20:%02x 25:%02x 00:%02x", \
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freq, rd[2].val, rd[4].val, rd[6].val, rd[7].val, rd[8].val, \
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rd[10].val, rd[13].val, rd[14].val, rd[15].val, rd[35].val, \
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rd[40].val, rd[41].val, rd[43].val, rd[45].val);
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@ -251,7 +258,8 @@ static int qt1010_set_params(struct dvb_frontend *fe, struct dvb_frontend_parame
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return 0;
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}
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static int qt1010_init_meas1(struct qt1010_priv *priv, u8 oper, u8 reg, u8 reg_init_val, u8 *retval)
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static int qt1010_init_meas1(struct qt1010_priv *priv,
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u8 oper, u8 reg, u8 reg_init_val, u8 *retval)
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{
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u8 i, val1, val2;
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int err;
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@ -265,7 +273,8 @@ static int qt1010_init_meas1(struct qt1010_priv *priv, u8 oper, u8 reg, u8 reg_i
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for (i = 0; i < ARRAY_SIZE(i2c_data); i++) {
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if (i2c_data[i].oper == QT1010_WR) {
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err = qt1010_writereg(priv, i2c_data[i].reg, i2c_data[i].val);
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err = qt1010_writereg(priv, i2c_data[i].reg,
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i2c_data[i].val);
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} else {
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err = qt1010_readreg(priv, i2c_data[i].reg, &val2);
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}
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@ -283,7 +292,8 @@ static int qt1010_init_meas1(struct qt1010_priv *priv, u8 oper, u8 reg, u8 reg_i
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return qt1010_writereg(priv, 0x1e, 0x00);
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}
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static u8 qt1010_init_meas2(struct qt1010_priv *priv, u8 reg_init_val, u8 *retval)
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static u8 qt1010_init_meas2(struct qt1010_priv *priv,
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u8 reg_init_val, u8 *retval)
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{
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u8 i, val;
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int err;
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@ -298,7 +308,8 @@ static u8 qt1010_init_meas2(struct qt1010_priv *priv, u8 reg_init_val, u8 *retva
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};
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for (i = 0; i < ARRAY_SIZE(i2c_data); i++) {
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if (i2c_data[i].oper == QT1010_WR) {
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err = qt1010_writereg(priv, i2c_data[i].reg, i2c_data[i].val);
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err = qt1010_writereg(priv, i2c_data[i].reg,
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i2c_data[i].val);
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} else {
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err = qt1010_readreg(priv, i2c_data[i].reg, &val);
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}
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@ -358,19 +369,26 @@ static int qt1010_init(struct dvb_frontend *fe)
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for (i = 0; i < ARRAY_SIZE(i2c_data); i++) {
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switch (i2c_data[i].oper) {
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case QT1010_WR:
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err = qt1010_writereg(priv, i2c_data[i].reg, i2c_data[i].val);
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err = qt1010_writereg(priv, i2c_data[i].reg,
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i2c_data[i].val);
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break;
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case QT1010_RD:
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if (i2c_data[i].val == 0x20) valptr = &priv->reg20_init_val;
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else valptr = &tmpval;
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if (i2c_data[i].val == 0x20)
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valptr = &priv->reg20_init_val;
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else
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valptr = &tmpval;
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err = qt1010_readreg(priv, i2c_data[i].reg, valptr);
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break;
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case QT1010_M1:
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if (i2c_data[i].val == 0x25) valptr = &priv->reg25_init_val;
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else if (i2c_data[i].val == 0x1f) valptr = &priv->reg1f_init_val;
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else valptr = &tmpval;
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err = qt1010_init_meas1(priv, i2c_data[i+1].reg, i2c_data[i].reg,
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i2c_data[i].val, valptr);
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if (i2c_data[i].val == 0x25)
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valptr = &priv->reg25_init_val;
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else if (i2c_data[i].val == 0x1f)
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valptr = &priv->reg1f_init_val;
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else
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valptr = &tmpval;
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err = qt1010_init_meas1(priv, i2c_data[i+1].reg,
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i2c_data[i].reg,
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i2c_data[i].val, valptr);
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i++;
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break;
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}
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@ -435,8 +453,8 @@ struct dvb_frontend * qt1010_attach(struct dvb_frontend *fe,
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if (priv == NULL)
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return NULL;
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priv->cfg = cfg;
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priv->i2c = i2c;
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priv->cfg = cfg;
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priv->i2c = i2c;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
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@ -452,7 +470,8 @@ struct dvb_frontend * qt1010_attach(struct dvb_frontend *fe,
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fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
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printk(KERN_INFO "Quantek QT1010 successfully identified.\n");
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memcpy(&fe->ops.tuner_ops, &qt1010_tuner_ops, sizeof(struct dvb_tuner_ops));
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memcpy(&fe->ops.tuner_ops, &qt1010_tuner_ops,
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sizeof(struct dvb_tuner_ops));
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fe->tuner_priv = priv;
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return fe;
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