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perf/x86/intel/pt: Export pt_cap_get()
pt_cap_get() is required by the upcoming PT support in KVM guests. Export it and move the capabilites enum to a global header. As a global functions, "pt_*" is already used for ptrace and other things, so it makes sense to use "intel_pt_*" as a prefix. Acked-by: Song Liu <songliubraving@fb.com> Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com> Signed-off-by: Luwei Kang <luwei.kang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
parent
887eda13b5
commit
f6d079ce86
3 changed files with 49 additions and 44 deletions
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@ -75,7 +75,7 @@ static struct pt_cap_desc {
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PT_CAP(psb_periods, 1, CPUID_EBX, 0xffff0000),
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PT_CAP(psb_periods, 1, CPUID_EBX, 0xffff0000),
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};
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};
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static u32 pt_cap_get(enum pt_capabilities cap)
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u32 intel_pt_validate_hw_cap(enum pt_capabilities cap)
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{
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{
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struct pt_cap_desc *cd = &pt_caps[cap];
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struct pt_cap_desc *cd = &pt_caps[cap];
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u32 c = pt_pmu.caps[cd->leaf * PT_CPUID_REGS_NUM + cd->reg];
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u32 c = pt_pmu.caps[cd->leaf * PT_CPUID_REGS_NUM + cd->reg];
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@ -83,6 +83,7 @@ static u32 pt_cap_get(enum pt_capabilities cap)
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return (c & cd->mask) >> shift;
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return (c & cd->mask) >> shift;
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}
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}
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EXPORT_SYMBOL_GPL(intel_pt_validate_hw_cap);
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static ssize_t pt_cap_show(struct device *cdev,
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static ssize_t pt_cap_show(struct device *cdev,
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struct device_attribute *attr,
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struct device_attribute *attr,
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@ -92,7 +93,7 @@ static ssize_t pt_cap_show(struct device *cdev,
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container_of(attr, struct dev_ext_attribute, attr);
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container_of(attr, struct dev_ext_attribute, attr);
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enum pt_capabilities cap = (long)ea->var;
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enum pt_capabilities cap = (long)ea->var;
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return snprintf(buf, PAGE_SIZE, "%x\n", pt_cap_get(cap));
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return snprintf(buf, PAGE_SIZE, "%x\n", intel_pt_validate_hw_cap(cap));
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}
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}
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static struct attribute_group pt_cap_group __ro_after_init = {
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static struct attribute_group pt_cap_group __ro_after_init = {
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@ -310,16 +311,16 @@ static bool pt_event_valid(struct perf_event *event)
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return false;
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return false;
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if (config & RTIT_CTL_CYC_PSB) {
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if (config & RTIT_CTL_CYC_PSB) {
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if (!pt_cap_get(PT_CAP_psb_cyc))
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if (!intel_pt_validate_hw_cap(PT_CAP_psb_cyc))
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return false;
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return false;
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allowed = pt_cap_get(PT_CAP_psb_periods);
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allowed = intel_pt_validate_hw_cap(PT_CAP_psb_periods);
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requested = (config & RTIT_CTL_PSB_FREQ) >>
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requested = (config & RTIT_CTL_PSB_FREQ) >>
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RTIT_CTL_PSB_FREQ_OFFSET;
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RTIT_CTL_PSB_FREQ_OFFSET;
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if (requested && (!(allowed & BIT(requested))))
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if (requested && (!(allowed & BIT(requested))))
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return false;
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return false;
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allowed = pt_cap_get(PT_CAP_cycle_thresholds);
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allowed = intel_pt_validate_hw_cap(PT_CAP_cycle_thresholds);
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requested = (config & RTIT_CTL_CYC_THRESH) >>
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requested = (config & RTIT_CTL_CYC_THRESH) >>
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RTIT_CTL_CYC_THRESH_OFFSET;
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RTIT_CTL_CYC_THRESH_OFFSET;
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if (requested && (!(allowed & BIT(requested))))
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if (requested && (!(allowed & BIT(requested))))
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@ -334,10 +335,10 @@ static bool pt_event_valid(struct perf_event *event)
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* Spec says that setting mtc period bits while mtc bit in
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* Spec says that setting mtc period bits while mtc bit in
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* CPUID is 0 will #GP, so better safe than sorry.
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* CPUID is 0 will #GP, so better safe than sorry.
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*/
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*/
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if (!pt_cap_get(PT_CAP_mtc))
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if (!intel_pt_validate_hw_cap(PT_CAP_mtc))
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return false;
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return false;
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allowed = pt_cap_get(PT_CAP_mtc_periods);
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allowed = intel_pt_validate_hw_cap(PT_CAP_mtc_periods);
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if (!allowed)
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if (!allowed)
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return false;
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return false;
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@ -349,11 +350,11 @@ static bool pt_event_valid(struct perf_event *event)
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}
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}
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if (config & RTIT_CTL_PWR_EVT_EN &&
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if (config & RTIT_CTL_PWR_EVT_EN &&
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!pt_cap_get(PT_CAP_power_event_trace))
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!intel_pt_validate_hw_cap(PT_CAP_power_event_trace))
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return false;
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return false;
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if (config & RTIT_CTL_PTW) {
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if (config & RTIT_CTL_PTW) {
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if (!pt_cap_get(PT_CAP_ptwrite))
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if (!intel_pt_validate_hw_cap(PT_CAP_ptwrite))
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return false;
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return false;
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/* FUPonPTW without PTW doesn't make sense */
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/* FUPonPTW without PTW doesn't make sense */
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@ -598,7 +599,7 @@ static struct topa *topa_alloc(int cpu, gfp_t gfp)
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* In case of singe-entry ToPA, always put the self-referencing END
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* In case of singe-entry ToPA, always put the self-referencing END
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* link as the 2nd entry in the table
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* link as the 2nd entry in the table
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*/
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*/
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if (!pt_cap_get(PT_CAP_topa_multiple_entries)) {
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if (!intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries)) {
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TOPA_ENTRY(topa, 1)->base = topa->phys >> TOPA_SHIFT;
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TOPA_ENTRY(topa, 1)->base = topa->phys >> TOPA_SHIFT;
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TOPA_ENTRY(topa, 1)->end = 1;
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TOPA_ENTRY(topa, 1)->end = 1;
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}
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}
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@ -638,7 +639,7 @@ static void topa_insert_table(struct pt_buffer *buf, struct topa *topa)
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topa->offset = last->offset + last->size;
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topa->offset = last->offset + last->size;
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buf->last = topa;
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buf->last = topa;
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if (!pt_cap_get(PT_CAP_topa_multiple_entries))
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if (!intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries))
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return;
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return;
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BUG_ON(last->last != TENTS_PER_PAGE - 1);
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BUG_ON(last->last != TENTS_PER_PAGE - 1);
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@ -654,7 +655,7 @@ static void topa_insert_table(struct pt_buffer *buf, struct topa *topa)
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static bool topa_table_full(struct topa *topa)
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static bool topa_table_full(struct topa *topa)
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{
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{
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/* single-entry ToPA is a special case */
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/* single-entry ToPA is a special case */
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if (!pt_cap_get(PT_CAP_topa_multiple_entries))
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if (!intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries))
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return !!topa->last;
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return !!topa->last;
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return topa->last == TENTS_PER_PAGE - 1;
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return topa->last == TENTS_PER_PAGE - 1;
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@ -690,7 +691,8 @@ static int topa_insert_pages(struct pt_buffer *buf, gfp_t gfp)
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TOPA_ENTRY(topa, -1)->base = page_to_phys(p) >> TOPA_SHIFT;
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TOPA_ENTRY(topa, -1)->base = page_to_phys(p) >> TOPA_SHIFT;
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TOPA_ENTRY(topa, -1)->size = order;
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TOPA_ENTRY(topa, -1)->size = order;
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if (!buf->snapshot && !pt_cap_get(PT_CAP_topa_multiple_entries)) {
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if (!buf->snapshot &&
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!intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries)) {
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TOPA_ENTRY(topa, -1)->intr = 1;
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TOPA_ENTRY(topa, -1)->intr = 1;
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TOPA_ENTRY(topa, -1)->stop = 1;
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TOPA_ENTRY(topa, -1)->stop = 1;
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}
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}
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@ -725,7 +727,7 @@ static void pt_topa_dump(struct pt_buffer *buf)
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topa->table[i].intr ? 'I' : ' ',
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topa->table[i].intr ? 'I' : ' ',
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topa->table[i].stop ? 'S' : ' ',
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topa->table[i].stop ? 'S' : ' ',
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*(u64 *)&topa->table[i]);
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*(u64 *)&topa->table[i]);
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if ((pt_cap_get(PT_CAP_topa_multiple_entries) &&
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if ((intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries) &&
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topa->table[i].stop) ||
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topa->table[i].stop) ||
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topa->table[i].end)
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topa->table[i].end)
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break;
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break;
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@ -828,7 +830,7 @@ static void pt_handle_status(struct pt *pt)
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* means we are already losing data; need to let the decoder
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* means we are already losing data; need to let the decoder
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* know.
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* know.
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*/
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*/
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if (!pt_cap_get(PT_CAP_topa_multiple_entries) ||
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if (!intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries) ||
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buf->output_off == sizes(TOPA_ENTRY(buf->cur, buf->cur_idx)->size)) {
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buf->output_off == sizes(TOPA_ENTRY(buf->cur, buf->cur_idx)->size)) {
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perf_aux_output_flag(&pt->handle,
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perf_aux_output_flag(&pt->handle,
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PERF_AUX_FLAG_TRUNCATED);
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PERF_AUX_FLAG_TRUNCATED);
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@ -840,7 +842,8 @@ static void pt_handle_status(struct pt *pt)
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* Also on single-entry ToPA implementations, interrupt will come
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* Also on single-entry ToPA implementations, interrupt will come
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* before the output reaches its output region's boundary.
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* before the output reaches its output region's boundary.
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*/
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*/
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if (!pt_cap_get(PT_CAP_topa_multiple_entries) && !buf->snapshot &&
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if (!intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries) &&
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!buf->snapshot &&
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pt_buffer_region_size(buf) - buf->output_off <= TOPA_PMI_MARGIN) {
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pt_buffer_region_size(buf) - buf->output_off <= TOPA_PMI_MARGIN) {
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void *head = pt_buffer_region(buf);
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void *head = pt_buffer_region(buf);
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@ -931,7 +934,7 @@ static int pt_buffer_reset_markers(struct pt_buffer *buf,
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/* single entry ToPA is handled by marking all regions STOP=1 INT=1 */
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/* single entry ToPA is handled by marking all regions STOP=1 INT=1 */
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if (!pt_cap_get(PT_CAP_topa_multiple_entries))
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if (!intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries))
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return 0;
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return 0;
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/* clear STOP and INT from current entry */
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/* clear STOP and INT from current entry */
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@ -1082,7 +1085,7 @@ static int pt_buffer_init_topa(struct pt_buffer *buf, unsigned long nr_pages,
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pt_buffer_setup_topa_index(buf);
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pt_buffer_setup_topa_index(buf);
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/* link last table to the first one, unless we're double buffering */
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/* link last table to the first one, unless we're double buffering */
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if (pt_cap_get(PT_CAP_topa_multiple_entries)) {
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if (intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries)) {
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TOPA_ENTRY(buf->last, -1)->base = buf->first->phys >> TOPA_SHIFT;
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TOPA_ENTRY(buf->last, -1)->base = buf->first->phys >> TOPA_SHIFT;
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TOPA_ENTRY(buf->last, -1)->end = 1;
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TOPA_ENTRY(buf->last, -1)->end = 1;
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}
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}
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@ -1153,7 +1156,7 @@ static int pt_addr_filters_init(struct perf_event *event)
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struct pt_filters *filters;
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struct pt_filters *filters;
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int node = event->cpu == -1 ? -1 : cpu_to_node(event->cpu);
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int node = event->cpu == -1 ? -1 : cpu_to_node(event->cpu);
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if (!pt_cap_get(PT_CAP_num_address_ranges))
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if (!intel_pt_validate_hw_cap(PT_CAP_num_address_ranges))
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return 0;
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return 0;
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filters = kzalloc_node(sizeof(struct pt_filters), GFP_KERNEL, node);
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filters = kzalloc_node(sizeof(struct pt_filters), GFP_KERNEL, node);
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@ -1202,7 +1205,7 @@ static int pt_event_addr_filters_validate(struct list_head *filters)
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return -EINVAL;
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return -EINVAL;
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}
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}
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if (++range > pt_cap_get(PT_CAP_num_address_ranges))
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if (++range > intel_pt_validate_hw_cap(PT_CAP_num_address_ranges))
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return -EOPNOTSUPP;
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return -EOPNOTSUPP;
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}
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}
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@ -1507,12 +1510,12 @@ static __init int pt_init(void)
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if (ret)
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if (ret)
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return ret;
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return ret;
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if (!pt_cap_get(PT_CAP_topa_output)) {
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if (!intel_pt_validate_hw_cap(PT_CAP_topa_output)) {
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pr_warn("ToPA output is not supported on this CPU\n");
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pr_warn("ToPA output is not supported on this CPU\n");
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return -ENODEV;
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return -ENODEV;
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}
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}
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if (!pt_cap_get(PT_CAP_topa_multiple_entries))
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if (!intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries))
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pt_pmu.pmu.capabilities =
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pt_pmu.pmu.capabilities =
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PERF_PMU_CAP_AUX_NO_SG | PERF_PMU_CAP_AUX_SW_DOUBLEBUF;
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PERF_PMU_CAP_AUX_NO_SG | PERF_PMU_CAP_AUX_SW_DOUBLEBUF;
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@ -1530,7 +1533,7 @@ static __init int pt_init(void)
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pt_pmu.pmu.addr_filters_sync = pt_event_addr_filters_sync;
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pt_pmu.pmu.addr_filters_sync = pt_event_addr_filters_sync;
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pt_pmu.pmu.addr_filters_validate = pt_event_addr_filters_validate;
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pt_pmu.pmu.addr_filters_validate = pt_event_addr_filters_validate;
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pt_pmu.pmu.nr_addr_filters =
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pt_pmu.pmu.nr_addr_filters =
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pt_cap_get(PT_CAP_num_address_ranges);
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intel_pt_validate_hw_cap(PT_CAP_num_address_ranges);
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ret = perf_pmu_register(&pt_pmu.pmu, "intel_pt", -1);
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ret = perf_pmu_register(&pt_pmu.pmu, "intel_pt", -1);
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@ -45,30 +45,9 @@ struct topa_entry {
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u64 rsvd4 : 16;
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u64 rsvd4 : 16;
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};
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};
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#define PT_CPUID_LEAVES 2
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#define PT_CPUID_REGS_NUM 4 /* number of regsters (eax, ebx, ecx, edx) */
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/* TSC to Core Crystal Clock Ratio */
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/* TSC to Core Crystal Clock Ratio */
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#define CPUID_TSC_LEAF 0x15
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#define CPUID_TSC_LEAF 0x15
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enum pt_capabilities {
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PT_CAP_max_subleaf = 0,
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PT_CAP_cr3_filtering,
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PT_CAP_psb_cyc,
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PT_CAP_ip_filtering,
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PT_CAP_mtc,
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PT_CAP_ptwrite,
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PT_CAP_power_event_trace,
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PT_CAP_topa_output,
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PT_CAP_topa_multiple_entries,
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PT_CAP_single_range_output,
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PT_CAP_payloads_lip,
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PT_CAP_num_address_ranges,
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PT_CAP_mtc_periods,
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PT_CAP_cycle_thresholds,
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PT_CAP_psb_periods,
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};
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struct pt_pmu {
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struct pt_pmu {
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struct pmu pmu;
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struct pmu pmu;
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u32 caps[PT_CPUID_REGS_NUM * PT_CPUID_LEAVES];
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u32 caps[PT_CPUID_REGS_NUM * PT_CPUID_LEAVES];
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@ -2,10 +2,33 @@
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#ifndef _ASM_X86_INTEL_PT_H
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#ifndef _ASM_X86_INTEL_PT_H
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#define _ASM_X86_INTEL_PT_H
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#define _ASM_X86_INTEL_PT_H
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#define PT_CPUID_LEAVES 2
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#define PT_CPUID_REGS_NUM 4 /* number of regsters (eax, ebx, ecx, edx) */
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enum pt_capabilities {
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PT_CAP_max_subleaf = 0,
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PT_CAP_cr3_filtering,
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PT_CAP_psb_cyc,
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PT_CAP_ip_filtering,
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PT_CAP_mtc,
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PT_CAP_ptwrite,
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PT_CAP_power_event_trace,
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PT_CAP_topa_output,
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PT_CAP_topa_multiple_entries,
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PT_CAP_single_range_output,
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PT_CAP_payloads_lip,
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PT_CAP_num_address_ranges,
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PT_CAP_mtc_periods,
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PT_CAP_cycle_thresholds,
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PT_CAP_psb_periods,
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};
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#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL)
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#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL)
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void cpu_emergency_stop_pt(void);
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void cpu_emergency_stop_pt(void);
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extern u32 intel_pt_validate_hw_cap(enum pt_capabilities cap);
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#else
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#else
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static inline void cpu_emergency_stop_pt(void) {}
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static inline void cpu_emergency_stop_pt(void) {}
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static inline u32 intel_pt_validate_hw_cap(enum pt_capabilities cap) { return 0; }
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#endif
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#endif
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#endif /* _ASM_X86_INTEL_PT_H */
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#endif /* _ASM_X86_INTEL_PT_H */
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