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smsc911x: Adding support for Micochip LAN9250 Ethernet controller
Adding support for Microchip LAN9250 Ethernet controller. Signed-off-by: David Cai <david.cai@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
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8b8e3ad0c8
commit
f6fec61eb5
2 changed files with 49 additions and 19 deletions
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@ -25,7 +25,7 @@
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* LAN9215, LAN9216, LAN9217, LAN9218
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* LAN9215, LAN9216, LAN9217, LAN9218
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* LAN9210, LAN9211
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* LAN9210, LAN9211
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* LAN9220, LAN9221
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* LAN9220, LAN9221
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* LAN89218
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* LAN89218,LAN9250
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*
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*
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*/
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*/
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@ -1450,6 +1450,8 @@ static int smsc911x_soft_reset(struct smsc911x_data *pdata)
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unsigned int timeout;
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unsigned int timeout;
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unsigned int temp;
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unsigned int temp;
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int ret;
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int ret;
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unsigned int reset_offset = HW_CFG;
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unsigned int reset_mask = HW_CFG_SRST_;
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/*
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/*
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* Make sure to power-up the PHY chip before doing a reset, otherwise
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* Make sure to power-up the PHY chip before doing a reset, otherwise
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@ -1476,15 +1478,23 @@ static int smsc911x_soft_reset(struct smsc911x_data *pdata)
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}
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}
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}
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}
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if ((pdata->idrev & 0xFFFF0000) == LAN9250) {
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/* special reset for LAN9250 */
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reset_offset = RESET_CTL;
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reset_mask = RESET_CTL_DIGITAL_RST_;
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}
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/* Reset the LAN911x */
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/* Reset the LAN911x */
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smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
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smsc911x_reg_write(pdata, reset_offset, reset_mask);
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/* verify reset bit is cleared */
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timeout = 10;
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timeout = 10;
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do {
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do {
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udelay(10);
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udelay(10);
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temp = smsc911x_reg_read(pdata, HW_CFG);
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temp = smsc911x_reg_read(pdata, reset_offset);
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} while ((--timeout) && (temp & HW_CFG_SRST_));
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} while ((--timeout) && (temp & reset_mask));
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if (unlikely(temp & HW_CFG_SRST_)) {
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if (unlikely(temp & reset_mask)) {
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SMSC_WARN(pdata, drv, "Failed to complete reset");
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SMSC_WARN(pdata, drv, "Failed to complete reset");
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return -EIO;
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return -EIO;
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}
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}
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@ -2253,28 +2263,29 @@ static int smsc911x_init(struct net_device *dev)
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pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
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pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
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switch (pdata->idrev & 0xFFFF0000) {
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switch (pdata->idrev & 0xFFFF0000) {
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case 0x01180000:
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case LAN9118:
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case 0x01170000:
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case LAN9117:
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case 0x01160000:
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case LAN9116:
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case 0x01150000:
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case LAN9115:
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case 0x218A0000:
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case LAN89218:
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/* LAN911[5678] family */
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/* LAN911[5678] family */
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pdata->generation = pdata->idrev & 0x0000FFFF;
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pdata->generation = pdata->idrev & 0x0000FFFF;
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break;
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break;
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case 0x118A0000:
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case LAN9218:
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case 0x117A0000:
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case LAN9217:
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case 0x116A0000:
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case LAN9216:
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case 0x115A0000:
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case LAN9215:
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/* LAN921[5678] family */
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/* LAN921[5678] family */
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pdata->generation = 3;
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pdata->generation = 3;
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break;
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break;
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case 0x92100000:
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case LAN9210:
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case 0x92110000:
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case LAN9211:
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case 0x92200000:
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case LAN9220:
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case 0x92210000:
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case LAN9221:
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/* LAN9210/LAN9211/LAN9220/LAN9221 */
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case LAN9250:
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/* LAN9210/LAN9211/LAN9220/LAN9221/LAN9250 */
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pdata->generation = 4;
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pdata->generation = 4;
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break;
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break;
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@ -20,6 +20,22 @@
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#ifndef __SMSC911X_H__
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#ifndef __SMSC911X_H__
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#define __SMSC911X_H__
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#define __SMSC911X_H__
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/*Chip ID*/
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#define LAN9115 0x01150000
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#define LAN9116 0x01160000
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#define LAN9117 0x01170000
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#define LAN9118 0x01180000
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#define LAN9215 0x115A0000
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#define LAN9216 0x116A0000
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#define LAN9217 0x117A0000
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#define LAN9218 0x118A0000
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#define LAN9210 0x92100000
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#define LAN9211 0x92110000
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#define LAN9220 0x92200000
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#define LAN9221 0x92210000
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#define LAN9250 0x92500000
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#define LAN89218 0x218A0000
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#define TX_FIFO_LOW_THRESHOLD ((u32)1600)
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#define TX_FIFO_LOW_THRESHOLD ((u32)1600)
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#define SMSC911X_EEPROM_SIZE ((u32)128)
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#define SMSC911X_EEPROM_SIZE ((u32)128)
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#define USE_DEBUG 0
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#define USE_DEBUG 0
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@ -303,6 +319,9 @@
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#define E2P_DATA_EEPROM_DATA_ 0x000000FF
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#define E2P_DATA_EEPROM_DATA_ 0x000000FF
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#define LAN_REGISTER_EXTENT 0x00000100
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#define LAN_REGISTER_EXTENT 0x00000100
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#define RESET_CTL 0x1F8
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#define RESET_CTL_DIGITAL_RST_ 0x00000001
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/*
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/*
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* MAC Control and Status Register (Indirect Address)
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* MAC Control and Status Register (Indirect Address)
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* Offset (through the MAC_CSR CMD and DATA port)
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* Offset (through the MAC_CSR CMD and DATA port)
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