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ARM: zynq: dt: Clean up device tree

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- Use generic node names
 - Fix up some weird formatting and white spaces
 - Update copyright info

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
This commit is contained in:
Soren Brinkmann 2014-05-05 10:16:08 -07:00 committed by Michal Simek
parent f8e3e4d15c
commit f7b1e9b5bc
1 changed files with 15 additions and 14 deletions
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29
arch/arm/boot/dts/zynq-7000.dtsi
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@ -1,5 +1,5 @@
/*
* Copyright (C) 2011 Xilinx
* Copyright (C) 2011 - 2014 Xilinx
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@ -55,7 +55,7 @@ amba {
interrupt-parent = <&intc>;
ranges;
i2c0: zynq-i2c@e0004000 {
i2c0: i2c@e0004000 {
compatible = "cdns,i2c-r1p10";
status = "disabled";
clocks = <&clkc 38>;
@ -66,7 +66,7 @@ i2c0: zynq-i2c@e0004000 {
#size-cells = <0>;
};
i2c1: zynq-i2c@e0005000 {
i2c1: i2c@e0005000 {
compatible = "cdns,i2c-r1p10";
status = "disabled";
clocks = <&clkc 39>;
@ -94,7 +94,7 @@ L2: cache-controller {
cache-level = <2>;
};
uart0: uart@e0000000 {
uart0: serial@e0000000 {
compatible = "xlnx,xuartps";
status = "disabled";
clocks = <&clkc 23>, <&clkc 40>;
@ -103,7 +103,7 @@ uart0: uart@e0000000 {
interrupts = <0 27 4>;
};
uart1: uart@e0001000 {
uart1: serial@e0001000 {
compatible = "xlnx,xuartps";
status = "disabled";
clocks = <&clkc 24>, <&clkc 41>;
@ -130,7 +130,7 @@ gem1: ethernet@e000c000 {
clock-names = "pclk", "hclk", "tx_clk";
};
sdhci0: ps7-sdhci@e0100000 {
sdhci0: sdhci@e0100000 {
compatible = "arasan,sdhci-8.9a";
status = "disabled";
clock-names = "clk_xin", "clk_ahb";
@ -140,7 +140,7 @@ sdhci0: ps7-sdhci@e0100000 {
reg = <0xe0100000 0x1000>;
} ;
sdhci1: ps7-sdhci@e0101000 {
sdhci1: sdhci@e0101000 {
compatible = "arasan,sdhci-8.9a";
status = "disabled";
clock-names = "clk_xin", "clk_ahb";
@ -184,26 +184,27 @@ global_timer: timer@f8f00200 {
clocks = <&clkc 4>;
};
ttc0: ttc0@f8001000 {
ttc0: timer@f8001000 {
interrupt-parent = <&intc>;
interrupts = < 0 10 4 0 11 4 0 12 4 >;
interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
compatible = "cdns,ttc";
clocks = <&clkc 6>;
reg = <0xF8001000 0x1000>;
};
ttc1: ttc1@f8002000 {
ttc1: timer@f8002000 {
interrupt-parent = <&intc>;
interrupts = < 0 37 4 0 38 4 0 39 4 >;
interrupts = <0 37 4>, <0 38 4>, <0 39 4>;
compatible = "cdns,ttc";
clocks = <&clkc 6>;
reg = <0xF8002000 0x1000>;
};
scutimer: scutimer@f8f00600 {
scutimer: timer@f8f00600 {
interrupt-parent = <&intc>;
interrupts = < 1 13 0x301 >;
interrupts = <1 13 0x301>;
compatible = "arm,cortex-a9-twd-timer";
reg = < 0xf8f00600 0x20 >;
reg = <0xf8f00600 0x20>;
clocks = <&clkc 4>;
} ;
};