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Merge branch 'mstar-dt-next' of https://github.com/linux-chenxing/linux into arm/dt 

* 'mstar-dt-next' of https://github.com/linux-chenxing/linux:
  ARM: mstar: Extend opp_table for infinity2m
  ARM: mstar: Add OPP table for infinity3
  ARM: mstar: Add OPP table for infinity
  ARM: mstar: Link cpupll to second core
  ARM: mstar: Link cpupll to cpu
  ARM: mstar: Add cpupll to base dtsi
  dt-bindings: clk: mstar msc313 cpupll binding description
  ARM: dts: mstar: Add board for 100ask DongShanPiOne
  dt-bindings: arm: mstar: Add compatible for 100ask DongShanPiOne
  dt-bindings: vendor-prefixes: Add prefix for 100ask
  ARM: dts: mstar: Add a dts for Miyoo Mini
  dt-bindings: arm: mstar: Add compatible for Miyoo Mini
  dt-bindings: vendor-prefixes: Add prefix for Miyoo
  ARM: dts: mstar: Add the Wireless Tag IDO-SBC2D06-V1B-22W
  dt-bindings: add vendor prefix for Wireless Tag
  ARM: dts: mstar: Set gpio compatible for ssd20xd

Link: https://lore.kernel.org/r/20220216193131.59794-1-romain.perier@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-02-25 15:51:12 +01:00
parent 21ed2f61cc 344118c3ee
commit f7bc3bc5d3
No known key found for this signature in database
GPG Key ID: 9A6C79EFE60018D9
14 changed files with 302 additions and 0 deletions
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4
Documentation/devicetree/bindings/arm/mstar/mstar.yaml
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@ -23,8 +23,12 @@ properties:
- description: infinity2m boards
items:
- enum:
- 100ask,dongshanpione # 100ask DongShanPiOne
- honestar,ssd201htv2 # Honestar SSD201_HT_V2 devkit
- m5stack,unitv2 # M5Stack UnitV2
- miyoo,miyoo-mini # Miyoo Mini
- wirelesstag,ido-som2d01 # Wireless Tag IDO-SOM2D01
- wirelesstag,ido-sbc2d06-v1b-22w # Wireless Tag IDO-SBC2D06-1VB-22W
- const: mstar,infinity2m
- description: infinity3 boards

45
Documentation/devicetree/bindings/clock/mstar,msc313-cpupll.yaml Normal file
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@ -0,0 +1,45 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/mstar,msc313-cpupll.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MStar/Sigmastar MSC313 CPU PLL
maintainers:
- Daniel Palmer <daniel@thingy.jp>
description: |
The MStar/SigmaStar MSC313 and later ARMv7 chips have a scalable
PLL that can be used as the clock source for the CPU(s).
properties:
compatible:
const: mstar,msc313-cpupll
"#clock-cells":
const: 1
clocks:
maxItems: 1
reg:
maxItems: 1
required:
- compatible
- "#clock-cells"
- clocks
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/mstar-msc313-mpll.h>
cpupll: cpupll@206400 {
compatible = "mstar,msc313-cpupll";
reg = <0x206400 0x200>;
#clock-cells = <1>;
clocks = <&mpll MSTAR_MSC313_MPLL_DIV2>;
};

6
Documentation/devicetree/bindings/vendor-prefixes.yaml
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@ -23,6 +23,8 @@ patternProperties:
"^(simple-audio-card|st-plgpio|st-spics|ts),.*": true
# Keep list in alphabetical order.
"^100ask,.*":
description: Baiwen.com (100ask).
"^70mai,.*":
description: 70mai Co., Ltd.
"^8dev,.*":
@ -769,6 +771,8 @@ patternProperties:
description: MiraMEMS Sensing Technology Co., Ltd.
"^mitsubishi,.*":
description: Mitsubishi Electric Corporation
"^miyoo,.*":
description: Miyoo
"^mntre,.*":
description: MNT Research GmbH
"^modtronix,.*":
@ -1350,6 +1354,8 @@ patternProperties:
description: WinLink Co., Ltd
"^winstar,.*":
description: Winstar Display Corp.
"^wirelesstag,.*":
description: Wireless Tag (qiming yunduan)
"^wits,.*":
description: Shenzhen Merrii Technology Co., Ltd. (WITS)
"^wlf,.*":

3
arch/arm/boot/dts/Makefile
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@ -1494,6 +1494,9 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
dtb-$(CONFIG_ARCH_MILBEAUT) += milbeaut-m10v-evb.dtb
dtb-$(CONFIG_ARCH_MSTARV7) += \
mstar-infinity-msc313-breadbee_crust.dtb \
mstar-infinity2m-ssd202d-100ask-dongshanpione.dtb \
mstar-infinity2m-ssd202d-miyoo-mini.dtb \
mstar-infinity2m-ssd202d-wirelesstag-ido-sbc2d06-v1b-22w.dtb \
mstar-infinity2m-ssd202d-ssd201htv2.dtb \
mstar-infinity2m-ssd202d-unitv2.dtb \
mstar-infinity3-msc313e-breadbee.dtb \

34
arch/arm/boot/dts/mstar-infinity.dtsi
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@ -8,6 +8,40 @@
#include <dt-bindings/gpio/msc313-gpio.h>
/ {
cpu0_opp_table: opp_table0 {
compatible = "operating-points-v2";
opp-shared;
opp-240000000 {
opp-hz = /bits/ 64 <240000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <300000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <300000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <300000>;
};
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <300000>;
};
};
};
&cpu0 {
operating-points-v2 = <&cpu0_opp_table>;
};
&imi {
reg = <0xa0000000 0x16000>;
};

20
arch/arm/boot/dts/mstar-infinity2m-ssd201-som2d01.dtsi Normal file
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@ -0,0 +1,20 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2021 thingy.jp.
* Author: Daniel Palmer <daniel@thingy.jp>
* Author: Romain Perier <romain.perier@gmail.com>
*/
/ {
reg_vcc_dram: regulator-vcc-dram {
compatible = "regulator-fixed";
regulator-name = "vcc_dram";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
};
};
&pm_uart {
status = "okay";
};

25
arch/arm/boot/dts/mstar-infinity2m-ssd202d-100ask-dongshanpione.dts Normal file
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@ -0,0 +1,25 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2021 thingy.jp.
* Author: Daniel Palmer <daniel@thingy.jp>
*/
/dts-v1/;
#include "mstar-infinity2m-ssd202d.dtsi"
/ {
model = "DongShanPi One";
compatible = "100ask,dongshanpione", "mstar,infinity2m";
aliases {
serial0 = &pm_uart;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&pm_uart {
status = "okay";
};

25
arch/arm/boot/dts/mstar-infinity2m-ssd202d-miyoo-mini.dts Normal file
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@ -0,0 +1,25 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2021 thingy.jp.
* Author: Daniel Palmer <daniel@thingy.jp>
*/
/dts-v1/;
#include "mstar-infinity2m-ssd202d.dtsi"
/ {
model = "Miyoo Mini";
compatible = "miyoo,miyoo-mini", "mstar,infinity2m";
aliases {
serial0 = &pm_uart;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&pm_uart {
status = "okay";
};

23
arch/arm/boot/dts/mstar-infinity2m-ssd202d-wirelesstag-ido-sbc2d06-v1b-22w.dts Normal file
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@ -0,0 +1,23 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2021 thingy.jp.
* Author: Daniel Palmer <daniel@thingy.jp>
* Author: Romain Perier <romain.perier@gmail.com>
*/
/dts-v1/;
#include "mstar-infinity2m-ssd202d-wirelesstag-ido-som2d01.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Wireless Tag IDO-SBC2D06-1VB-22W";
compatible = "wirelesstag,ido-sbc2d06-v1b-22w", "mstar,infinity2m";
leds {
compatible = "gpio-leds";
sys_led {
gpios = <&gpio SSD20XD_GPIO_GPIO85 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
};
};

28
arch/arm/boot/dts/mstar-infinity2m-ssd202d-wirelesstag-ido-som2d01.dtsi Normal file
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@ -0,0 +1,28 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2021 thingy.jp.
* Author: Daniel Palmer <daniel@thingy.jp>
* Author: Romain Perier <romain.perier@gmail.com>
*/
/dts-v1/;
#include "mstar-infinity2m-ssd202d.dtsi"
#include "mstar-infinity2m-ssd201-som2d01.dtsi"
/ {
model = "Wireless Tag IDO-SOM2D01 (SSD202D)";
compatible = "wirelesstag,ido-som2d01", "mstar,infinity2m";
aliases {
serial0 = &pm_uart;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&reg_vcc_dram {
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
};

5
arch/arm/boot/dts/mstar-infinity2m-ssd20xd.dtsi
View File

@ -6,6 +6,11 @@
#include "mstar-infinity2m.dtsi"
&gpio {
compatible = "sstar,ssd20xd-gpio";
status = "okay";
};
&smpctrl {
compatible = "sstar,ssd201-smpctrl", "mstar,smpctrl";
status = "okay";

17
arch/arm/boot/dts/mstar-infinity2m.dtsi
View File

@ -6,11 +6,28 @@
#include "mstar-infinity.dtsi"
&cpu0_opp_table {
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <300000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <300000>;
};
};
&cpus {
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a7";
operating-points-v2 = <&cpu0_opp_table>;
reg = <0x1>;
clocks = <&cpupll>;
clock-names = "cpuclk";
};
};

58
arch/arm/boot/dts/mstar-infinity3.dtsi
View File

@ -6,6 +6,64 @@
#include "mstar-infinity.dtsi"
&cpu0_opp_table {
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <300000>;
};
// overclock frequencies below, shown to work fine up to 1.3 GHz
opp-108000000 {
opp-hz = /bits/ 64 <1080000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <300000>;
turbo-mode;
};
opp-1188000000 {
opp-hz = /bits/ 64 <1188000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <300000>;
turbo-mode;
};
opp-1296000000 {
opp-hz = /bits/ 64 <1296000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <300000>;
turbo-mode;
};
opp-1350000000 {
opp-hz = /bits/ 64 <1350000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <300000>;
turbo-mode;
};
opp-1404000000 {
opp-hz = /bits/ 64 <1404000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <300000>;
turbo-mode;
};
opp-1458000000 {
opp-hz = /bits/ 64 <1458000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <300000>;
turbo-mode;
};
opp-1512000000 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <1000000>;
clock-latency-ns = <300000>;
turbo-mode;
};
};
&imi {
reg = <0xa0000000 0x20000>;
};

9
arch/arm/boot/dts/mstar-v7.dtsi
View File

@ -21,6 +21,8 @@
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x0>;
clocks = <&cpupll>;
clock-names = "cpuclk";
};
};
@ -155,6 +157,13 @@
clocks = <&xtal>;
};
cpupll: cpupll@206400 {
compatible = "mstar,msc313-cpupll";
reg = <0x206400 0x200>;
#clock-cells = <0>;
clocks = <&mpll MSTAR_MSC313_MPLL_DIV2>;
};
gpio: gpio@207800 {
#gpio-cells = <2>;
reg = <0x207800 0x200>;