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drm/tegra: dsi - Use internal pixel format

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The pixel format enumeration values used by the Tegra DSI controller
don't match those defined by the DSI framework. Make sure to convert
them to the internal format before writing it to the register.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2014-03-13 08:50:39 +01:00
parent 7e2464304b
commit f7d6889b79
2 changed files with 43 additions and 1 deletions
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34
drivers/gpu/drm/tegra/dsi.c
View file

@ -361,6 +361,33 @@ static int tegra_dsi_get_muldiv(enum mipi_dsi_pixel_format format,
return 0;
}
static int tegra_dsi_get_format(enum mipi_dsi_pixel_format format,
enum tegra_dsi_format *fmt)
{
switch (format) {
case MIPI_DSI_FMT_RGB888:
*fmt = TEGRA_DSI_FORMAT_24P;
break;
case MIPI_DSI_FMT_RGB666:
*fmt = TEGRA_DSI_FORMAT_18NP;
break;
case MIPI_DSI_FMT_RGB666_PACKED:
*fmt = TEGRA_DSI_FORMAT_18P;
break;
case MIPI_DSI_FMT_RGB565:
*fmt = TEGRA_DSI_FORMAT_16P;
break;
default:
return -EINVAL;
}
return 0;
}
static int tegra_output_dsi_enable(struct tegra_output *output)
{
struct tegra_dc *dc = to_tegra_dc(output->encoder.crtc);
@ -369,6 +396,7 @@ static int tegra_output_dsi_enable(struct tegra_output *output)
struct tegra_dsi *dsi = to_dsi(output);
/* FIXME: don't hardcode this */
const u32 *pkt_seq = pkt_seq_vnb_syne;
enum tegra_dsi_format format;
unsigned long value;
int err;
@ -376,13 +404,17 @@ static int tegra_output_dsi_enable(struct tegra_output *output)
if (err < 0)
return err;
err = tegra_dsi_get_format(dsi->format, &format);
if (err < 0)
return err;
err = clk_enable(dsi->clk);
if (err < 0)
return err;
reset_control_deassert(dsi->rst);
value = DSI_CONTROL_CHANNEL(0) | DSI_CONTROL_FORMAT(dsi->format) |
value = DSI_CONTROL_CHANNEL(0) | DSI_CONTROL_FORMAT(format) |
DSI_CONTROL_LANES(dsi->lanes - 1) |
DSI_CONTROL_SOURCE(dc->pipe);
tegra_dsi_writel(dsi, value, DSI_CONTROL);

10
drivers/gpu/drm/tegra/dsi.h
View file

@ -117,4 +117,14 @@
#define DSI_INIT_SEQ_DATA_14 0x5e
#define DSI_INIT_SEQ_DATA_15 0x5f
/*
* pixel format as used in the DSI_CONTROL_FORMAT field
*/
enum tegra_dsi_format {
TEGRA_DSI_FORMAT_16P,
TEGRA_DSI_FORMAT_18NP,
TEGRA_DSI_FORMAT_18P,
TEGRA_DSI_FORMAT_24P,
};
#endif