mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-12 05:48:40 +00:00
iommu/arm-smmu: Refactor mmu-masters handling
To be able to support the generic bindings and handle of_xlate() calls, we need to be able to associate SMMUs and stream IDs directly with devices *before* allocating IOMMU groups. Furthermore, to support real default domains with multi-device groups we also have to handle domain attach on a per-device basis, as the "whole group at a time" assumption fails to properly handle subsequent devices added to a group after the first has already triggered default domain creation and attachment. To that end, use the now-vacant dev->archdata.iommu field for easy config and SMMU instance lookup, and unify config management by chopping down the platform-device-specific tree and probing the "mmu-masters" property on-demand instead. This may add a bit of one-off overhead to initially adding a new device, but we're about to deprecate that binding in favour of the inherently-more-efficient generic ones anyway. For the sake of simplicity, this patch does temporarily regress the case of aliasing PCI devices by losing the duplicate stream ID detection that the previous per-group config had. Stay tuned, because we'll be back to fix that in a better and more general way momentarily... Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
This commit is contained in:
parent
8e8b203eab
commit
f80cd885fc
1 changed files with 107 additions and 275 deletions
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@ -317,18 +317,13 @@ struct arm_smmu_smr {
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};
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struct arm_smmu_master_cfg {
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struct arm_smmu_device *smmu;
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int num_streamids;
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u16 streamids[MAX_MASTER_STREAMIDS];
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s16 smendx[MAX_MASTER_STREAMIDS];
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};
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#define INVALID_SMENDX -1
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struct arm_smmu_master {
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struct device_node *of_node;
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struct rb_node node;
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struct arm_smmu_master_cfg cfg;
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};
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struct arm_smmu_device {
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struct device *dev;
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@ -376,7 +371,6 @@ struct arm_smmu_device {
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unsigned int *irqs;
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struct list_head list;
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struct rb_root masters;
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u32 cavium_id_base; /* Specific to Cavium */
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};
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@ -415,12 +409,6 @@ struct arm_smmu_domain {
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struct iommu_domain domain;
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};
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struct arm_smmu_phandle_args {
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struct device_node *np;
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int args_count;
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uint32_t args[MAX_MASTER_STREAMIDS];
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};
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static DEFINE_SPINLOCK(arm_smmu_devices_lock);
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static LIST_HEAD(arm_smmu_devices);
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@ -462,132 +450,89 @@ static struct device_node *dev_get_dev_node(struct device *dev)
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while (!pci_is_root_bus(bus))
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bus = bus->parent;
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return bus->bridge->parent->of_node;
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return of_node_get(bus->bridge->parent->of_node);
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}
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return dev->of_node;
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return of_node_get(dev->of_node);
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}
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static struct arm_smmu_master *find_smmu_master(struct arm_smmu_device *smmu,
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struct device_node *dev_node)
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static int __arm_smmu_get_pci_sid(struct pci_dev *pdev, u16 alias, void *data)
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{
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struct rb_node *node = smmu->masters.rb_node;
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while (node) {
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struct arm_smmu_master *master;
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master = container_of(node, struct arm_smmu_master, node);
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if (dev_node < master->of_node)
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node = node->rb_left;
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else if (dev_node > master->of_node)
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node = node->rb_right;
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else
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return master;
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*((__be32 *)data) = cpu_to_be32(alias);
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return 0; /* Continue walking */
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}
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return NULL;
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}
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static struct arm_smmu_master_cfg *
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find_smmu_master_cfg(struct device *dev)
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static int __find_legacy_master_phandle(struct device *dev, void *data)
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{
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struct arm_smmu_master_cfg *cfg = NULL;
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struct iommu_group *group = iommu_group_get(dev);
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struct of_phandle_iterator *it = *(void **)data;
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struct device_node *np = it->node;
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int err;
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if (group) {
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cfg = iommu_group_get_iommudata(group);
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iommu_group_put(group);
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of_for_each_phandle(it, err, dev->of_node, "mmu-masters",
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"#stream-id-cells", 0)
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if (it->node == np) {
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*(void **)data = dev;
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return 1;
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}
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it->node = np;
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return err == -ENOENT ? 0 : err;
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}
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return cfg;
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}
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static int insert_smmu_master(struct arm_smmu_device *smmu,
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struct arm_smmu_master *master)
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{
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struct rb_node **new, *parent;
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new = &smmu->masters.rb_node;
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parent = NULL;
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while (*new) {
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struct arm_smmu_master *this
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= container_of(*new, struct arm_smmu_master, node);
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parent = *new;
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if (master->of_node < this->of_node)
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new = &((*new)->rb_left);
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else if (master->of_node > this->of_node)
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new = &((*new)->rb_right);
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else
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return -EEXIST;
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}
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rb_link_node(&master->node, parent, new);
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rb_insert_color(&master->node, &smmu->masters);
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return 0;
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}
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static int register_smmu_master(struct arm_smmu_device *smmu,
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struct device *dev,
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struct arm_smmu_phandle_args *masterspec)
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{
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int i;
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struct arm_smmu_master *master;
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master = find_smmu_master(smmu, masterspec->np);
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if (master) {
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dev_err(dev,
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"rejecting multiple registrations for master device %s\n",
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masterspec->np->name);
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return -EBUSY;
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}
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if (masterspec->args_count > MAX_MASTER_STREAMIDS) {
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dev_err(dev,
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"reached maximum number (%d) of stream IDs for master device %s\n",
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MAX_MASTER_STREAMIDS, masterspec->np->name);
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return -ENOSPC;
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}
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master = devm_kzalloc(dev, sizeof(*master), GFP_KERNEL);
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if (!master)
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return -ENOMEM;
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master->of_node = masterspec->np;
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master->cfg.num_streamids = masterspec->args_count;
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for (i = 0; i < master->cfg.num_streamids; ++i) {
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u16 streamid = masterspec->args[i];
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if (!(smmu->features & ARM_SMMU_FEAT_STREAM_MATCH) &&
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(streamid >= smmu->num_mapping_groups)) {
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dev_err(dev,
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"stream ID for master device %s greater than maximum allowed (%d)\n",
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masterspec->np->name, smmu->num_mapping_groups);
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return -ERANGE;
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}
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master->cfg.streamids[i] = streamid;
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master->cfg.smendx[i] = INVALID_SMENDX;
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}
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return insert_smmu_master(smmu, master);
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}
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static struct arm_smmu_device *find_smmu_for_device(struct device *dev)
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static int arm_smmu_register_legacy_master(struct device *dev)
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{
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struct arm_smmu_device *smmu;
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struct arm_smmu_master *master = NULL;
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struct device_node *dev_node = dev_get_dev_node(dev);
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struct arm_smmu_master_cfg *cfg;
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struct device_node *np;
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struct of_phandle_iterator it;
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void *data = ⁢
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__be32 pci_sid;
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int err;
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np = dev_get_dev_node(dev);
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if (!np || !of_find_property(np, "#stream-id-cells", NULL)) {
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of_node_put(np);
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return -ENODEV;
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}
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it.node = np;
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spin_lock(&arm_smmu_devices_lock);
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list_for_each_entry(smmu, &arm_smmu_devices, list) {
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master = find_smmu_master(smmu, dev_node);
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if (master)
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err = __find_legacy_master_phandle(smmu->dev, &data);
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if (err)
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break;
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}
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spin_unlock(&arm_smmu_devices_lock);
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of_node_put(np);
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if (err == 0)
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return -ENODEV;
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if (err < 0)
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return err;
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return master ? smmu : NULL;
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if (it.cur_count > MAX_MASTER_STREAMIDS) {
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dev_err(smmu->dev,
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"reached maximum number (%d) of stream IDs for master device %s\n",
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MAX_MASTER_STREAMIDS, dev_name(dev));
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return -ENOSPC;
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}
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if (dev_is_pci(dev)) {
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/* "mmu-masters" assumes Stream ID == Requester ID */
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pci_for_each_dma_alias(to_pci_dev(dev), __arm_smmu_get_pci_sid,
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&pci_sid);
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it.cur = &pci_sid;
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it.cur_count = 1;
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}
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cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
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if (!cfg)
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return -ENOMEM;
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cfg->smmu = smmu;
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dev->archdata.iommu = cfg;
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while (it.cur_count--)
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cfg->streamids[cfg->num_streamids++] = be32_to_cpup(it.cur++);
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return 0;
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}
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static int __arm_smmu_alloc_bitmap(unsigned long *map, int start, int end)
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@ -1119,8 +1064,7 @@ static void arm_smmu_free_smr(struct arm_smmu_device *smmu, int idx)
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static void arm_smmu_write_smr(struct arm_smmu_device *smmu, int idx)
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{
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struct arm_smmu_smr *smr = smmu->smrs + idx;
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u32 reg = (smr->id & smmu->streamid_mask) << SMR_ID_SHIFT |
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(smr->mask & smmu->smr_mask_mask) << SMR_MASK_SHIFT;
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u32 reg = smr->id << SMR_ID_SHIFT | smr->mask << SMR_MASK_SHIFT;
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if (smr->valid)
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reg |= SMR_VALID;
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@ -1189,9 +1133,9 @@ static int arm_smmu_master_alloc_smes(struct arm_smmu_device *smmu,
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return -ENOSPC;
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}
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static void arm_smmu_master_free_smes(struct arm_smmu_device *smmu,
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struct arm_smmu_master_cfg *cfg)
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static void arm_smmu_master_free_smes(struct arm_smmu_master_cfg *cfg)
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{
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struct arm_smmu_device *smmu = cfg->smmu;
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int i;
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/*
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@ -1262,17 +1206,15 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
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{
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int ret;
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struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
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struct arm_smmu_device *smmu;
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struct arm_smmu_master_cfg *cfg;
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struct arm_smmu_master_cfg *cfg = dev->archdata.iommu;
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smmu = find_smmu_for_device(dev);
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if (!smmu) {
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if (!cfg) {
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dev_err(dev, "cannot attach to SMMU, is it on the same bus?\n");
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return -ENXIO;
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}
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/* Ensure that the domain is finalised */
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ret = arm_smmu_init_domain_context(domain, smmu);
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ret = arm_smmu_init_domain_context(domain, cfg->smmu);
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if (ret < 0)
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return ret;
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@ -1280,18 +1222,14 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
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* Sanity check the domain. We don't support domains across
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* different SMMUs.
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*/
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if (smmu_domain->smmu != smmu) {
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if (smmu_domain->smmu != cfg->smmu) {
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dev_err(dev,
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"cannot attach to SMMU %s whilst already attached to domain on SMMU %s\n",
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dev_name(smmu_domain->smmu->dev), dev_name(smmu->dev));
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dev_name(smmu_domain->smmu->dev), dev_name(cfg->smmu->dev));
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return -EINVAL;
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}
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/* Looks ok, so add the device to the domain */
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cfg = find_smmu_master_cfg(dev);
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if (!cfg)
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return -ENODEV;
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return arm_smmu_domain_add_master(smmu_domain, cfg);
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}
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@ -1411,120 +1349,65 @@ static bool arm_smmu_capable(enum iommu_cap cap)
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}
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}
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static int __arm_smmu_get_pci_sid(struct pci_dev *pdev, u16 alias, void *data)
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{
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*((u16 *)data) = alias;
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return 0; /* Continue walking */
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}
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static void __arm_smmu_release_pci_iommudata(void *data)
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{
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kfree(data);
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}
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static int arm_smmu_init_pci_device(struct pci_dev *pdev,
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struct iommu_group *group)
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{
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struct arm_smmu_master_cfg *cfg;
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u16 sid;
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int i;
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cfg = iommu_group_get_iommudata(group);
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if (!cfg) {
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cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
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if (!cfg)
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return -ENOMEM;
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iommu_group_set_iommudata(group, cfg,
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__arm_smmu_release_pci_iommudata);
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}
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if (cfg->num_streamids >= MAX_MASTER_STREAMIDS)
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return -ENOSPC;
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/*
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* Assume Stream ID == Requester ID for now.
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* We need a way to describe the ID mappings in FDT.
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*/
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pci_for_each_dma_alias(pdev, __arm_smmu_get_pci_sid, &sid);
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for (i = 0; i < cfg->num_streamids; ++i)
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if (cfg->streamids[i] == sid)
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break;
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/* Avoid duplicate SIDs, as this can lead to SMR conflicts */
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if (i == cfg->num_streamids) {
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cfg->streamids[i] = sid;
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cfg->smendx[i] = INVALID_SMENDX;
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cfg->num_streamids++;
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}
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return 0;
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}
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static int arm_smmu_init_platform_device(struct device *dev,
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struct iommu_group *group)
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{
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struct arm_smmu_device *smmu = find_smmu_for_device(dev);
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struct arm_smmu_master *master;
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if (!smmu)
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return -ENODEV;
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master = find_smmu_master(smmu, dev->of_node);
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if (!master)
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return -ENODEV;
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iommu_group_set_iommudata(group, &master->cfg, NULL);
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return 0;
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}
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static int arm_smmu_add_device(struct device *dev)
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{
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struct arm_smmu_master_cfg *cfg;
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struct iommu_group *group;
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int i, ret;
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ret = arm_smmu_register_legacy_master(dev);
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cfg = dev->archdata.iommu;
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if (ret)
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goto out_free;
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ret = -EINVAL;
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for (i = 0; i < cfg->num_streamids; i++) {
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u16 sid = cfg->streamids[i];
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if (sid & ~cfg->smmu->streamid_mask) {
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dev_err(dev, "stream ID 0x%x out of range for SMMU (0x%x)\n",
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sid, cfg->smmu->streamid_mask);
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goto out_free;
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}
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cfg->smendx[i] = INVALID_SMENDX;
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}
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group = iommu_group_get_for_dev(dev);
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if (IS_ERR(group))
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return PTR_ERR(group);
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if (IS_ERR(group)) {
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ret = PTR_ERR(group);
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goto out_free;
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}
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iommu_group_put(group);
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return 0;
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out_free:
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kfree(cfg);
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dev->archdata.iommu = NULL;
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return ret;
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}
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static void arm_smmu_remove_device(struct device *dev)
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{
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struct arm_smmu_device *smmu = find_smmu_for_device(dev);
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struct arm_smmu_master_cfg *cfg = find_smmu_master_cfg(dev);
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struct arm_smmu_master_cfg *cfg = dev->archdata.iommu;
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if (smmu && cfg)
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arm_smmu_master_free_smes(smmu, cfg);
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if (!cfg)
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return;
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arm_smmu_master_free_smes(cfg);
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iommu_group_remove_device(dev);
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kfree(cfg);
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dev->archdata.iommu = NULL;
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}
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static struct iommu_group *arm_smmu_device_group(struct device *dev)
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{
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struct iommu_group *group;
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int ret;
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if (dev_is_pci(dev))
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group = pci_device_group(dev);
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else
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group = generic_device_group(dev);
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if (IS_ERR(group))
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return group;
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if (dev_is_pci(dev))
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ret = arm_smmu_init_pci_device(to_pci_dev(dev), group);
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else
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ret = arm_smmu_init_platform_device(dev, group);
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if (ret) {
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iommu_group_put(group);
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group = ERR_PTR(ret);
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}
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return group;
|
||||
}
|
||||
|
||||
|
@ -1938,9 +1821,6 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev)
|
|||
struct resource *res;
|
||||
struct arm_smmu_device *smmu;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct rb_node *node;
|
||||
struct of_phandle_iterator it;
|
||||
struct arm_smmu_phandle_args *masterspec;
|
||||
int num_irqs, i, err;
|
||||
|
||||
smmu = devm_kzalloc(dev, sizeof(*smmu), GFP_KERNEL);
|
||||
|
@ -2001,37 +1881,6 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev)
|
|||
if (err)
|
||||
return err;
|
||||
|
||||
i = 0;
|
||||
smmu->masters = RB_ROOT;
|
||||
|
||||
err = -ENOMEM;
|
||||
/* No need to zero the memory for masterspec */
|
||||
masterspec = kmalloc(sizeof(*masterspec), GFP_KERNEL);
|
||||
if (!masterspec)
|
||||
goto out_put_masters;
|
||||
|
||||
of_for_each_phandle(&it, err, dev->of_node,
|
||||
"mmu-masters", "#stream-id-cells", 0) {
|
||||
int count = of_phandle_iterator_args(&it, masterspec->args,
|
||||
MAX_MASTER_STREAMIDS);
|
||||
masterspec->np = of_node_get(it.node);
|
||||
masterspec->args_count = count;
|
||||
|
||||
err = register_smmu_master(smmu, dev, masterspec);
|
||||
if (err) {
|
||||
dev_err(dev, "failed to add master %s\n",
|
||||
masterspec->np->name);
|
||||
kfree(masterspec);
|
||||
goto out_put_masters;
|
||||
}
|
||||
|
||||
i++;
|
||||
}
|
||||
|
||||
dev_notice(dev, "registered %d master devices\n", i);
|
||||
|
||||
kfree(masterspec);
|
||||
|
||||
parse_driver_options(smmu);
|
||||
|
||||
if (smmu->version == ARM_SMMU_V2 &&
|
||||
|
@ -2039,8 +1888,7 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev)
|
|||
dev_err(dev,
|
||||
"found only %d context interrupt(s) but %d required\n",
|
||||
smmu->num_context_irqs, smmu->num_context_banks);
|
||||
err = -ENODEV;
|
||||
goto out_put_masters;
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
for (i = 0; i < smmu->num_global_irqs; ++i) {
|
||||
|
@ -2052,7 +1900,7 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev)
|
|||
if (err) {
|
||||
dev_err(dev, "failed to request global IRQ %d (%u)\n",
|
||||
i, smmu->irqs[i]);
|
||||
goto out_put_masters;
|
||||
return err;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -2063,22 +1911,12 @@ static int arm_smmu_device_dt_probe(struct platform_device *pdev)
|
|||
|
||||
arm_smmu_device_reset(smmu);
|
||||
return 0;
|
||||
|
||||
out_put_masters:
|
||||
for (node = rb_first(&smmu->masters); node; node = rb_next(node)) {
|
||||
struct arm_smmu_master *master
|
||||
= container_of(node, struct arm_smmu_master, node);
|
||||
of_node_put(master->of_node);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int arm_smmu_device_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct arm_smmu_device *curr, *smmu = NULL;
|
||||
struct rb_node *node;
|
||||
|
||||
spin_lock(&arm_smmu_devices_lock);
|
||||
list_for_each_entry(curr, &arm_smmu_devices, list) {
|
||||
|
@ -2093,12 +1931,6 @@ static int arm_smmu_device_remove(struct platform_device *pdev)
|
|||
if (!smmu)
|
||||
return -ENODEV;
|
||||
|
||||
for (node = rb_first(&smmu->masters); node; node = rb_next(node)) {
|
||||
struct arm_smmu_master *master
|
||||
= container_of(node, struct arm_smmu_master, node);
|
||||
of_node_put(master->of_node);
|
||||
}
|
||||
|
||||
if (!bitmap_empty(smmu->context_map, ARM_SMMU_MAX_CBS))
|
||||
dev_err(dev, "removing device with active domains!\n");
|
||||
|
||||
|
|
Loading…
Reference in a new issue