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dmaengine: qcom: bam_dma: clear BAM interrupt only if it is raised
Currently we write BAM_IRQ_CLR register with zero even when no BAM_IRQ occured. This write has some bad side effects when the BAM instance is for the crypto engine. In case of crypto engine some of the BAM registers are xPU protected and they cannot be controlled by the driver. Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Tested-by: Pramod Gurav <gpramod@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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1 changed files with 8 additions and 4 deletions
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@ -801,13 +801,17 @@ static irqreturn_t bam_dma_irq(int irq, void *data)
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if (srcs & P_IRQ)
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tasklet_schedule(&bdev->task);
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if (srcs & BAM_IRQ)
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if (srcs & BAM_IRQ) {
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clr_mask = readl_relaxed(bam_addr(bdev, 0, BAM_IRQ_STTS));
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/* don't allow reorder of the various accesses to the BAM registers */
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mb();
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/*
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* don't allow reorder of the various accesses to the BAM
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* registers
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*/
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mb();
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writel_relaxed(clr_mask, bam_addr(bdev, 0, BAM_IRQ_CLR));
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writel_relaxed(clr_mask, bam_addr(bdev, 0, BAM_IRQ_CLR));
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}
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return IRQ_HANDLED;
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}
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